JPS5942364B2 - time axis equalizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-base equalizer, and more particularly to a time-base equalizer that is effective for use in a reproduction system of a video tape recorder in which a signal is divided into a plurality of channels and recorded.

Since the operating speed of the mechanical operating parts of a video tape recorder is not necessarily constant, jitter occurs in the reproduced electrical signal, which is one of the causes of deterioration of image quality.

To prevent this, a jitter corrector has already been proposed that uses a variable delay element such as a BBD or CCD to control the amount of signal delay. One of them is "CCD jitter corrector" (paper number 5-11, pp. 97-98), which was announced at the National Conference of the Television Society of Japan in 1976, but this method can only be applied to video signals with a single channel. It cannot be applied when the video signal is divided into multiple channels.

On the other hand, US Pat. No. 2,892,886 proposes a method for equalizing the time axes of signals of each channel when a video signal is divided into a plurality of channels. In this method, a phase-locked loop having a variable delay element and a phase detector is provided for each channel, and the output of one predetermined phase-locked loop is applied as a reference input to the phase detector.
The disadvantage of this method is that since the reference signal is taken from the output of the phase-locked loop, fixed time difference correction is not possible. Therefore, the present invention aims to improve the above-mentioned drawbacks of the prior art, and its purpose is to provide a time base equalizer that can be applied to multiple channels and that can correct time differences in a forward-determined manner. . A feature of the present invention for achieving this object is that each channel has a phase lock loop including a variable delay element and a phase detection circuit for controlling the variable delay element, and the reference signal applied to the phase detection circuit is , from the input of one phase lock loop via a flywheel oscillator. This will be explained in detail below with reference to the drawings. 1st
The figure shows a program diagram of a video tape recorder to which the present invention is applied, in which 1 is a Hadamard transform circuit;
1 is a magnetic tape, 3 is a time axis equalizer, 4 is a Hadamard inverse transform circuit, and the configurations of 1 and 4 are usually the same.

The video signal is applied to the input terminal 1N as a time-series signal, and is divided into multiple channels (in the embodiment, 4 channels) by the Hadamard transform circuit 1 and output (Yl, y2, 3, .
4) is obtained. This output is transmitted to multiple magnetic heads (Hl,
H2, H3, H4) are recorded on the magnetic tape 2.
During playback, the information on the magnetic tape 2 is transferred to the magnetic head (H1',
H flea, H'3, H4) is read and output (y1''
, Y2', Y3', yl) are obtained. These outputs (
y1', Y2', Y3', Y4') have jitter due to non-uniform mechanical operation of the video tape recorder, so the time axis is corrected by the time axis equalizer 3. The output signals (Zl, Z2, Z3, Z4) are applied to the Hadamard inverse transform circuit 4, and a time-series video signal is obtained at its output. Regarding the video tape recorder using Hadamard transform circuit, please refer to the patent application No. 49-96302.
This has been explained in detail elsewhere, so I will not discuss it further here. FIG. 2 is a process diagram of the time base equalizer 3 according to the present invention, and illustrates the case of four channels.

Here, 3a, 3b, 3c, and 3d are phase lock loops provided for each channel, each having a frequency-controlled variable delay element 4, a low-pass filter 5, a buffer 6, a driver 7, a phase detection circuit 8, and a controlled oscillator 9. . The output of the variable delay element 4 is applied to one input a of the phase detection circuit 8, and the output of the flywheel oscillator 10 is applied to the other input b. The oscillation frequency of the controlled oscillator 9 is controlled by the output of the phase detection circuit 8, and the oscillation frequency is applied to the variable delay element 4 via the driver 7 to control its delay time. Therefore, it is clear that the delay time of the variable delay element 4 is controlled so that the output of the phase detection circuit 8 becomes O. BBD or CCD as variable delay element
Semiconductors such as are used. From the output of the variable delay element 4, an equalized output (Zl, Z2, Z3, Z4) is obtained via a pass filter 5 and a buffer 6. On the other hand, the input line 11 of the flywheel oscillator 10 is coupled to y1', which is one of the inputs (y1'', Y2'', Y3'', Y4'') of the time axis equalizer 3.Flywheel oscillator 1
0 input line 11 is connected to the phase lock loop (3a, 3b, 3c
, 3d) is one of the features of the present invention. The flywheel oscillator 10 is an oscillator that follows the input frequency with inertia, and in the configuration shown in FIG.
The temporal average value of the frequency of the signal y1' is stabilized and output.

Therefore, from the output of the flywheel oscillator 10, the signal y1
′ has been removed. The signal stabilized by the flywheel oscillator 10 is transmitted to each phase lock loop (3
a, 3b, 3c, 3d) as a reference signal to the phase detection circuit 8 of each phase lock loop (3a, 3b).
, 3c, 3d) output signals (Zl, Z2, Z3, Z4) equalized on the time axis by this reference signal. As an experimental example of the above circuit, a 260-stage variable delay element manufactured by Fairchild Co., Ltd. (CCD-311) was used, a sawtooth wave type phase detection circuit was used, and a static correction range of +16 to -32 μS1 was used. Absorption jitter frequency 100Hz to 1kHz 1 correction amount 20dB, S/N 35
I got dB.

As explained in detail in the embodiments above, by the phase lock loop provided for each channel, the flywheel oscillator for providing a reference signal to the phase lock loop, and the application of the signal from the input section of the phase lock loop to the flywheel oscillator, The time axis of the signal divided into multiple channels is completely equalized, including the removal of fixed jitter.

Although the present invention is applied to a playback system of a video tape recorder, it goes without saying that the present invention can also be applied to general time axis equalization of a plurality of channels. Although the case where the number of channels is four is illustrated, it goes without saying that the present invention is applicable to any number of channels. It is also possible to provide the input signal with a special control signal to control the time base equalizer.

[Brief explanation of drawings]

FIG. 1 is an example of a program diagram of a video tape recorder to which a time base equalizer according to the present invention is applied, and FIG. 2 is a program diagram of one embodiment of the time base equalizer according to the present invention. 1: Hadamard transform circuit, 2: Magnetic tape, 3: Time axis equalizer, 4: Hadamard inverse transform circuit, 3a, 3b, 3c
, 3d; phase lock loop; 4: variable delay element; 5; low-pass filter; 6; buffer; 7; driver; 8; phase detection circuit; 9; controlled oscillator; 10; flywheel oscillator.

Claims (1)

[Claims] 1. In a time base equalizer that aligns the time bases of mutually related signals divided into a plurality of channels, each channel includes a frequency-controlled variable delay element, the output of the delay element, and a reference. a phase-locked loop having a phase detection circuit that detects a phase difference with a signal and controls the variable delay element according to the phase difference, and is coupled to an input section of one predetermined phase-locked loop; A time-base equalizer, characterized in that the reference signal for each channel is provided by a signal circuit. 2. A time base equalizer in which the reference signal circuit according to claim 1 is a flywheel oscillator.