JPH0578995B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a video signal recording and reproducing device, and is particularly suitable for use in a magnetic recording and reproducing device that needs to transmit a synchronization signal with a high S/N ratio. .

BACKGROUND TECHNOLOGY AND THEIR PROBLEMS As one of the video signal transmission systems, a VTR is known that records and reproduces luminance and chroma by time-compressing them and time-division multiplexing them. This VTR uses solid-state memory to compress the signal during recording and expand it during playback. The memory bit clock is created based on the edges of the horizontal sync signal. However, when the synchronizing signal passes through a companding/recording/reproducing system including a magnetic head and magnetic tape, the waveform of the synchronizing signal is likely to be distorted and the S/N ratio may be deteriorated. As a result, the bit clock is modulated and the memory contents and addresses change relative to each other, resulting in a significant deterioration in image quality.

In particular, during playback, when writing to and reading from memory for time axis expansion, time axis correction processing is also performed at the same time to remove jitter due to speed unevenness of the magnetic tape or magnetic head. Therefore, if you try to shorten the time constant of the PLL loop that creates the bit clock synchronized with the reproduced horizontal synchronizing signal to improve the followability of the bit clock frequency with respect to jitter, the S/
N deterioration directly leads to image quality deterioration. Therefore PLL
response bandwidth must be limited.

OBJECTS OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a video signal transmission device that is capable of recording and reproducing synchronization signals at a high S/N ratio.

Summary of the Invention The video signal recording and reproducing apparatus of the present invention is a video signal recording and reproducing apparatus that compresses a luminance signal and a chroma signal in time, and time-division multiplexes them to record and reproduce them on a magnetic tape. On the playback side, a burst insertion circuit is provided that inserts a burst signal of a predetermined frequency, which serves as a reference for time axis processing on the playback side, in synchronization with the horizontal synchronization signal. on the other hand,
On the playback side, a delay circuit that delays the playback signal to form a plurality of delay outputs each having a delay time of half a period or an integer multiple of one period of the phase of the burst signal; A circuit that matches the phases of all the outputs, an adder that adds the phase-matched delayed outputs, and a gate pulse formed based on the regenerated horizontal synchronization signal to add a predetermined portion of the added output of the adder. A synchronization reproducing circuit gates the signal to obtain a burst signal and obtains a pseudo horizontal synchronization signal based on the phase information thereof. With this configuration, it is possible to record and reproduce synchronization signals with high S/N.

Example The structure of the present invention will be explained below based on examples.

FIG. 1 is a block diagram of the main part of the recording system of a VTR using the luminance/chroma time division multiplexing system, showing an embodiment of the video signal transmission apparatus of the present invention, and FIG. 2 is a block diagram of the main part of the reproduction system.

In FIG. 1, for example, a PAL video signal is applied to a decoder 1 and converted into a luminance signal Y, a RY signal, and a BY signal. These signals are A/D
The signals are converted into digital signals by converters 2 and 3, and time compressed by time compression circuits 4 and 5. The clock and address given to the memories of the time compression circuits 4 and 5 are locked to the horizontal synchronization signal in the luminance signal Y.
It is formed in a clock circuit 6 equipped with a PLL. The time-compressed data is read out in a time-division manner, and includes an adder 7, a D/A converter 8, a low-pass filter 9,
The signal passes through an FM modulator 10, a recording amplifier 11, and is recorded on a magnetic tape 13 by a rotating magnetic head 12. As a result, as shown in the waveform diagram of FIG. 4, the chroma signal C and the luminance signal Y are recorded in a time-division manner.

On the other hand, the output of the clock circuit 6 and the horizontal synchronization signal in the luminance signal Y are supplied to the burst insertion circuit 14, and burst data of a predetermined frequency synchronized with the horizontal synchronization signal is created. This burst data is added to the adder 7, and a four-wave burst signal B, for example, is recorded as a pseudo horizontal synchronization signal in the blank space after the actual horizontal synchronization signal HD, as shown in FIG. 4a.

In the playback system shown in Figure 2, the playback amplifier 16 and the FM
A time-division multiplexed reproduced signal is obtained through the demodulator 17, and this signal is converted into a luminance signal Y by the A/D converter 18.
The signals R-Y and B-Y are each converted into a digital signal, and expanded by time expansion circuits 19 and 20 so as to have a normal time axis. Extension circuit 19, 20
The clock and address given to the memory are formed in the clock circuit 21.

The expanded output is converted into analog signals by D/A converters 22 and 23, and the RY and BY signals are encoded into chroma signals by an encoder 24.
The adder 25 adds it to the luminance signal and then derives it as a reproduced video signal.

In the clock circuit 21, the time expansion bit clock is formed based on the pseudo horizontal synchronization signal HD obtained by reproducing the burst signal B shown in FIG. 4a. In other words, the pseudo horizontal synchronization signal is synchronized (HD)
It is regenerated by the regeneration circuit 26 and output from the clock circuit 21.
The PLL is locked by the reproduced pseudo-horizontal synchronization signal, and a clock whose phase is synchronized with this pseudo-horizontal synchronization signal is obtained.

Since the reproduced pseudo-horizontal synchronization signal contains the same time axis fluctuation (jitter) as the video signal, the frequency of the clock obtained from the PLL of the clock circuit 21 is modulated by the jitter, thereby causing time expansion. When reading data from the memories of circuits 19 and 20, time axis correction is performed to remove jitter. In this case, since the S/N of the reproduced pseudo-horizontal synchronizing signal is extremely good as will be described later, the response of the PLL of the clock circuit 21 can be made sufficiently wide-band, and the jitter removal ability can be improved.

The synchronous (HD) playback circuit 26 has a configuration as shown in FIG. 3, and is also shown in FIG. 2.
The output of the FM demodulator 17 (FIG. 4a) is sent to a delay circuit 262 through a clamp circuit 261.
This delay circuit 262 outputs taps 1/2 at half cycle intervals of the recorded burst signal B of FIG.
1/, 3/2, 2/ (burst frequency), and the delay output for each cycle is 1/, 2/
, the delayed outputs 1/2 and 3/2 of odd integer multiples of the half period inverted by the inverters I1 and I2, and the input reproduced burst signal are added by an adder 263. Since the phases of each input of the adder 263 match,
As shown in FIG. 4c, the burst level of the addition output increases. On the other hand, since the noise components contained in the reproduced signal have no synchronization, the noise level does not increase due to addition. Therefore, an addition output with a very good S/N ratio can be obtained.

The output of the adder 263 is sliced (clipped) at a predetermined threshold level TH by a comparator 264 and output to an AND gate 265 as a rectangular wave output shown in FIG. 4d.

On the other hand, the output of the clamp circuit 261 (Fig. 4a)
is also applied to the HD separation circuit 266, from which the horizontal synchronizing signal HD shown in FIG. 4b is separated. This synchronization signal is given to the wind pulse generator 267,
A wind pulse shown in FIG. 4e is formed at a predetermined position from the HD pulse. The leading edge of this wind pulse is set slightly before the point where the burst level of the addition output is at its maximum. When four waves of delayed signals are added to the original signal at half-cycle pitches as in the example, the level of the second cycle (approximately the center) of the burst signal is the maximum, so the leading edge of the wind pulse is at this maximum level. The position is such that the edge (phase information) of the output of the comparator 264 can be extracted nearby.

Wind pulse (Fig. 4e) is AND gate 2
65 and the shaped rectangular wave output of the comparator 264 that falls within the window pulse period is extracted. The output of AND gate 265 is mono multi 26
A pseudo-horizontal synchronizing signal (FIG. 4f) of a predetermined pulse width is formed with a rising position at one edge selected from the comparator output. As described above, this pseudo-horizontal synchronizing signal is applied to the clock circuit 21 of FIG. 2, and a read clock is generated in synchronization with this synchronizing signal. As mentioned above, the S/N of the reproduced pseudo synchronization signal is extremely good, so even if the response band of the PLL of the clock circuit 21 is widened sufficiently to improve the time axis correction ability, the readout clock may be phase modulated by noise. Therefore, high-quality reproduced video can be obtained.

In the embodiment shown in FIG. 3, a plurality of delayed signals each having an integral multiple of a half period of the burst frequency are added to improve the S/N ratio of the reproduced burst signal. This configuration is for obtaining phase information every half cycle of the horizontal synchronization signal. Therefore, when obtaining phase information for each period, the delay circuit 262 only needs to have a delay output tap that is an integral multiple of the burst period.

Effects of the Invention As described above, the present invention inserts a burst signal of a predetermined frequency on the transmission input side in synchronization with a horizontal synchronizing signal, and forms a plurality of delayed signals in which the phases of the burst signals match on the transmission output side. After increasing the S/N by increasing the S/N, phase information of a predetermined portion of the added signal is extracted using a gate pulse formed based on the reproduced synchronizing signal to obtain a pseudo horizontal synchronizing signal. , a specific wave (for example, the maximum of the summed output with the best S/N The phase information can be extracted by focusing on the amplitude wave), and the reproduced time-axis compressed chroma signal can be expanded using a phase standard that does not change during recording and playback. This allows you to obtain high-quality reproduced images.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the main part of the recording system of a VTR using the luminance/chroma time division multiplexing system, which shows an embodiment of the video signal transmission device of the present invention, Fig. 2 is a block diagram of the main part of the reproduction system, and Fig. 3 2 is a block diagram of the synchronous (HD) reproducing circuit shown in FIG. 2, and FIG. 4 is a waveform diagram of each part of FIG. 3. In addition, in the codes used in the drawings, 26...Synchronization (HD) playback circuit, 262...Delay circuit, 263
...Adder, 264...Comparator, 265...
...AND gate, 266...HD separation circuit, 26
7...wind pulse generator, 268...mono multi.

Claims (1)

[Scope of Claims] 1. In a video signal recording and reproducing device that time-compresses a luminance signal and a chroma signal and time-division multiplexes them for recording and reproducing on a magnetic tape, the time on the recording side and the time on the reproduction side It is equipped with a burst insertion circuit that inserts a burst signal of a predetermined frequency as a reference for axis processing in synchronization with a horizontal synchronization signal, and on the playback side, the playback signal is delayed so that the phase of the burst signal is half a cycle or a delay circuit that forms a plurality of delayed outputs each having a delay time that is an integer multiple of one period; a circuit that matches all the phases of the plurality of delayed outputs; and an addition that adds the delayed outputs with the matched phases. a gate pulse formed based on the regenerated horizontal synchronization signal to obtain a burst-like signal by gating a predetermined portion of the addition output of the adder, and generating a pseudo horizontal synchronization signal based on the phase information. A video signal recording and reproducing device comprising a synchronous reproducing circuit that obtains a synchronized reproduction circuit.