JPH0233295A - Time base error correction device - Google Patents

Abstract

PURPOSE:To decode a chrominance carrier signal into a color difference signal by digital signal processing and to apply time band correction by generating a write clock and a readout clock at a frequency of a multiple of 4n of subcarrier (n=1, 2...). CONSTITUTION:A chrominance carrier signal outputted from a comb-line filter 28 is sampled at an A/D converter 31 according to a reference clock. In this case, the frequency of the write clock generated from the reference clock of a reference oscillator 40 is selected to be a multiple of 4n of the subcarrier (n=1, 2...) to decode the chrominance carrier signal and the result is written in a memory 33. The luminance signal and the color difference signal written in the memories 21, 33 are read in the timing of the readout reset pulse generated by a readout reset generator 36 and the time fluctuation component is eliminated. The chrominance carrier signal outputted from a D/A converter 35 is added to the luminance signal outputted from the D/A converter 22 by an adder 23 and becomes a reproduced video signal and outputted to an output terminal 24.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a time axis correction device during playback of a video tape recorder (VTR) that converts a color signal into a low frequency band and records the same.

2. Description of the Related Art In recording and reproducing apparatuses such as VTRs, relative speed fluctuations between a signal detector and a recording medium cause time axis fluctuations in reproduced video signals. A time base error correction device (TBC) is a method for correcting reproduced video signals with such time base fluctuations.
is used.

This time axis error correction device is described in, for example, TV Society Journal, No. 36.
Vol. 6, No. 6 (1981), P49ar Magnetic Recording (■) - Time Axis Fluctuations and Their Correction Methods," which is used in % inch professional VTRs, is conventionally known.

FIG. 4 shows a block diagram of an example of a time axis error correction device used in a conventional % inch commercial VTR. In the figure, a reproduced video signal obtained from a reproduction head 1 is amplified by a head amplifier 2, and then a bypass filter (a
pF)a and a low pass filter (LPF) 6, the signal is separated into an FM luminance signal and a low frequency converted color signal, respectively. The separated FM luminance signal is sent to an FM demodulator (FM-DICM)
4 and input to an adder 5. The low frequency conversion color signal is transmitted through a burst gate 9, a phase control circuit (PC) 10,
The reproduced signal is converted to the original subcarrier frequency by an automatic phase control loop (PC loop) configured by a frequency converter (HEτ) 7, passed through a band pass filter (BPF) s, and then demodulated by an adder 6. Added to the luminance signal.

The burst signal obtained from the burst gate 9 is compared in phase with a signal obtained by multiplying the synchronization signal obtained from the synchronization separation circuit 11 by the PI and L circuits 12, so that the carrier color output from the bandpass filter 8 is The same amount of time axis fluctuation as the time axis fluctuation component included in the reproduced luminance signal is added to the signal. The reproduced video signal with time axis fluctuation outputted from the adder 5 is converted by the MU/D converter 13 and written into the memory 14. At this time, since the write clock is generated by the write clock generation circuit 17 in synchronization with the synchronization signal output from the synchronization separation circuit 11, the data written to the memory 14 has time axis fluctuations removed. It is remembered in the form Therefore, the data stored in this memory is read out using the read clock output from the read clock generation circuit 18 so as to be phase-synchronized with the reference synchronization signal from the reference synchronization signal generator 19, and converted into an analog signal by the D/MU converter 15. By restoring the signal to the original value, the output terminal 1e is configured to output a reproduced video signal whose time axis has been corrected.

FIG. 6 shows another conventional example of a time axis error correction device filed by the same inventor as the present invention.

In this figure, circuits that are the same as those in FIG. 4 are given the same numbers. The FM reproduced video signal reproduced by the reproduction head 1 is amplified by a head amplifier 2, and separated into an FM luminance signal and a low-frequency conversion color signal by a bypass filter 3 and a low-pass filter e. The separated FM luminance signal is 7
The signal is demodulated by the M demodulator 4 and input to the M/D converter 20. The low frequency conversion color signal is converted to the original subcarrier frequency by an automatic phase control loop composed of a frequency converter (HIT) 27, a burst gate 29, and a phase control circuit (PC) 30, and then converted to a carrier color signal. and output from the comb filter 28. The carrier color signal output from the comb filter 28 is decoded by the demodulator 51 using the quadrature two-phase carrier wave obtained by passing the reference subcarrier wave obtained from the frequency divider 67 through the phase shifter 6o. These color difference signals output as two baseband color difference signals are alternately sampled by the write clock in the multiplex circuit 62 and sent to the M/D converter 6.
3 is output. This write clock is controlled by the phase modulator 41 so as to be instantaneously synchronized in phase with the synchronization signal separated by the synchronization separation circuit 26 from the FM demodulated luminance signal.

Since the color difference signal input to the chrominance/D converter 63 has been converted to baseband, it contains the same time axis error as the luminance signal. Therefore, data is written to the independent memories 21 and 54 using the same write clock at the timing of the write reset pulse from the write reset pulse generator 26 synchronized with the synchronization signal of the luminance signal, and the reference clock from the reference oscillator 40 is used as the reference clock. Each of the signals is read out at the timing of a read reset pulse from the read reset pulse generator 36 which is synchronized with a signal obtained by dividing the clock by the frequency divider 42. The read color difference signal is encoded into a carrier color signal by the modulator 65 and then output from the D/MU converter 66. The carrier color signal output from the D/mu converter 66 is converted into a D/mu converter by the adder 23.
The luminance signal is added to the luminance signal output from the luminance converter 22 and output to the output terminal 24.

Problems to be Solved by the Invention When the above-described time axis error correction device is applied to a home VTR, the following problems occur.

In other words, in a home VTR, the recording frequency form of the signal is %
Although it has almost the same form as an inch VTR, since azimuth recording is performed, there is a lot of crosstalk noise in the reproduced low-frequency converted color signal.

In order to remove crosstalk noise, it is necessary to configure a comb filter that uses line correlation, but as shown in Figure 4, the color signal that has passed through the bandpass filter contains time axis fluctuation components. Even if the signal is passed through a comb filter, crosstalk noise cannot be completely removed. Therefore, the PC loop cannot perform accurate response operations either.

In addition, in the circuit configuration shown in Fig. 6, since the MuPC loop is phase-synchronized with the reference clock, crosstalk noise can be removed through a comb filter, but the carrier color signal cannot be detected in the analog signal section. In order to decode it, a complicated and expensive decoding circuit is required, and since it is processed using an analog signal, deterioration is inevitable.

In view of these points, the present invention can sufficiently eliminate the influence of adjacent crosstalk, and can easily and inexpensively realize decoding and encoding of color signals in the digital signal state. It is an object of the present invention to provide a time axis error correction device that can obtain time axis fluctuation removal characteristics.

Means for Solving the Problems The time axis error correction device of the present invention converts a low frequency converted color signal separated from a reproduced video signal into a color signal from which phase fluctuation components of subcarriers are removed by frequency conversion means, and The converted color signal is sampled at a frequency 4n times the subcarrier (n=1.2...) using a constant reference clock without time axis fluctuation.

The sampled color signal data is decoded into baseband color difference signal data by inverting the polarity every 2n clocks of the reference clock. This decoded color signal data is separated from the reproduced video signal and synchronized with a clock having a frequency twice that of the subcarrier obtained by dividing the reference clock, immediately after the synchronization signal from the FM demodulated luminance signal. The information is written into the memory using the reference clock at the timing of the reset pulse for the color signal. The color difference signal written in the memory is read out using this reference clock at the timing of a reference synchronization signal obtained by dividing the frequency of the reference clock, and the polarity of the color difference signal is inverted and modulated every 2n clocks of the reference clock, and the color difference signal is returned to an analog signal. It is possible to obtain a carrier wave color signal that has been time axis corrected.

On the other hand, the FM demodulated luminance signal is transferred to another independent memory by a write clock controlled to instantaneously phase synchronize with this synchronization signal at the timing of a write reset pulse synchronized with a synchronization signal separated from the reproduced luminance signal. The data is written and read out using the reference clock at the timing of the reference synchronization signal, thereby correcting the time axis.

Therefore, the time-base corrected luminance signal and the time-base corrected carrier color signal are combined to obtain a reproduced video signal.

Furthermore, the polarity of the color signal sampled using a reference clock having four times the subcarrier frequency is inverted every two clocks and at the cycle of the clock having twice the subcarrier frequency. One of the inverted color signals is averaged every two clocks and output, and the other is delayed by a delay time equivalent to the averaging and output.

These two output signals are determined by comparing the phases of the write reset pulse with a clock having twice the subcarrier frequency and a clock with an opposite phase of that clock, and selecting which one is the write reset pulse by an output signal that follows the closer clock. is selected and written into the memory using the reference clock in synchronization with the write reset pulse and at the timing of the color signal reset pulse which is also synchronized with the reference clock. The reference clock is read out at the timing of the reference synchronization signal, thereby making it possible to perform time axis correction to reduce the reset error to within % fso seconds.

The present invention provides a time axis error correction device having the above-mentioned configuration, in which the frequency converting means sufficiently removes the phase fluctuation of the subcarrier due to the time axis fluctuation of the low frequency converted color signal, and also adjusts the phase of the subcarrier. The carrier color signal with fluctuations removed is
Synchronize with this subcarrier and multiply by 4n (n=1.2...)
Sampling is performed using a reference fixed clock with a frequency of . The sampled carrier color signal can easily be converted into a baseband color signal by inverting the polarity every 2n clocks and at the cycle of a clock having twice the frequency of the subcarrier obtained by dividing the reference clock. It can be decoded and extracted into a signal, and it can be made into a color signal that has the same time axis fluctuation component as the luminance signal. This color signal having a time axis fluctuation component is synchronized with the synchronization signal of the luminance signal and also with the clock having twice the frequency of the subcarrier, and is synchronized with the previous reference at the timing of the reset pulse for the nine color signals. A time-corrected color signal component is extracted on the memory by writing it into the memory using a clock and reading it using the reference clock by typing a reference synchronization signal from the reference clock. The extracted color signal component is processed at a frequency of 2n of the reference clock at a period of the clock having twice the frequency of the subcarrier.
By inverting the polarity for each clock, it can be easily encoded into a carrier color signal. In this case, the timing of writing to the memory is performed at a position synchronized with a clock with twice the frequency of the subcarrier closest to the synchronization signal of the luminance signal, so the error in the reset position is at most 11
12rso seconds (fsa: subcarrier frequency). Generally, the residual jitter after time axis correction is 6 for the recording band.
It is thought to be within 1. Since the color signal has a band of about 500 KHz at baseband, the amount of residual jitter can be considered to be within 1 oonsec at maximum. Therefore, the second method is used to further reduce residual jitter.

A color signal sampled by a reference clock having a subcarrier frequency four times as high is decoded into a baseband by inverting the polarity every two clocks and at the cycle of a clock having a subcarrier frequency twice as high. One of the decoded color signals is averaged every two clocks and output, and the other is delayed by a delay time equivalent to the averaging and output. Therefore, these two output signals are outputted with a period of 2rsa and with a phase shift of 14 fsc. These two output signals are generated by comparing the phases of the write reset pulse with the clock having a subcarrier frequency twice that of the clock and a clock with an opposite phase of that clock, and selecting one of the clocks according to the output signal that is closer to the clock. only selected. As a result, the phase error between the write reset pulse and the output color signal component can be brought closer to 114 fsaK. This output signal is written into the memory by the reference clock in synchronization with the write reset pulse and at the timing of the color signal reset pulse which is also synchronized with the reference clock. By reading out the signal at the timing of the reference synchronization signal using the reference clock, it is possible to achieve the above objective and further reduce the busy reset error to nearly 1/4 fS 0 seconds.

Example An embodiment of the present invention will be described with reference to FIG.

A reproduction signal obtained from a reproduction head 1 in the figure is amplified by a head amplifier 2, and then separated into an FM luminance signal and a low-frequency conversion color signal by a bypass filter 3 and a low-pass filter 6, respectively. The FM luminance signal is processed by an FM demodulator (FM
After being demodulated by the DEM) 4, the signal is input to the MU/D converter 20.

The low frequency converted color signal is converted to the original subcarrier frequency by a so-called human PC loop consisting of a frequency modulator 27, a burst gate 29, and a phase control circuit (PC) 30, and becomes a carrier color signal. This carrier color signal is transmitted to the reference oscillator 4o.
Since the reference clock is controlled by being compared in phase with a reference subcarrier obtained by dividing the reference clock by frequency dividers 37 and 38, phase fluctuation components of the carrier wave due to time axis fluctuations are sufficiently removed.

Therefore, the signal can be passed through the comb filter 28, and adjacent crosstalk can be sufficiently removed.

The carrier color signal output from the comb filter 28 is sampled by the MU/D converter 31 in accordance with the reference clock. At this time, by setting the frequency of the reference clock of the reference oscillator 4o and the write clock generated from the reference clock to 4n times the subcarrier (n=1, 2...), the carrier color signal sampled by the reference clock is Decoding can be performed simply by reversing the polarity for each clock, and a pace pad/de color difference signal can be easily obtained.

The decoded color difference signal is sent to the write reset generator 2
The data is written into the memory 33 by the reference clock at the timing of the reset pulse from the color signal reset pulse generator 39, which is synchronized with the write reset pulse from 6 and also synchronized with the clock obtained by dividing the reference clock by the frequency divider 37. On the other hand, the luminance signal is written into the memory 21 by the write clock at the timing of the write reset pulse described above. The write clock is obtained by phase modulating the reference clock from the reference oscillator 4o using the phase modulator 41 so as to instantaneously synchronize the phase with the synchronization signal separated by the synchronization signal separation circuit 25. Memory 21.33
The luminance signal and two color difference signals written to the reference oscillator 4Q
This reference clock is frequency-divided by the frequency divider 42 and read out at the timing of the read reset pulse generated by the cent generator 36, so that the time axis fluctuation component is removed. It is possible to obtain a luminance signal and a color difference signal. Since the reference clock is 4n times the subcarrier as described above, the data of the color difference signal is processed/coded into a carrier color signal by simply inverting the polarity every 2n clocks, and is output from the D/M converter 35. The carrier color signal outputted from the D/mu converter 35 is added to the luminance signal outputted from the D/mu converter 22 by an adder 23, and the resulting signal is outputted to the output terminal 24 as a reproduced video signal.

The time axis fluctuation component of the reproduced video signal is generated by the drum motor 45, and the average speed of this time axis fluctuation,
By synchronizing the read clocks, the memory 21.
It becomes possible to perform time axis correction without overflowing 33.

Therefore, the drum servo 4 that controls the drum motor 45
As the reference signal No. 4, it is necessary to input a signal obtained by frequency-dividing the reference clock outputted from the reference oscillator 4o by the divider 43.

Next, the operation of the phase modulator 41 that generates the write clock will be explained using FIG. 2. This figure is a block diagram showing an example of a write clock generation phase modulator. In the figure, a reference clock from a reference oscillator 40 is phase-shifted by a phase shift circuit 47 into m signals having different phases by 2π/m, and inputted to a phase detector 46 and taken out from a synchronization signal separation circuit 26. Input the synchronization signal. Further, the m signals output from the phase shifter 47 are input to a clock signal selector 48, which detects a signal with a phase closest to the synchronizing signal, and selects a clock signal from the detected output signal. The write clock is selected from the device 48 and outputted to the output terminal 49.

Next, another embodiment of the present invention will be described with reference to FIG. In this figure, circuits that are the same as those in FIG. 1 are given the same numbers, and their explanations will be omitted. The signal frequency-divided by the frequency divider 37 to twice the frequency of the subcarrier is transferred to the inverter 68.
The signal is input to the phase comparator 59 together with the inverted signal. The phase comparator 69 also receives a signal from the write reset pulse generator 26, and outputs the phase of the write reset pulse among the double positive phase subcarrier and the twice negative phase subcarrier. A signal corresponding to the carrier wave closer to the carrier wave is output to switch the switch 63.

A demodulator 32 inverts the polarity of the carrier color signal sampled by the gam/D converter 31 at every clock of twice the frequency of the subcarrier from the frequency divider 37, and outputs the signal. The signal output from the demodulator 32 is averaged every 2n clocks of the reference clock by the averaging circuit 61 and outputted to the switch 63, and the signal is averaged by the averaging circuit 61 by the delay circuit 62.
A signal delayed by a delay time equivalent to is output to the switch 63. The signal selected by the switch 63 is the reset pulse from the write reset pulse generator 6o for the color signal which is synchronized with the glue set pulse from the write reset pulse generator 2e and also synchronized with the reference clock from the reference oscillator 4o. The data is written into the memory 33 according to the reference clock timing. The reference clock is read out from the memory 33 at the timing of the reset pulse which is divided by the frequency divider 42 and generated by the readout reset pulse generator 36, thereby obtaining a time-axis corrected signal. There is.

With this configuration, this embodiment reduces the reset timing error due to write reset to 174 fsc
(fsc: subcarrier frequency) can be close to seconds.

Effects of the Invention As described above, according to the time axis error correction device of the present invention, the carrier wave color can be adjusted by digital signal processing by generating the write clock and the read clock at a frequency 4n times the subcarrier (n = 1.2...). The signal can be easily decoded into a color difference signal, time axis correction can be performed, and it can also be easily modulated into a time axis corrected carrier color signal, without the need for a decoder or encoder using a normal multiplier. The configuration allows time axis correction, which has great practical value.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a time axis error correction device according to an embodiment of the present invention, FIG. 2 is a block diagram of a phase modulator for generating a write clock according to the present invention, and FIG. 3 is a block diagram of another embodiment of the present invention. FIG. 4 is a block diagram of a conventional time axis error correction device, and FIG. 5 is a block diagram showing another conventional time axis error correction device. 1... Playback head, 2... Head amplifier, 3... Bypass filter, 4... FM demodulator, 20°31... Mu/D
Converter, 21.33...Memory, 22.35...D/MU converter, 23...Adder, 24...
...Output terminal, 26...Synchronization signal separation circuit, 26.39...
... Write reset pulse generator, 27 ... Frequency converter, 28 ... Comb filter, 29 ... Burst gate, 3o ... Phase control circuit, 32 ... Color signal demodulator, 34
...Color signal modulator, 36...Readout reset pulse generator, 37゜38.39.41...Frequency divider, 4o...Reference oscillator, 42...Drum servo, 43...Drum motor 0 Ta 0

Claims (2)

[Claims] (1) A means for separating an FM luminance signal component from a reproduced video signal that includes time axis fluctuations and a synchronization signal from the demodulated reproduction luminance signal, and a write clock that generates a write clock that is instantaneously phase-synchronized with the synchronization signal. generating means; means for sampling the reproduced luminance signal using the write clock and writing it into the first memory at a reset timing phase-synchronized with the synchronization signal; and a read clock for generating a constant reference clock without time axis fluctuation. generating means; means for reading out the reproduced luminance signal from the first memory at the reset timing of a reference synchronization signal obtained by dividing the read clock using the read clock from the read clock generating means; a frequency conversion means for separating the converted color signal, using a signal obtained by dividing the readout clock as a reference subcarrier signal, and converting the low frequency conversion color signal into the original carrier color signal; and the frequency conversion means according to the readout clock. a decoding means for sampling a carrier color signal obtained from the above and demodulating it into a color difference signal; means for writing into a second memory at a reset timing synchronized with a clock having twice the frequency of the obtained subcarrier signal; and means for reading out a color difference signal from the second memory at a reset timing of the reference synchronization signal according to the readout clock. and an encoding means for modulating the color difference signal into a carrier color signal, and the write clock generating means instantaneously synchronizes in phase with the synchronization signal and generates a frequency 4n times the subcarrier frequency (n=1, 2... ), the read clock generating means generates a constant reference clock having a frequency 4n times the subcarrier frequency (n=1, 2...), and the decoding means generates a constant reference clock that is 4n times the subcarrier frequency (n=1, 2...); The signal is demodulated into a color difference signal by inverting the polarity at every clock frequency obtained by dividing the read clock by 1/2n, and the encoding means converts the read clock into a color difference signal by dividing the read clock by 1/2n. A time axis error correction device characterized in that the polarity is inverted every clock cycle divided by 2n and modulated into a carrier color signal. (2) Both the write clock and the read clock are set to four times the frequency of the subcarrier signal, and the color difference signal output from the decoding means is averaged every two clocks of the read clock, and at the same time a signal is output, and at the same time, the delay time required for averaging is The color difference signal is output after being delayed by 1/2, and the phase is compared between the reset timing synchronized with the synchronization signal and the two-phase clock obtained by dividing the read clock by 1/2, and the output signal is determined according to the closer clock. Accordingly, the averaged output signal and the delayed output signal are selected and input to a memory, and the readout clock resets the color signal in synchronization with the readout clock immediately after the reset timing synchronized with the synchronization signal. Claim 1, wherein the color difference signal is written into the memory at a certain timing, and the color difference signal is read out from the memory at the timing of a reference synchronization signal using the read clock, and the polarity is inverted every two clocks of the read clock and modulated into a carrier color signal. The time axis error correction device described.