JPS62183062A - Phase-locked loop circuit in pcm recording and reproducing device - Google Patents

Abstract

PURPOSE:To attain the stable synchronizing detection even against jitter or skew by using duplicated PLL circuits. CONSTITUTION:A PCM reproducing signal through a recording and reproducing device 50 and an amplifier 52 becomes a PCM audio signal via a BPF 31 and the signal is detected and demodulated at a 4-phase shift keying (PSK) circuit 30 by using a recovered carrier signal S'C from a carrier phase-locked loop circuit 70 as a reference carrier signal for synchronizing detection. The signal S'C is formed by the carrier phase-locked loop circuit 70 of a duplicated PLL circuit comprising a PLL circuit receiving a horizontal synchronizing signal S'H formed by using a recovered luminance signal from a horizontal synchronizing signal detection circuit 74 and consisting of a voltage controlled oscillator (VCO) 71, a 1/N frequency division circuit 71 and a phase comparator 73, and comprising a feedback PLL circuit consisting of the VCO 71 and a carrier phase error detection circuit 75 detecting the phase difference between a 4-phase PSK signal and the signal S'C. Thus, even when the signal S'H is delayed, the signal S'C is phase-locked to the recovered 4-phase PSK signal to attain the stable synchronizing detection against jitter or skew.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an apparatus for multiplexing PCY audio signals and digital information onto video signals and recording and reproducing them, and particularly for synchronously detecting digitally modulated recorded and reproduced signals. The present invention relates to a carrier phase synchronization device suitable for.

[Conventional technology]

With the spread of digital audio disc players using compact discs and the start of high-quality digital audio broadcasting through satellite broadcasting, there is a demand for home VTRs to be digitized for high-quality recording.

Conventionally, this type of device was disclosed in Japanese Patent Application Laid-Open No. 59-15131.
As described in No. 4, the audio signal was converted into PCM, and then recorded as AM or FM and frequency multiplexed with the video signal.

[Problem that the invention seeks to solve]

However, the above-mentioned conventional technology does not give any consideration to the demodulation of the reproduced PCkf audio signal, especially the synchronous demodulation with respect to VTR jitter and skew at the time of head switching.

On the other hand, Japanese Patent Application Laid-Open No. 1983-1980 (1983) developed a technique for frequency-multiplexing recording of low-speed data containing information such as date, time, location, etc. on a video signal, and synchronously demodulating the data.
It is proposed in No. 94204. This records the carrier wave signal of the PSE in phase synchronization with the horizontal synchronization signal of the video signal, and during playback, forms a carrier wave signal phase synchronized with the horizontal synchronization signal of the reproduced video signal, and reproduces PSx with this carrier wave signal. This method performs synchronous detection of signals.

However, in the above-mentioned conventional technology, a time lag occurs between the horizontal synchronization signals during recording and playback because an FM demodulation and demodulation circuit for the video signal is interposed between them. There is a problem in that a time lag occurs even in the idle reproduced carrier wave signal, and for this reason, it is necessary to correct the phase of the reproduced carrier wave signal using a phase shifter. Moreover, when multiplexing high-speed data such as PCM audio signals, even a small time difference results in a large phase shift K, so there is a problem that a simple phase shifter cannot cope with jitter and skinny. was there.

An object of the present invention is to provide a phase synchronization device for a PCM recording and reproducing device that can perform stable synchronous detection even against jitter and skew in a demodulating device for a PCM audio signal that has been subjected to 54-phase PSK modulation, multiplexed recording and reproduction with a video signal. There is a particular thing.

[Means for solving problems]

The above object is achieved by providing a phase error detection circuit between the reproduced four-phase PSX signal and the reproduced carrier signal, and feeding back this phase error signal to the conventional PLL circuit.

[Effect]

A conventional PLL circuit mainly operates to match the frequencies of a horizontal synchronization signal and a reproduced carrier signal, and accurate phase synchronization is performed using an error signal from a newly provided phase error detection circuit.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. In the figure, an input terminal 1 is supplied with a PCM audio signal to be recorded, and an input terminal 2 is supplied with a baseband video signal. For example, if the video signal from input terminal 2 is a VTR, □LPF 21 and EPF 221
C, the luminance signal and color signal are separated, and the luminance signal is FM
The modulation circuit 23 performs FM modulation. The color signal is frequency-converted by a low frequency conversion circuit 24, and then converted to an HPF 25.
, an LPF 26 and an adder 27 for frequency multiplexing. On the other hand, the PCM audio signal from the input terminal 1 is processed by, for example, a serial-parallel conversion circuit 11, LPF 12, 15
, a balanced modulator 14, a 15.90' phase shifter 16, and an adder 17. The signal is frequency-multiplexed with the video signal by the receiver 19, and is recorded in the recording/reproducing device 50 through the recording amplifier 51. At this time, the four-phase psx modulation circuit 10
A voltage controlled oscillator 610 and a frequency divider 62 are used as the carrier signal.
and a phase comparator 65.
) is supplied with the output signal SC of the circuit 6o, and P
As the base signal of the LL circuit 6o, for example, a horizontal synchronization signal sH separated from the luminance signal by a horizontal synchronization detection circuit 64 is supplied. Therefore, the frequency of the four-phase psx carrier wave is N times the horizontal scanning frequency (N indicates the frequency division ratio of the frequency divider 62), and its phase is also synchronized with the horizontal synchronizing signal.

Next, the signal reproduced by the recording/reproducing device 50 is amplified to an appropriate level by the reproducing amplifier 52, and the signal is amplified to an appropriate level by the reproducing amplifier 52.

The HPF 41 and LPF 42 separate the signal into a PCY audio signal, a luminance signal, and a color signal, respectively. FM
The modulated luminance signal is demodulated by an FM demodulation circuit 43, and the color signal subjected to low frequency conversion is converted to the original color subcarrier band by a frequency conversion circuit 44. These signals are then frequency-multiplexed by the LPF 45, BPF 46, and adder 47 to return to the baseband video signal before recording, and output through the output terminal 4. On the other hand, the PCM audio signal subjected to four-phase PSX modulation is transmitted to the phase detector 52, for example.
55.90 degree phase shifter 34, LPF 35,56,
The signal is demodulated into the original digital signal by a four-phase psx demodulation circuit 30 composed of code identification circuits 37 and 38 and a parallel-to-serial conversion circuit 39, and outputted through the output terminal 3.

At this time, the output signal S2 of the carrier phase synchronization circuit 70 according to the present invention is supplied to the four-phase PSK demodulation circuit 50 as a reference carrier signal for synchronous detection. This carrier phase synchronization circuit 70 is connected to a voltage controlled oscillator 71. A frequency divider 729 and a phase comparator 73 having the same frequency division ratio (N) as the recording side frequency divider 62. It is composed of a carrier wave phase error detection circuit 75 and an adder 76, and is supplied with a horizontal synchronization signal S;I separated from the reproduced luminance signal by a horizontal synchronization signal detection circuit 74 as a reference signal, as in the case of recording. Carrier phase error detection circuit 7
Reference numeral 5 denotes a circuit for detecting the phase difference between the reproduced and separated four-phase psx signal and the reproduced carrier wave S9, and the four-phase borrowing method, the inverse modulation method, the Costas loop method, etc. are well known as methods thereof.

Therefore, this carrier phase synchronization circuit 70 constitutes one PLL with the VCO 72, the frequency divider 732, and the phase comparator 73, and another PLL is constituted with the VCO 72 and the carrier phase error detection circuit 75. Even if the regenerated horizontal synchronization signal S'H was delayed, the regenerated carrier wave S'c was regenerated4.
Phase synchronizes with phase PSK signal.

Next, as another embodiment of the present invention, a method of recording and reproducing audio PCM signals on the same video track using an audio-dedicated magnetic head having a different azimuth angle from a magnetic head for recording and reproducing video signals will be described. An example in which the present invention is applied to a VTR will be described. Figure 2 shows its configuration. In the same figure, 501 and 502 are for audio only'\rad 505 and 5
04 is a dedicated video head, 505 is a magnetic tape, 56 is a recording amplifier, and 54 is a reproduction amplifier. Furthermore, in this embodiment, the audio carrier wave S is used. As a reference signal for phase synchronization, a color subcarrier signal SN is used instead of a horizontal synchronization signal. As is well known, this signal SN is applied to the multipliers 241, 242 . S,
5BMEz PLL circuit 245° 160f HPLL circuit 244. Burst gate pulse generation circuit 245, B
The chrominance signal is generated by the low frequency conversion circuit 24 composed of the PF 246. Reference numerals 67 and 68 are branching devices, and by appropriately selecting a combination of branching ratios K and M, the audio carrier frequency can be set thinner and arbitrarily than when a horizontal synchronizing signal is used.

The playback side is also synchronized with the recording side, carrier phase synchronization circuit 7
The reference signal supplied to 0 is a 158J/j7z reference color subcarrier signal S generated in the frequency conversion circuit 40;
, is used. Needless to say, the division ratios of the division devices 77 and 78 are set to 11CK and H, the same as on the recording side.

The operation of the carrier phase synchronization circuit 70 is exactly the same as the embodiment shown in FIG.

By the way, this reference color subcarrier signal s; serves as a base thread signal for the rotation servo of the magnetic head and the feeding servo of the magnetic tape. Therefore, in this embodiment using this signal S; as a reference signal, even more stable carrier phase synchronization characteristics can be obtained.

FIG. 3 is a configuration diagram showing still another embodiment of the present invention. In FIG. 3, 101 L and 101 R are stereo audio signal input terminals, 110 is an AD converter, and 120
130 is a timing control circuit; 80 is a clock signal S; □ PLL circuit, 9o is a clock phase synchronization circuit, 510 is a digital signal processing circuit, 520 is a DA converter, 330 is a timing control circuit, 301L and 301R are reproduced stereo sounds.

Shows the voice signal output terminal. A PLL circuit and an In
n-pressure controlled oscillator 91 lock phase error detection circuit 95. The operation of the clock phase synchronization circuit 90 constituted by the adder 96 is exactly the same as that of the carrier wave PLL circuit 60 and the carrier wave phase synchronization circuit 70.

In this way, in this embodiment, not only the carrier wave but also the voice PC
Since the reference clock SCK of the M signal is also phase-synchronized separately from the horizontal synchronization signal 5, the demodulation of the audio PCM signal becomes more stable.

〔Effect of the invention〕

According to the present invention, when an audio PCM signal is synchronously demodulated, it has a dual configuration of a PLL that uses the reproduced video signal as a reference signal and a PLL in the demodulation circuit, so that jitter and skinny can be prevented. Since carrier waves and clocks can be stably phase-synchronized, the sound PCM signal can be reliably reproduced with 0T capability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a block diagram showing still another embodiment of the present invention. 10...4-phase psx modulation circuit 60...
...4-phase psx demodulation circuit 50...
Recording/reproducing device<So, 80...PLL circuit 64.74...Horizontal synchronization signal detection circuit 70...
-...Carrier phase synchronization circuit 75...Carrier phase error detection circuit 76.96...Adder

Claims (1)

[Claims] 1. A circuit that digitally modulates a PCM audio signal and/or digital data into a carrier band;
A device for multiplex-recording the output signal of the digital modulation means and the video signal, and/or a device for reproducing the recorded digital modulation signal and the video signal, and a circuit for phase-lock demodulating the reproduced digital modulation signal. An oscillator phase-synchronized with the video signal is provided on the recording side and/or the reproduction side, the output signal of the recording side phase-locked oscillator is used as a recording clock and/or a carrier wave, and the output of the reproduction side phase-locked oscillator is 1. A phase synchronization circuit in a PCM recording and reproducing device, characterized in that the signal is configured to use a reproduced clock and/or a carrier wave.