JPS5939553U - Receiver with deck - Google Patents

Receiver with deck

Info

Publication number
JPS5939553U
JPS5939553U JP13606082U JP13606082U JPS5939553U JP S5939553 U JPS5939553 U JP S5939553U JP 13606082 U JP13606082 U JP 13606082U JP 13606082 U JP13606082 U JP 13606082U JP S5939553 U JPS5939553 U JP S5939553U
Authority
JP
Japan
Prior art keywords
section
deck
receiver
display
same display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13606082U
Other languages
Japanese (ja)
Inventor
岡橋　庄一郎
Original Assignee
松下電器産業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電器産業株式会社 filed Critical 松下電器産業株式会社
Priority to JP13606082U priority Critical patent/JPS5939553U/en
Publication of JPS5939553U publication Critical patent/JPS5939553U/en
Pending legal-status Critical Current

Links

Landscapes

  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示し、第１薗はデツキ付受信
機の回路ブロック図、第２図は表示器の正面図、第３図
は表示素子の正面図、第４図は表示の具体例を示す説明
図である。 １・・・チューナ部、２・・・デツキ部、３・・・表示
部、４・・・マイクロコンピュータ、５・・・表示器、
６ａ〜６ｆ−・・表示素子、８３〜５ｇ・・・セグメン
ト。The drawings show one embodiment of the present invention, the first drawing is a circuit block diagram of a receiver with a deck, the second drawing is a front view of the display, the third drawing is a front view of the display element, and the fourth drawing is a diagram of the display. FIG. 3 is an explanatory diagram showing a specific example. DESCRIPTION OF SYMBOLS 1... Tuner part, 2... Deck part, 3... Display part, 4... Microcomputer, 5... Display unit,
6a-6f--display element, 83-5g...segment.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ロジック方式のデツキ部と、ＰＬＬ・シンセサイザ一方
式のチューナ部と、受信周波数、電界強度、出力レベル
、録音レベル、及びテープカウントの５つの主要表示を
同一の表示器でかつ同一の表示素子を用いて時間的に互
いに異ならせて表示する表示部と、これらデツキ部とチ
ューナ部と表示部とを制御する１個のマイクロコンピュ
ータとを備えたデツキ付受信機。The logic deck section, the PLL/synthesizer one-way tuner section, and the five main displays of receiving frequency, electric field strength, output level, recording level, and tape count are displayed on the same display and using the same display element. A receiver with a deck includes a display section that displays signals temporally different from each other, and one microcomputer that controls the deck section, tuner section, and display section.
JP13606082U 1982-09-07 1982-09-07 Receiver with deck Pending JPS5939553U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13606082U JPS5939553U (en) 1982-09-07 1982-09-07 Receiver with deck

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13606082U JPS5939553U (en) 1982-09-07 1982-09-07 Receiver with deck

Publications (1)

Publication Number Publication Date
JPS5939553U true JPS5939553U (en) 1984-03-13

Family

ID=30306038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13606082U Pending JPS5939553U (en) 1982-09-07 1982-09-07 Receiver with deck

Country Status (1)

Country Link
JP (1) JPS5939553U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261227A (en) * 1984-06-08 1985-12-24 Fujitsu Ten Ltd Audio equipment
JPH03130631U (en) * 1990-04-16 1991-12-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261227A (en) * 1984-06-08 1985-12-24 Fujitsu Ten Ltd Audio equipment
JPH03130631U (en) * 1990-04-16 1991-12-27

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