JPS5939119A - Monostable multivibrator - Google Patents

Abstract

PURPOSE:To attain a monostable multivibrator with high speed, by connecting a diode in parallel between the base and emitter of an inverter transistor (TR) of a bistable multivibrator. CONSTITUTION:Diodes D6-D9 are connected respectively in parallel between the base and emitter of the inverter TRs Q1-Q4 of the bistable multivibrator and the D6 and the Q1, the D7 and the Q2, the D8 and the Q3 and the D9 and the D4 are formed respectively as the current mirror coupling. In impressing a trigger pulse to a terminal T3, the same current flows to the D9 and the Q4, a potential at a point (b) is nearly at a ground potential, a TRQ7 is turned off, a capacitor Ct is charged with a resistor Rt, the current to the Q2, the Q7 is zero and the potential at a point (a) goes to a high level. When the potential at the Ct reaches a comparison voltage VREF of a voltage comparison circuit comprising TRs Q8, Q9, a current of a TRQ10 flows to the D5, the TRQ11 turns on, a current flows to the D6 and the Q1, the potential at the point (a) reaches nearly the ground potential, the current to the Q3 and the D7 is zero, and the potential at the point (b) is increased rapidly to turn on the TRs Q12, Q7 so as to discharge rapidly the charge of the Ct. Since the Q1-Q4 are unsaturated because of the D6-D9, high speed is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a monostable multivibrator, and more particularly to a monostable multivibrator that has high performance, good stability, and is suitable for integration.

Conventional configurations and their problems For example, electronic devices that require high-performance and stable pulse signals, such as horizontal synchronization signal processing circuits in television receivers, use monostable devices equipped with stabilizing means. A multivibrator is used. The circuit configuration in Figure 1 is
This is one of the conventional examples of this type of monostable multivibrator. Looking at the operation of the monostable multivibrator with this configuration, the diode D1. The operating current is defined by D2 and resistor R1, and transistors 01 to Q6 and diodes D3D4
The bistable multivibrator circuit-coupled with
Alternatively, one of Q3 is turned on and the other is turned off, resulting in stable condition.

Now, if we consider the case where transistor Q2 is turned on, all the current of transistor Q5, which is a current source, flows through transistor Q2, and the output voltage appearing at terminal T1 is equal to the collector-emitter voltage (vC) of transistor Q2.
EO). Therefore, the other transistor Q
The base current to the transistor Q3 is not supplied, the transistor Q3 is turned off, and the current of the current source transistor Q6 is supplied to the base of the transistor Q2 through the diode D4, and the transistor Q2 continues to be in the ON state. . As a result, each inverter transistor Q2. of the bistable multivibrator. The collector potential of Q3, that is, the voltage at both output points indicated by a and b, is approximately I'0'' at point a.
Volt, point b is the base-emitter voltage (VBE) of transistor Q2 and the forward voltage (VD) of diode D4.
The voltage becomes the sum of the voltage (vBE+2vBE in VD). Therefore, transistor Q7 coupled to point b has resistance R
Since the base current is supplied through 2 and turns on, the base voltage of the transistor Q connected to this increases and the collector-emitter voltage of the transistor Q7 (vC
EO), and the transistor Q8 is turned off.

At this time, the voltage terminal of the capacitor Ct of the charging/discharging circuit consisting of Ct and Rt, which is provided between the power supply voltage vcc and the ground point, is connected to the collector of the transistor Q7 and the base of the transistor Q8. The charge on capacitor Ct is discharged. On the other hand, in the differential pair consisting of transistors Q8 and Q9, a comparison voltage (vREF), which is divided by 70% from the power supply voltage vcc by the resistance ratio of resistors R4R6, is applied to the base of transistor Q9, so that voltage comparison is possible. When the transistor Q8 is off, the transistor Q9 is on and supplies a constant current to the current source transistor Q1o. In this case, since the transistor Q8 is off, a current flows through the diode D5. Therefore, the transistor Q11 coupled to this diode D5 is also turned off, and the transistor Q11 is also turned off.
, 1, there is no base current to the transistor Q1 that would be supplied through the transistor Q1, and the transistor Q1 is stable in the on state.

Next, when the power supply voltage vcc is applied, the transistor Q3
When turned on, as can be seen from the circuit operation explained above, the collector potentials of both inverter transistors Q2 and Q3 of the bistable multivibrator are:
Point a is high, point b is approximately +on volts, and the operating states of transistors Q2 and Q3 determined by this are off and on, respectively. As a result, transistor Q7 is turned off, and transistor Q7 is turned off.

The voltage at the terminal point T2 of the capacitor Ct, which provides the collector voltage of the transistor Q8 and the base voltage of the transistor Q8, increases sequentially with time due to the charging characteristic according to the time constants of Ct and Rt. When the voltage at terminal T2 becomes higher than the comparison voltage (vREF) applied to the base of transistor Q9, transistor Q8. The operating state of Q9 is reversed,
The current of current source transistor Q1o is now provided through diode D5 and transistor Q8. When current flows through diode D5, transistor Q,1 becomes conductive, thereby turning on transistor Q1. As a result, the voltage at point a decreases, transistor Q3 turns off, and the potential at point b increases, causing transistor Q3 to turn off.
7 becomes conductive, the charge on the capacitor at is rapidly discharged, and based on this, the differential pair transistors Q8 . The operation of Q9 is restored to its original state, and the state in which transistor Q1 of the inverter is off, transistor Q2 is on, and transistor Q3 is off, ie, returns to the above-mentioned stable state.

By the way, looking at the operation of the circuit shown in FIG. 1 when the trigger pulse shown in FIG. 2 (a) is applied to the transistor Q4 through the resistor R3 and the terminal T3, for example, during the period of the trigger pulse t1, Transistor Q4 is turned on and transistor Q2 is turned off. Also, at the same time as this operation, transistor Q7 is turned off, and terminal T2
The potential starts to rise due to the charging characteristics of the capacitor Ct. A time chart of each point on the circuit during this period is shown in FIG. 2, and the trigger pulse t to the terminal T3 shown in FIG.
1, point a (voltage at terminal T1), point b, and terminal T
The voltage at each point of 2 responds as (b), (/→ and ni). Then, the voltage at terminal T2 is a predetermined voltage.

In other words, when the comparison voltage (VREF) applied to transistor Q9 becomes higher, transistors Q8 and Q9
The voltage comparator is inverted, transistor Q8 is turned on, and a current is generated in diode D6. This causes the base current of transistor Q1 to be supplied from transistor Q,1, and transistor Q1 is turned on. As a result, the voltage at point a, that is, the voltage at terminal T1, drops rapidly, turning off transistor Q3. In the waveform of FIG. 2, during the period IJI indicated by t3, the voltage of the capacitor Ct is the comparison voltage (
vREF), and the charging circuit (Ct,
Rt). When transistor Q3 is turned off and transistor Q4 is also turned off, current from current source transistor Q is supplied to the base of transistor Q7 through resistor R2, turning on transistor Q7 and rapidly discharging the charge on capacitor Ct. Thus, the circuit state becomes the initial stable state again.

Next, considering the case where the trigger input to the terminal T3 is a pulse having a period t2 which is longer than the period t3, the transistor Q4 is on during the period t2, but the voltage at the terminal T2 becomes high and the comparator JE( VREF), the differential pair of transistors Q8 . Since Q9 performs an inverting operation and current flows to the diode D6 side, it provides base current to the transistor Q1 through the transistor Q1 during the period t4-12-13, so in this case as well, the terminal T
The output waveform of No. 1 is fixed to the period t3, as shown in FIG. 2 (b). Note that terminal T4. in the circuit diagram. T5
are for the high voltage side and low voltage side or grounding of the power supply vccO, respectively, and when integrated into an integrated circuit, T.

~T6 becomes an external terminal.

The monostable multivibrator shown in FIG. 1 performs the basic operation as explained above in detail.
Q3. A large amount of base current flows into the base of Q4, and these valley transistors perform saturation switching operation, so when the transistor changes from on to off, the effect of carrier accumulation in the base region of each transistor becomes significant. Become. Therefore, the actual timing diagram including the carrier accumulation effect in the base region is shown in Figure 3 (
(a) to), and a "delay" of ts1ts2 occurs compared to (a) to) in Fig. 2. Figure 3 (b)
tsl and t82 in (c) are respectively transistors Q2. Q3 is the carrier accumulation time that occurs when changing from on to off. The circuit operation is 13>>tSl, tS2
In the case of low-speed operation where
Since 'S2 depends on the base current, the base width of the transistor, etc., it becomes a disadvantageous factor regarding power supply fluctuations, temperature characteristics, variations, etc. of the circuit, and this becomes a major problem in circuit performance.

OBJECTS OF THE INVENTION The present invention solves the problems of the conventional structure described above, and provides a monostable multivibrator capable of high-speed operation.

Structure of the Invention To summarize, the present invention connects a diode in parallel between the base and emitter of an inverter transistor of a bistable multivibrator that receives a trigger pulse as input, and a charging/discharging circuit is formed using the output of the bistable multivibrator. The monostable multivibrator is configured such that the charging/discharging circuit is coupled to a voltage or current comparator, and an inverted signal of the voltage or current comparator resets the bistable multivibrator. In the configuration of the present invention, all the inverter transistors of the bistable multipipe rake respond in a non-saturated manner, so there is no carrier accumulation effect in the base region, and the monostable multivibrator operates at high speed and stability.

DESCRIPTION OF EMBODIMENTS FIG. 4 shows an embodiment of the present invention. In this embodiment, the base and
Insert diodes D6, D7, D8, and D9 between the emitters, and connect them to each transistor,
Current mirror join is used. In this fourth illustrated circuit,
When a trigger pulse having a peak value vT arrives at the trigger input terminal T3, the voltage waveform at each point is similar to that of the conventional example shown in FIG. 2, although there are slight differences in level.

In other words, the current ■T generated in the diode D9 by the trigger pulse input with the peak value vT is IT-(vT-vB
E)/R3. If the common emitter current amplification factor of the NPN transistor is sufficiently high, then the collector current of transistor Q4 will increase. 4 is equal to the current T of diode D9, and still the collector current Ic6 of transistor Q6
Also, since 1c6-'C4, the potential at point b becomes almost the ground potential, and therefore the transistor Q12
The base current cannot be supplied to the transistor Q7 via the transistor Q7, and the transistor Q7 is turned off. On the other hand, since the potential at point b is low, no current flows to the path consisting of diode D4, resistor R, and diode D7, and the collector current IC2 of transistor Q, which is current-mirror coupled with diode D7, is also IC2=0. Potential at point d,
That is, the voltage at the output terminal T2 is maintained at a high level. Note that until the input pulse to the terminal T3 arrives, the diodes D4 . A current flows through the path to the resistor 6 and the diode D7,
A collector current IC2 of the transistor Q2 is also flowing.

As mentioned above, when the trigger pulse arrives at the input terminal T3, the collector current 'C2 of the transistor Q2 suddenly becomes zero, but there is no current flow in the collector of the transistor Q2.

Even when 2 is flowing, since diode D and transistor Q2 have a current mirror configuration, no current flows to the base of transistor Q2, so the potential at point a is . 2VD at the moment of 2-0 (
The forward voltage of diode D3 increases to 8),
A delay period ts1 as shown in FIG. 3(b) does not occur. Furthermore, when the collector current 'Cts of the current source transistor Q5 flows through the diode L3 and D8, the collector current Ic3 of the transistor Q3 also becomes IC3=Ic5 through the current mirror combination of the diode D8 and the transistor Q3, and thus, Also, the potential at point b is maintained at approximately the ground potential. Capacitor C
1. In the charging circuit consisting of the resistor Rt, the terminal voltage of the capacitor Ct, that is, the voltage of the terminal T2, starts to rise depending on the time constants Ct and Rt, and this causes the differential pair transistor Q8. Comparison voltage (vREF) of voltage comparator consisting of Q9
When the current source transistor Q1 is reached, the collector current of the current source transistor Q1 is inverted so as to flow through the diode D5, and as a result, the transistor Q11 becomes conductive, and this collector current flows through the diode D6, and the collector current flows between the diode D6 and the transistor Q1. A collector current Ic1 is generated in the transistor Q1 by current mirror coupling. At this time, I
By setting c1-Ic5, the voltage at point a becomes almost the potential of the ground point, and the diode D3. The current of transistor Q3 becomes zero, and the current of transistor Q3 suddenly becomes zero, causing the voltage at point b to rise. Therefore, also at this time,
Carrier accumulation time tS2 as shown in FIG. 3 (W)
There will be no delay.

The operation of the circuit according to the embodiment of the present invention has been described above in comparison with the conventional example, and the operating conditions of this embodiment can be summarized as follows.

C1: IC2: IC5 ■C3=IC4=C6 In the example shown in Fig. 4, the common emitter current amplification factor h of the NPN transistor and PNPF E (N) The common emitter current amplification factor hFE (P) of the transistor is completely infinite. , the common base current amplification factor a of the NPN transistor
If (N) is set to 1, the above operating conditions are achievable, but in reality, both hFE(N) and FE(P) are finite values, and αCN)<1. Therefore, from these realities, the current flowing through resistor R1 is I. Then, I.C.
1 to Ic6, lo, IT.

hFE(N), 'FE(P), hFE(P)
, a(N)", respectively. Although it may not satisfy the ideal operating conditions, these can be solved by adding resistors to the cathodes of diodes D6 to D9 and the emitters of transistors 01 to Q4, ~
By adjusting the current of IC4, it can be set within a sufficiently practical range.

In addition, in the example, a voltage comparator was used to detect changes in the charge/discharge circuit from the capacitor terminal voltage, but the circuit is configured using a current comparator that detects and compares current changes in the charge/discharge circuit. It is also possible to do so.

Effects of the Invention As described in detail above, according to the monostable multivibrator of the present invention, the inverter transistors of the bistable multivibrator each operate with non-saturated switching characteristics, so that each transistor is not affected by the carrier accumulation effect. Therefore, it has sufficient responsiveness even for high-speed operation and is highly reliable. Furthermore, since the diode added to the circuit structure can be formed in the normal manufacturing process of bipolar transistors, there is no problem in integrating the circuit, and the manufacturing suitability is sufficient and it is practical.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional monostable multivibrator.
Figures 2 (A) to (F) and Figure 3 (A) to (F) are timing charts for explaining the operation of the same monostable multivibrator, and Figure 4 is a monostable embodiment of the monostable multivibrator. It is a circuit diagram of a multivibrator. Dl ~ D9 ... Diode, Ql ~ Q1
2...Transistor, R1-R...Resistor, T1-5/T5...Terminal, C1...Capacitor,
Rt...Resistance, Voc...Power supply, CI
ND...Ground (point).

Claims (3)

[Claims] (1) Connecting a diode in parallel between the base and emitter of an inverter transistor of a bistable multivibrator that receives a trigger pulse as input, and switching a charging/discharging circuit using the output of the bistable multivibrator,
A monostable multivibrator, wherein the charging/discharging circuit is coupled to a voltage or current comparator, and an inverted signal of the voltage or current comparator resets the bistable multivibrator. (2) The monostable multivibrator according to claim 1, wherein the inverter transistor and the diode of the bistable multivibrator form a current mirror coupling. (3) The monostable multivibrator according to claim 1, wherein the collector of each inverter transistor of the bistable multivibrator is connected to a constant current source.