JPS5937732A - Switch signal detecting circuit - Google Patents

Abstract

PURPOSE:To detect pieces of on-information on lock type changeover switches of a chain circuit by comparing opening/closing timing between switch signals of the chain circuit and operating a latch circuit when they coincide with each other. CONSTITUTION:Outputs 208-211 of a key encoder 202 which inputs signals of the chain circuit including the switches 200, 201- are led to the latch 206, whose output is sent to a gate 207. The outputs of the latch 206 and encoder 202 are inputted 217 and 218 to the comparator 216, respectively. Then, a signal 215 having a level ''H'' when the comparison result shows coincidence or a level ''L'' when not is sent to the clear terminal 214 of a counter circuit 204. The circuit 204 clears its counted value when receiving the ''H''-level signal at a terminal 214 or counts clock pulses 213 through an NOR gate 203 while receiving the ''L''-level signal; when the counted value attains to a specific value, a pulse is sent to the latch 206 through an inverter 205 to operate the latch 206.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to logic circuits, and more particularly to a signal detection circuit for a chain circuit using a lock type switch or the like. Here, a chain circuit using a lock type switch, etc. includes a plurality of single-pole double-throw changeover switches, and one break contact of this changeover switch and the common contact of the adjacent changeover switch are connected in series in a chain. , refers to a circuit configured so that each changeover switch can be locked in the on state.

[Description of prior art]

Conventionally, when a switch detection circuit is provided in a chain circuit of lock type switches, a circuit is used in which the tip of the chain circuit is connected to the clear terminal 114 of the counter 104 as shown in FIG.

Now, if switch 100 is closed, clear terminal 1
14 is disconnected from the ground and becomes %HI, becoming 4L.
The counter 104 counts the clock pulses of the terminal 113, and after a certain timing period has elapsed to remove the chuck ring, the counter 104 outputs the clock pulse to the latch 106 via the inverter 105.
Outputs a latch pulse to.

As a result, the latch 106 latches the switch 1000 ON information represented by 108 to 111. This situation is shown in FIG. 2 by ia.

Generally, the lock-type switches that make up the chain circuit are block-type and have a mechanical release mechanism to prevent double-pressing.

That is, when the switch 101 is pressed down while the switch 100 is pressed down and locked, the switch 10
0 is unlocked and restored, and switch 1
01 is locked. At this time, as shown in Figure 2, if the switch 100 recovers faster than the switch 101 locks, the clear terminal 114 of the counter can instantaneously detect off information, so that the latch 106 is activated. Output and launch the on information of the newly pressed switch.

However, as shown by the broken line C in FIG. 2, if the recovery of the switch 100 is delayed after the depression of the switch 101, the counter 104 will not be activated because the off information will not appear on the clear terminal 114. , unable to detect information about the newly pressed switch.

In this way, in conventional circuits, depending on the timing of the operation between the switch that is pushed down and the switch that is restored,
It has the disadvantage that information regarding a closed switch cannot be detected. In other words, since the release mechanism of the connected switches is mechanical, the operation timing of the switches is not uniform and is irregular, and the conventional circuit cannot ensure reliable switch detection operation.

[Purpose of the invention]

The object and purpose of the present invention is to provide a switch signal detection circuit that can prevent detection errors due to a difference in opening/closing timing between switches in a chain of locking switches, which has been a drawback of conventional circuits. It's about doing.

[Key points of the invention]

The present invention is a circuit that detects switch-on information in a chain circuit of locking switches, in which the output of a key encoder that encodes the on-information of the currently closed switch and the closed switch stored in the latch circuit are used. If they match, it is determined that there is no change in the opening and closing of the switch, and if it is different, it is determined that there has been a change in the opening and closing of the switch, the counter is activated, and a new switch is installed after chatter is removed. 14 to take in information! j
It is a sign.

[Explanation based on examples]

Hereinafter, the present invention will be explained based on the drawings.

FIG. 3 is a circuit diagram of a circuit according to an embodiment of the present invention.

In the figure, a chain circuit is formed including switches 200, 201, etc., and this chain circuit is connected to a key encoder 2 (+2). This key encoder 202 encodes and outputs the ON information of the switches 200, 201, etc. It is a circuit.

Outputs 208 to 211 of kill encoder 202 are latch 2
06, and the output of this launch 206 is game)
Guided to 207. The output of this latch 206 and the output of the key encoder 202 are respectively input to 217.
, 218 to the comparator 21G. Comparator 216
outputs a 'H' level signal when the comparison results of the inputs 217 and 218 match, and outputs a 1L level signal when they do not match.
This circuit outputs a level signal, and this output is led to the clear terminal 214 of the counter 204.

By receiving the 'Hl level signal at the clear terminal of the counter 204, the count value is cleared, and the %'L I
While receiving the level 'kJ', the clock pulses 213 input through the NOR gate 203 are counted, and when the count value reaches a certain value (that is, after a certain period of time), the clock pulses are input to the 205 to the activation timing input of the latch 206.

Next, the operation of the above embodiment 11.1 will be explained.

If the switch 200 is now closed, the key encoder 202 outputs its ON information to outputs 208-211. The comparator 216 compares the ON information 218 of the currently closed switch 200 with the previous switch information, that is, the information 217 that all switches are OFF.

Check out the comparison results! It was decided that it would be R, and J.J.R. was disappointed in the performance 2
]5 outputs the %LJ level. Also, suppose that chuck ring occurs in the switch 200.

Comparison #11; The result also repeats the 'L level and 1■' level in synchronization with the chuck ring. Therefore, the counter 20
4 is the clear terminal 21 while chatter is occurring.
4% Ii # Receives level signal, so 11
It is 1. Chatter ends, counter 20
4 is set and counts the clock pulse 213. After a certain period of time, the latch (+) is sent to the latch 206 via the innovator 205.

The broken line a in FIG. 4 shows each quadruple No. 1 waveform in the case of the above q9 production. Switch 20 in latch 2()6
00 ON information is taken in and stored, and this is output 1'. Here input 217 to comparator 215 and input 2
18, and the comparison result 215 is 'I (rubel), and the counter 204 is cleared. Therefore, this state continues until the next switch information changes. Eventually, a nil removal noise arrives at the terminal 212. control the gate 207 and read the switch information.

Next, as shown by the broken line in FIG.
000 Tawarada, or conversely, the recovery of the switch 200 is slow as shown by &J dashed line C. In either case, the counter 204 is activated after the chuck ring is removed, and after a certain period of time, the busy lunch is completed. 206
A latch pulse is output. Therefore, new switch information can be detected without any problem even in the case of the timing according to the broken line C, which is a drawback of the conventional circuit. In this way, reliable operation can be achieved by simply adding a comparator to the conventional circuit.

Although the example circuit is applied to a chain circuit of locking type switches, the present invention is not limited to this, and the present invention is applied to a non-locking type switch, in particular, to eliminate chattering in a detection circuit used for double pressing. The circuit is the best
It is ~.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to reliably detect the ON information of the changeover switch of the chain circuit, regardless of the operation timing of pressing down and restoring the changeover switch.

[Brief explanation of drawings]

Circuit diagram of the 1st 'J' example. The second M is a timing chart of the conventional operation of N+'i. FIG. 6 is a circuit diagram of an embodiment of the present invention. 41 ￥41 is the timing chart of 'u's operation in the 3rd figure history example episode 3, ioo, 1.01.200.2.01...Lock type switch, 102.202...Key encoder,
+03.203...NOR gate, 104.204.
...Counter, 105.205...Innovator, 1
(lfi,, 206...lap, 107.207...
- Gate, 216... Comparator. 1:a'1 Applicant: Nichito'lC company agent and patent attorney: Naotaka Izu

Claims (1)

[Claims] (1) A chain circuit in which the break contacts of a plurality of changeover switches and an adjacent common contact are connected in series; an encoder connected to this chain circuit to encode ON information of the changeover switches; In a switch signal detection circuit that includes a latch circuit that stores and outputs the output, and a counter that determines the timing at which this latch circuit operates, the output of the encoder is compared with the output of the latch circuit. 1. A switch signal detection circuit comprising: a circuit, wherein the counter is activated in response to an output of the comparison circuit.