JPS593602Y2 - Muting control signal generation circuit - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a muting control signal generation circuit, in particular,
The present invention relates to a muting control signal generation circuit for preventing click noises and pop sounds that occur when power is turned on or turned off in audio equipment.

In audio equipment, in order to prevent click or pop noises that occur when the power is turned on or off,
A muting circuit is provided to prevent acoustic output from being output for a certain period of time when the power is turned on and when the power is turned off.

The muting circuit is operated by a muting control signal from a muting control signal generation circuit.

Conventional muting control signal generation circuits have the disadvantage that the circuit configuration is complicated because separate circuits are provided to generate muting control signals when the power is turned on and when the power is turned off.

An object of the present invention is to provide a muting control signal generating circuit that can prevent click noises and pop sounds when power is turned on and off with a simple circuit configuration.

The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which a positive voltage element B is applied to a power line 2 of an amplifier 1 constituting an audio device via a power switch SW from a predetermined power source (not shown).
It is.

One end of the first capacitor C1 is connected to the power supply element B, and a resistor R1 is provided between the other end and the ground line, which is a reference potential point, to determine the time constant of the power supply from the power supply element B to the capacitor C1. This resistor R1 forms a charging path for the capacitor C1.

As a discharge path for the first capacitor C1, a reprint switch SW and a diode D□, which is a unidirectional switching element, are connected in series to both ends of the first capacitor C1.

This diode D is connected in the direction of discharging the charge of the capacitor C, so the power switch SW
By closing, both ends of capacitor -+2-c1 become substantially short-circuited.

Furthermore, a second capacitor C whose one end is connected to the ground line
A resistor R2 is provided between the other end and the power supply line 2 to determine the charging time constant of the capacitor C2 from the power source B, and this resistor R2 forms a charging path for the capacitor C2. That will happen.

As a discharge path for the second capacitor C2, a diode D2 which is a unidirectional switching element connected to both ends of the resistor R2, and a resistor R3 connected between the power supply line 2 and the ground line are provided. There is.

This diode D2 is connected in a direction to discharge the charge of the capacitor Q.

Furthermore, a PNP) transistor Q0 is provided, the emitter of which is connected to the other end of the first capacitor, the base of which is connected to the other end of the second capacitor, and the collector connected to a muting transistor via a resistor R4. Connected to the base of Q2.

The muting transistor is the output OUT of amplifier 1.
It is provided between the base line and the ground line, and conduction and non-conduction are controlled by the base human power to perform a muting effect.

The operation of this circuit will be explained with reference to FIG.

First, when the power switch SW is in the open state as shown in the first diagram, the first capacitor C1 is charged to the positive voltage terminal B by the power supply, and the second capacitor C2 is charged to the diode D.
2 and a discharge path formed by the resistor R3.

In such a state, the operation when the power is turned on is as shown in Figure 2a.
Explain using.

First, before the power switch SW is turned on and the switch is open, the capacitor C1 is charged in advance with the power supply voltage, so the voltage vA at the other end is at zero potential.

On the other hand, the capacitor C2 is not fully charged, so the voltage VB at the other end is pulled down to zero potential by the resistors R2 and R3.

Such initial conditions (■□=O9VBO at t = o)
When the power switch SW is turned on under this condition, a short circuit is formed between this switch SW and diode D1,
Since the charge in capacitor C1 is discharged almost instantaneously,
The voltage at the other terminal ■4 rises almost instantaneously to the power supply voltage terminal B as shown by the curve vA in Figure 2a, and thereafter both ends of the capacitor C□ are shorted by the short circuit between the switch SW and the diode D1 until the switch SW is opened. VA continues to be maintained at the power supply voltage B.

On the other hand, since the second capacitor C2 is charged via the power switch SW and the resistor R2, the voltage VB at the other end is the voltage VB between the resistor R2 and the capacitor C, as shown in curve 8 shown in Figure 2a.
2 and slowly rises to voltage element B with a charging time constant determined by 2.

Therefore, a forward bias is applied between the base and emitter of transistor Q1, and transistor Q1 is turned on.

This on state continues until time T1 when both military pressures A and VB become equal to PA+B, as shown in FIG. 2A.

Therefore, a current flows through the collector of the on-state transistor Q1, making the muting transistor Q2 conductive.

As a result, a predetermined period of time T from the time when the power switch SW is turned on.
Until □, the muting effect is performed and no output is produced at the output OUT of the amplifier.

Next, the operation when the power switch SW is opened to turn off the power will be explained using FIG. 2.

Before the switch SW is opened, the capacitor C1 is not fully charged as described above, and the capacitor C2 is charged by the power supply voltage terminal B, so the voltages at the other ends of these capacitors, VA and VB, are both the power supply voltage. Child B has become child B.

Such initial conditions (vA=10B at 1=0.

When the power switch SW is opened under VB=10B),
Since the short circuit of capacitor C1 is released, capacitor C
Charging by the power supply voltage begins with a charging time constant γ1 determined by the capacitance value of □ and the resistance R1 of the charging path.

Therefore, the voltage at the other end of the capacitor C1 drops toward zero potential as shown by the curve VA in FIG.

The charge on the second capacitor C2 is divided between the diode D2 and the resistor R.
It is discharged through a discharge path consisting of 3.

This discharge time constant is determined by the capacitance of the capacitor C2 and the resistor R3.

By setting the discharging time constant after the previous charging time constant walk to a small value, a voltage change curve as shown in FIG. 2 can be obtained.

Therefore, in this case as well, a forward bias is applied between the base and emitter of transistor Q, and transistor Q1 is turned on.

This on state continues until time T2 when both mold pressures VA and VB become equal to zero volts, as shown in the figure.

Therefore, a portion of the collector current of the transistor Q1, that is, the charging current from the power supply element B to the first capacitor C1 conducts the muting transistor Q2, thereby achieving the desired muting effect.

As described above, according to the muting control signal generation circuit of the present invention, the same transistor is operated both when the power is turned on and when the power is turned off, and the muting control signal is generated from its collector output. There is no need to provide separate control signal generation circuits for turning on and turning off, making it possible to perform a reliable muting operation with a simple configuration.

In the case of a negative power supply, it is obvious that the present invention can be easily applied by making the transistor Q□ an NPN type and changing the polarity of each diode accordingly.

Furthermore, in the case of a circuit that only needs to perform a muting operation when the power is turned off, the purpose can be distantly related by removing the capacitor C2 and diode D2 in FIG.

Furthermore, the transistor Q1 was used as a switching element to detect the terminal voltage difference between the funders C1 and C2.
It is clear that other elements that operate in response to the potential difference may also be used.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a diagram explaining the operation of the circuit shown in FIG. Explanation of symbols of main parts, C1, C2... Capacitor, R1, R2... Charging resistor, R3...
...discharge resistor, SW...power switch, Q
l, Q2...Transistor.

Claims (3)

[Scope of utility model registration request] (1) A first capacitor having one end connected to a power source, a second capacitor having one end connected to a reference potential point, and a second capacitor provided between the other end of the first capacitor and the reference potential point. a first charging path that determines a charging time constant of the first capacitor, a shorting means having a power switch and substantially shorting both ends of the first capacitor, and connected to the other end of the second capacitor. a second charging path defining a charging time constant for charging the second capacitor via the power switch, and a second charging path having a charging time constant less than a charging time constant of the first capacitor; The capacitor is characterized by comprising a discharge path for discharging the capacitor, and a switching element connected between the other ends of the first and second capacitors and generating a muting control signal according to the potential difference between the other ends. muting control signal generation circuit. (2) The short-circuiting means has a unidirectional element connected in series with the power switch at both ends of the first capacitor, and connects the series connection point of the power switch and the unidirectional element to the second The signal generating circuit according to claim 1, wherein the second charging path is provided between the other end of the capacitor and the other end of the capacitor. (3) The switching element is a transistor whose emitter and base are connected to the other ends of the first and second capacitors, respectively, and the muting control signal is derived from the collector output of the transistor. Scope of claims for utility model registration, paragraph (1) or (
2) The signal generation circuit described in section 2).