JPS5934653A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5934653A
JPS5934653A JP14590182A JP14590182A JPS5934653A JP S5934653 A JPS5934653 A JP S5934653A JP 14590182 A JP14590182 A JP 14590182A JP 14590182 A JP14590182 A JP 14590182A JP S5934653 A JPS5934653 A JP S5934653A
Authority
JP
Japan
Prior art keywords
films
resistance
diffusion layer
insulating
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14590182A
Other languages
Japanese (ja)
Inventor
Kenichi Hatasako
畑迫 健一
Hisao Yakushiji
薬師寺 久雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14590182A priority Critical patent/JPS5934653A/en
Publication of JPS5934653A publication Critical patent/JPS5934653A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body

Abstract

PURPOSE:To obtain the semiconductor device, in which a resistance region consisting of a conductor can be formed in a small area, by connecting the resistance region to an electrode body through an insulating resistance film formed through a plasma chemical vapor growth method. CONSTITUTION:The insulating resistance films 6 are brought to a plasma state by applying a strong electric field of a gas of silane, ammonia, nitrogen, etc. at a temperature of 300-400 deg.C, and vapor-grown to a P type diffusion layer 2 as Si3N4. According to the constitution, since the silicon nitride films 6 are not changed into complete insulating films and are formed in structure in which currents leak partialy, dielectric breakdown is not generated so far as sufficiently large voltage is applied, and the films 6 display approximately ohmic property. Consequently, the area of the diffusion layer 2 can be reduced to a half or less because one part of resistance value can be obtained by the films 6.

Description

【発明の詳細な説明】 この発明は導[層からガる抵抗領域を有する半導体装置
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having a resistive region extending from a conductive layer.

従来、この種の半導体装置として第1図に示すものがあ
った。同図において、(1)はN型導電体からなるシリ
コン基板、(2)はシリコン基板(1)に形成されたP
型拡散層、(3)はたとえば2酸化ケイ素からなる絶縁
膜、(4)は他の半導体装置あるいは外部と電気的に接
続する電極体で、たとえばアルミニウムからなるもので
ある。
Conventionally, there has been a semiconductor device of this type as shown in FIG. In the figure, (1) is a silicon substrate made of an N-type conductor, and (2) is a silicon substrate formed on the silicon substrate (1).
The type diffusion layer (3) is an insulating film made of, for example, silicon dioxide, and (4) is an electrode body electrically connected to other semiconductor devices or the outside, and is made of, for example, aluminum.

上記構成において、電極体(4) 、 (4)に電圧を
印加すると、電流がP型拡散層(2)を流れ、その電流
値と電圧値とは比例関係となシ、P型拡散層(2)は所
定の抵抗値を有する抵抗素子として動作する。
In the above configuration, when a voltage is applied to the electrode bodies (4), (4), a current flows through the P-type diffusion layer (2), and the current value and voltage value are in a proportional relationship. 2) operates as a resistance element having a predetermined resistance value.

また、第2図に示すように、抵抗素子としてポリシリコ
ン層(5)を形成しても、第1図の装置と同様に動作す
る。
Furthermore, as shown in FIG. 2, even if a polysilicon layer (5) is formed as a resistance element, the device operates in the same manner as the device shown in FIG. 1.

しかしながら、第1図および第2図の半導体装置では、
抵抗を大きくするには、P型拡散層(2)あるいはホリ
シリコン層(5)を長くしたり、あるいは面積を大きく
することが必要で、高集積化への支障となっていた。
However, in the semiconductor devices shown in FIGS. 1 and 2,
In order to increase the resistance, it is necessary to lengthen the P-type diffusion layer (2) or the polysilicon layer (5) or increase the area, which has been an obstacle to high integration.

上記欠点を解消するものとして第3図に示すものが試み
られた。同図において、(6)はP型拡散層(2)と電
極体(4)との間に形成された絶縁抵抗膜で、常圧化学
的気相成長法で作られたシリコン窒化膜からなるもので
ある。
The system shown in FIG. 3 was attempted to solve the above drawbacks. In the figure, (6) is an insulation resistance film formed between the P-type diffusion layer (2) and the electrode body (4), which is made of a silicon nitride film made by atmospheric pressure chemical vapor deposition. It is something.

この常圧化学的気相成長法は、たとえば、Si、N。This atmospheric pressure chemical vapor deposition method can be applied to, for example, Si, N.

を400°C〜800°Cの温度で熱分解などによシ気
相成長されるものである。
It is grown in a vapor phase by thermal decomposition or the like at a temperature of 400°C to 800°C.

上、記構酸、における抵抗特性は、完全な絶縁膜として
作用するため、第4図に示す電流−電圧特性のaで示す
関係となシ、所定値で絶縁破壊を起こし、オーミックス
性を示さないので抵抗素子として利用できないものであ
った。
The resistance characteristics of the above-mentioned structure acid act as a perfect insulating film, so the relationship shown by a in the current-voltage characteristics shown in Figure 4 is not the same, and dielectric breakdown occurs at a predetermined value, resulting in ohmic properties. Since it is not shown, it cannot be used as a resistance element.

この発明は上記事情に鑑みてなされたもので、抵抗領域
をプラズマ化学的気相成長法によ多形成された絶縁抵抗
膜を介して電極体に接続することによシ、導電体からな
る抵抗領域を小さい面積で形成できる半導体装置を提供
することを目的とする。
This invention has been made in view of the above circumstances, and it is possible to create a resistor made of a conductor by connecting a resistive region to an electrode body through an insulating resistive film formed by a plasma chemical vapor deposition method. An object of the present invention is to provide a semiconductor device in which a region can be formed with a small area.

以下、この発明の一実施例を図面にしたがって説明する
。第5図において、(6)は抵抗領域となるP型拡散層
と電極体(4)との間に形成されて、シリコン窒化膜あ
るいはシリコン酸化膜からなる絶縁抵抗膜で、プラズマ
化学的気相成長法によって形成されたものである。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 5, (6) is an insulating resistance film made of a silicon nitride film or a silicon oxide film, which is formed between the P-type diffusion layer serving as a resistance region and the electrode body (4). It is formed by a growth method.

このプラズマ化学的気相成長法は、たとえば、300°
〜400°Cの温度でSixNy、Hr (X 、 Y
 、 Z ld任意の数)の物質を強電MFを印加して
物質をプラズマ状態にし、Si、N、としてP!!型拡
散拡散層)に気相成長させることによシ行なわれる。
This plasma chemical vapor deposition method, for example,
SixNy, Hr (X, Y
, Zld (arbitrary number) is applied a strong electric MF to bring it into a plasma state, and as Si, N, and P! ! This is done by vapor phase growth on a type diffusion layer.

上記構成によれば、第4図に示すように、常圧化学的気
相成長法で形成した絶縁抵抗膜(6)では、aの曲線で
示すように、抵抗素子として利用できないが、プラズマ
化学的気相成長法によ多形成したシリコン窒化膜は、完
全な絶縁膜とはならず、電流が一部漏れる構造となるた
め、十分大きな電圧を印加しない限シ、絶縁破壊を起さ
ず、直線すで示すような電圧−電流との関係はは)Yオ
ーミックス性を示す。これはシリコン酸化膜においても
同様な関係を示す。
According to the above configuration, as shown in FIG. 4, the insulation resistance film (6) formed by atmospheric pressure chemical vapor deposition cannot be used as a resistance element, as shown by the curve a, but The silicon nitride film formed using the chemical vapor phase growth method is not a perfect insulating film and has a structure in which some current leaks, so unless a sufficiently large voltage is applied, dielectric breakdown will not occur. The relationship between voltage and current as shown by the straight line indicates Y-ohmic property. A similar relationship holds true for silicon oxide films.

したがって、上記絶縁抵抗M(6)によシ、抵抗値の一
部を得ることができるので、拡散層(6)の面積を半分
以下に低減できる。
Therefore, a part of the resistance value can be obtained from the insulation resistance M(6), so that the area of the diffusion layer (6) can be reduced to less than half.

また、絶縁抵抗膜(6)の膜厚を変えることによシ、広
範囲の抵抗値を得ることができる。この関係を第6図に
示す。第6図の電圧−電流特性において、c、d、eは
それぞれシリコン窒化膜の膜厚が100人、300人お
よび500人を示す。これから明らかなように、膜厚の
増大にしたがって抵抗値も増大するので、膜厚に応じた
抵抗値を得ることができる。
Further, by changing the thickness of the insulating resistance film (6), a wide range of resistance values can be obtained. This relationship is shown in FIG. In the voltage-current characteristics shown in FIG. 6, c, d, and e indicate the silicon nitride film thicknesses of 100, 300, and 500, respectively. As is clear from this, the resistance value also increases as the film thickness increases, so it is possible to obtain a resistance value that corresponds to the film thickness.

なお、上記実施例では、1層配線について示したが、こ
れに限らず第7図に示す2層配線、あるいは3層配線の
ような3次元的に絶縁抵抗膜(6)を形成することも容
易である。
In addition, although the above embodiment shows a single-layer wiring, the insulation resistance film (6) may be formed three-dimensionally, such as a two-layer wiring or a three-layer wiring as shown in FIG. 7, but is not limited to this. It's easy.

また、上記実施例では、抵抗領域としてP型拡散層の場
合について説明したが、N型拡散層あるいはポリシリコ
ン膜にも適用でき、上記実施例と同様の効果を奏する。
Further, in the above embodiments, the case where a P-type diffusion layer is used as the resistance region has been described, but the present invention can also be applied to an N-type diffusion layer or a polysilicon film, and the same effects as in the above embodiments can be obtained.

以上のように、この発明によれば、導電体からなる抵抗
領域を、プラズマ化学的気相成長法によ多形成した絶縁
抵抗膜を介して電極体に接続するととによシ、抵抗領域
の面積を低減できる半導体装置を提供することができる
As described above, according to the present invention, it is possible to connect a resistive region made of a conductor to an electrode body through an insulating resistive film formed by a plasma chemical vapor deposition method. A semiconductor device whose area can be reduced can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置を示す断面図、第2図は従来
装置の他例を示す断面図、第3図はさらに従来装置の他
例を示す断面図、第4図は半導体装置の電流−電圧特性
を示すグラフ、第5図はこの発明の一実施例による半導
体装置を示す断面図、第6図は絶縁抵抗膜と電流−電圧
特性の関係を示す図、第7図はこの発明の他の実施例を
示す断面図である。 (2)・・・抵抗領域(拡散層) 、(4)・・・電極
体、(6)・・・絶縁抵抗膜。 なお、図中、同一符号は同一または相当部分を示す。 代理人 葛野信−(外1名) 第1図 第2図 第3図 第4図 電圧(V) 第5図 第6図 O電圧(V) 第7図 手続補正書 (自発) 特許庁長官殿 1、事件の表示    特願昭  57−1459o1
号2、発明の名利・ 半導体装置 3、補正をする者 代表者片山仁へ部 4、代理人 5、補正の対象 明細書の「発明の詳細な説明」の欄ならびに図面。 6、補正の内容 A9明細書: (1)第 1頁第19行目; 「電極体(14)、 (4) Jとあるのを「電極体(
4)」と訂正します。 (2)第 2頁第 8行目〜第 9行目;「したり、あ
るいは面積を大きく」とあるのを削除します。 (3)第2頁第14行目および第1θ行1」;「常圧化
学的」とあるのを「プラズマ化学的1」と訂正します。 (4) ft53頁第2行目および第4頁第8行11〜
第9行1」; 「オーミックス性」とあるのを「オーミック性」と訂正
します。 (55)第 3頁第17行目〜第18行目;r 5ix
NyHz(x、y、 zは任意の≠数)の物質を」とあ
るのを「シラン(SiH+)、アンモニア(N)13)
。 窒素(NL)などのガスを」と訂正します。 39図面;− (1)第4図のa、bを補正するために第4図を再提出
します。 以上 第41閃 電圧(V)
FIG. 1 is a sectional view showing a conventional semiconductor device, FIG. 2 is a sectional view showing another example of the conventional device, FIG. 3 is a sectional view showing another example of the conventional device, and FIG. 4 is a current flow diagram of the semiconductor device. - A graph showing voltage characteristics; FIG. 5 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention; FIG. 6 is a diagram showing the relationship between an insulation resistance film and current-voltage characteristics; FIG. FIG. 7 is a sectional view showing another embodiment. (2)...Resistance region (diffusion layer), (4)...Electrode body, (6)...Insulation resistance film. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Makoto Kuzuno (1 other person) Figure 1 Figure 2 Figure 3 Figure 4 Voltage (V) Figure 5 Figure 6 O voltage (V) Figure 7 Procedural amendment (voluntary) Mr. Commissioner of the Japan Patent Office 1.Indication of the incident Patent application Sho 57-1459o1
No. 2, Benefits of the invention/Semiconductor device 3. Representative Hitoshi Katayama of the person making the amendment Department 4, Agent 5, "Detailed description of the invention" section of the specification to be amended and drawings. 6. Contents of amendment A9 specification: (1) Page 1, line 19; “Electrode body (14), (4) J” has been changed to “electrode body (
4)”. (2) Page 2, lines 8 to 9; Delete "or increase the area." (3) Page 2, line 14 and 1θ line 1”; “Atmospheric pressure chemical” should be corrected to “Plasma chemical 1”. (4) ft page 53, line 2 and page 4, line 8, 11~
Line 9 1”; Correct “ohmic nature” to “ohmic nature”. (55) Page 3, lines 17 to 18; r 5ix
NyHz (x, y, z are any ≠ numbers)" is replaced with "silane (SiH+), ammonia (N)13)"
. "Gas such as nitrogen (NL)" is corrected. 39 Drawing; - (1) I will resubmit Figure 4 to correct a and b in Figure 4. Above 41st flash voltage (V)

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板内に設けられた導電層からなる抵抗領
域を、グヲズマ化学的気相成長法によシ形成された絶縁
抵抗膜を介して電極体に接続したことを特徴とする半導
体装置。
(1) A semiconductor device characterized in that a resistive region made of a conductive layer provided in a semiconductor substrate is connected to an electrode body through an insulating resistive film formed by Gwozma chemical vapor deposition method.
JP14590182A 1982-08-21 1982-08-21 Semiconductor device Pending JPS5934653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14590182A JPS5934653A (en) 1982-08-21 1982-08-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14590182A JPS5934653A (en) 1982-08-21 1982-08-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5934653A true JPS5934653A (en) 1984-02-25

Family

ID=15395674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14590182A Pending JPS5934653A (en) 1982-08-21 1982-08-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5934653A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0298964A (en) * 1988-10-05 1990-04-11 Nec Corp Semiconductor device
US5877095A (en) * 1994-09-30 1999-03-02 Nippondenso Co., Ltd. Method of fabricating a semiconductor device having a silicon nitride film made of silane, ammonia and nitrogen

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5679461A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Semiconductor system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5679461A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Semiconductor system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0298964A (en) * 1988-10-05 1990-04-11 Nec Corp Semiconductor device
US5877095A (en) * 1994-09-30 1999-03-02 Nippondenso Co., Ltd. Method of fabricating a semiconductor device having a silicon nitride film made of silane, ammonia and nitrogen

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