JPS5933941A - Telephone set on car - Google Patents

Abstract

PURPOSE:To prevent a wrong dialing, by storing a voice data of the name of a called party in advance, and outputting the name of the called party in voice through the dial operation. CONSTITUTION:Microphones MC1, MC2 are directed in the same direction, and arranged at a prescribed interval and a large output signal is obtained to the sound from the direction of a driver. This output signal is amplified and applied to an FM modulation circuit 95. The control unit is provided with a constant voltage power supply device 120, microcomputer 130, FSK modulation circuit 150, FSK demodulation circuit 160, FM demodulation circuit 170, telephone set TEL, radio communication device TRX, branch connection circuit 180, called party data storage means, voice output unit 200 including a voice synthesis means 200, amplifier AMP, speaker SP, and relays PL1, 2 and the like.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vehicle telephone device in which a vehicle is equipped with a telephone device, and dial input for the telephone IQ is performed using a dial key provided on a steering operation board near the steering wheel.

In a vehicle, the steering wheel is the closest to the driver, and it is also closest to the driver's hands, so in order to improve operability, an operation board equipped with key switches for controlling on-board equipment should be mounted on the steering wheel. It is preferable to install it in the center of the

However, because the steering mechanism that transmits wheel rotation to the steering shaft is complex, it is difficult to wire the signal cable that connects the operation board (steering operation board) installed in the center of the steering wheel and the fixed control unit. In order to facilitate this, it is necessary to further install a wiring pipe and/or a slip ring for connection on the steering mechanism in a manner that does not interfere with the operation of the steering mechanism, which reduces the space allocated to the steering mechanism. Due to the limited number of connections, these wirings are quite difficult.

Therefore, the present applicant proposed a method (Japanese Patent Application No. 132926/1983) in which a slip ring and a brush are used to connect the operation board and the fixed control unit, and power and signals are transmitted through the line. Proposed. According to this, the power supplied to the operation board and the large amount of information generated from the operation board can be transmitted without using many lines.

By the way, when a car is equipped with a telephone device, the telephone is generally placed in the center between the driver's seat and the passenger's seat so that the person in the passenger seat or the rear seat can also use the telephone. However, when a driver attempts to dial a telephone, he or she must hold the receiver with one hand and dial with the other hand, making it impossible to dial while driving the vehicle. Therefore, the present applicant proposed a steering operation board dial signal transmission method (patent application No. 1, 1983), in which a dial key was provided on the steering operation board near the steering wheel to facilitate the driver's dial operation.
No. 88723) was proposed. However, even when this is used, it is necessary to manually operate the dial while driving the vehicle, and it is easy to operate the dial incorrectly.

Misdialing the phone can cause trouble to the other party, so
After all, it is preferable to operate the dial while the vehicle is stopped.

The first object of the present invention is to provide an on-board telephone device that allows a driver to safely and error-free dial operations while driving the vehicle, and to provide an on-board telephone device that allows the driver to confirm the details of dial operations. The second object is to provide an on-board telephone device that allows you to talk without having to hold the handset.

In order to achieve the above object, in the present invention, a dial key is arranged on the operation board on the steering wheel, and a dial code corresponding to the key operation is applied to the telephone device, and data corresponding to the dial code is applied. ,
That is, it is provided with a destination data storage means for storing destination data and a voice synthesizing means, and outputs the destination data as voice in accordance with the dial code. That is, for example, if voice data of the name of the other party is registered in advance in the other party's data storage means, the name of the other party will be outputted as a voice by performing a dial operation. According to this, you can hear the person you are about to call, so when you use the dial keys.

The driver does not need to visually confirm which key to operate. Therefore, the 1-rover can safely dial a telephone device while driving a vehicle without disturbing the other party.

When the driver dials a telephone,
Since drivers operate the dials by hand, they often use speed dials that require fewer keystrokes. Therefore, in one preferred embodiment of the present invention, destination data registration tk and voice output are performed for speed dialing.

The data on the other party varies depending on the user, and it requires a huge amount of memory to store the data on the other party in advance in the data storage means to meet the needs of all users.
When audio data is provided for each character, the connections between characters in the output audio become unnatural, making it difficult to hear the audio.

In one aspect of the present invention, the destination data storage means is a non-volatile read/write memory, and an acoustic-to-electric conversion means such as a 71' crophone is provided to store the user's 7!1 as data and to store the destination data. Enable input into storage means.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 schematically shows the configuration R of one embodiment. This will be explained with reference to FIG. In this example, the steering wheel operation board includes a constant voltage power supply device 70 degrees, a microcomputer unit 80 which is a transmission control device. Key switch 90. Second
modulation circuit, that is, the FM modulation circuit 95. First modulation circuit or FSK modulation circuit 100. FSK demodulation circuit]
10° acoustic-to-electrical conversion means or microphone MCI
.

MC2, differential amplifier DFA and relay RL+.

Microphones MCI and MC2 are in the same direction (driver C
1 direction) at predetermined intervals,
Both output terminals are connected to different input terminals of the differential amplifier DFA. As a result, the difference between the sound applied to the microphone MCI and the sound applied to the microphone MC2 is calculated as DF.
Since it is amplified by A, a large output signal can be obtained with respect to the sound coming from the arrangement direction of 1MC1 and MC2, that is, from the direction of the driver.

In other words, the noise from the side is canceled out, and only the signal corresponding to the driver's voice is amplified to a high degree, and the FM modulation circuit 289
5.

In this embodiment, the control unit 1- on the vehicle main body side includes a constant voltage power supply device 120. Microcomputer unit l-1
, 30, FSK modulation circuit 150. FSK demodulation circuit] (3
0, FM demodulation circuit 170. Telephone 7U EL, mobile (wireless communication device GoRX for Ikuzunawara telephones.

Contact switching means, ie, branch connection circuit 180°, including destination data storage T-stage row and voice synthesis means? ! 7”
Output Unisol l-200, amplifier △MP, speaker S1]
, relays R1, R2, etc.

The output terminal of the FSK modulation circuit YRI OO, the input terminal of the FSK demodulation circuit 11O, and the output terminal of the FM modulation circuit 95 are connected to the slip ring SΔI, and the output terminal of the FSK modulation circuit 150 and the FSK demodulation circuit 160 are connected to the slip ring SΔI. The input terminal of the FN1 demodulation circuit 170 and the input terminal of the FN1 demodulation circuit 170 are three knob ring S
It is connected to Δ2. Slip rings SΔ1 and SA2 are electrically connected to each other via brushes BAI and BA2. Another transmission line, namely slip ring SBI, S+32 and printing T''-BIj1.,13
An on-vehicle battery is connected to B2 via an ignition key switch SW. Audio output unit l-20
0 is controlled by a microcomputer 130.

Fig. 2a shows the vicinity of the driver's seat of a vehicle equipped with the device shown in Fig. 1, and Fig. 2h shows the external appearance of the steering wheel section. This will be explained with reference to FIGS. 2a and 21. Telephone 2 (placed) to the left of the driver's seat 1-1
is installed, and a speaker SP is placed on its front blade. The center portion of the steering wheel 3 is provided with an operation panel floating above the steering wheel 3.

The operation panel has 12 key switches 0-9. * and #, horns on both sides, Inochi I-i S L, ) [S 2, clear key cr
-R, Go to Rye 1 (Aoki included) key WRT, Hold key H
○LD, call/off key CA L T-10F F
and Microbon MCL. MC2 is arranged below microphone MCI.

FIG. 2c shows a four-piece structure that connects the steering wheel 3 and the steering wheel' operation holder to the vehicle body.

This will be explained with reference to FIG. 2c. The support 1-38 is fixed to the support 41 and rotatably supports the gear 39. Gear 39 is attached to the handlebar (fixed to "C").
Steering wheel: 3 is connected to sabot 1-41. The support 1-41 rotatably supports gears 39 and 42. 43 has 113 members in a series having I# forces 43a and 431 with the same number of teeth at both ends,
It is rotatably supported by the sabot 1-711. The 1° striking wheels 43a and 43b have rJ teeth, 1! , 39 and 42. The steering operation board's pudding 1-group Fi44 and the jkuwa-saku panel 31 are rBBi.
12 is fixed. The a numbers of three gears and 42 are equal. With such a configuration, the operation panel 31 and the like do not rotate due to the rotation operation of the steering wheel. In this embodiment, when the steering wheel 3 is rotated, the steering shirts 1-/II and the steering shirts 1-40
is rotated to perform steering operation, but the gear 43
a and 431] and 39 and 42, the number of teeth is the same, so the support 41 and teeth J1F, 39 generated by the circular movement of the connecting member 43 due to the rotation of the sabot 1-41
relative movement amount (angle), and supports 1 to 4I and gear 4
Since the gear 39 is fixed and the gear 42 does not rotate relative to the gear 39, the operation panel 31 does not rotate even if the steering wheel 3 rotates. 45 is a disk fixed to the main body of the raw egg i, and metal slip rings SΔ2 and SB2 are formed concentrically on the surface facing the steering wheel 3. 46 is a disk fixed to the steering operation board, and metal slip rings SAI and SBI are formed concentrically on the surface on the gear 42 side. The steering wheel 3 has slip rings SA, 1, and S.
A2. Brushes BAI, 13Δ2, BBI and BB2 are fixed to opposing positions of SB1 and SB2, respectively. Brush BΔ1 and SA2 and brushes BBI and BB2
are electrically connected. each brush BΔ], r3A2
．． BB1 and BB2 are in contact with each opposing slip ring under the force of a compressed coil spring.

The steering S hull, SDI and steering operation board are connected with lead wires. The steering shaft 40 is grounded, and is electrically connected to the steering shirt 1 through the ground line of the steering operation board.

Figures 3a and 3b show the configuration of the electric circuit on the steering operation board. First, explanation will be given with reference to FIG. 3a. The key switch 90 is composed of a large number of switches 71 to 5 connected to the five output ports 1-P1 to P5 and the four six output ports 1-P6 to P9 of the 75 microcomputer 80 in a series. . The contacts of these switches are opened and closed by operating a predetermined portion of the operation panel 3J-.

[FSK modulation circuit] The input side of the FSK modulation circuit is connected to the three outputs of the computer 180, 1-P1. O, pH and I'l 121c are connected, and the output end is connected to slip ring SA+. The FSK modulation circuit 100 includes a counter COI, D type flip-flops Fl, F
2. Nando game t-N A ]~NΔ5. Inverter I
It is composed of NI to IN5.1-transistors Ql, 02, etc.

The FSK demodulation circuit 110 has an input terminal with a slip ring SA.
+, and the output end is connected to the microcomputer 80.
It is connected to input port PL3 of.

F S K demodulation port M 1 'L Oha, Sea L Mi7
+-t-IJ 7'/ S T1 (MC14583 manufactured by 1000-Rolla), counter CO2 (MC14018 manufactured by Moller 1-Roller), CO3, Nandoger I-N A 6
~Nha19. It is composed of inverters IN6 to IN22, etc. The FSK demodulation circuit 110 is divided into functions as follows:
STI, F3°F/l, F5. F6. Na3. NA7'
, waveform shaping/differentiation circuit consisting of IN6 to IN10, etc., F7
．． CO2, F8. NA8 to NAl6 and T N 1.
External human power priority circuit consisting of I to IN+7, F9. FI,
O.

NA17. A reference signal generation circuit consisting of IN13 and IN19, and FI I, FI2 . CO3゜NA+
8. It consists of a frequency discrimination circuit consisting of NA'+9 and lN2O to lN22.

Output capo-1-P of microcomputer 80 ], 4
A buzzer BZ is connected through an inverter, and a relay PI is connected to the output port hP15 through an inverter.
, I can sell 1 to 1 concubine and make a profit.

Referring to FIG. 3b, the above-mentioned relays 1 and 1.
One contact point f is connected to the power line from the slip ring 5I31, and the other contact point is connected to the constant voltage port r8RE2. RE3. It is connected to RE4 and RE5. The output terminal of the power supply circuit consisting of the three-terminal constant voltage circuit RE1 and the like and a capacitor is directly connected to the power supply line of the electric circuit shown in FIG. 3a. Note that RE3 is a switching type constant voltage circuit (CP4801), which generates a stable voltage of ±12V for the )yL calculating amplifier. Microphone M
c] and MC2 are connected to a differential amplifier DFA formed by a TiW operational amplifier. At the output end of the differential amplifier DFA.

Bypass filter I-(■
) Connect F. ) - The output terminal of IPF is a low-pass filter LPF configured using an operational amplifier.
Connect it. The output signal of the low-pass filter LPF is amplified by the amplifier AMP and applied to the input terminal Audjo in of the FM modulator FM M via a capacitor. A predetermined DC bias voltage is applied to the input terminal Audio in of the FMM through a variable resistor VRl.

The variable resistors VR and I are used to set the center frequency of the FM modulated wave. The FM modulator FMM is made of one integrated circuit, and the FM modulation circuit 95 is composed of the FMM and electric coils, capacitors, resistors, etc. connected to each terminal of the FMM. The output terminal C of the FM modulator FIVIT is
It is connected to the slip ring SAI via a capacitor.

Figures 4a, 4b and 4c show the electrical circuitry of the device on the main body side. First, referring to FIG. 4a, the microcomputer 30 has Fs r<modulation circuit ↑5
0 and FSK demodulation circuit j'8160 are connected. F
The output end of the S K modulation circuit 150 and the input end of the F S K demodulation circuit 160 are connected to the slip ring S A 2. The configurations of FSK modulation circuit 150 and FSK demodulation circuit 160 are the same as those of FSK modulation circuit 100 and FSK demodulation circuit 110, respectively.

This will be explained with reference to FIG. 4b. The constant voltage power supply circuit 120 is equipped with an electric coil CHC for stopping high-frequency waves.
One end is connected to di via the ignition key switch SW.
u,: to the battery, the other end is the slip ring SB2
One concubine is sold for a pound.

The input end of the F M 1M tone circuit 170 is a slip ring S.
It is connected to A2. The FM demodulation circuit 170 includes a ceramic filter CFT and an annual bond circuit FM for demodulating the FM signal.
D, a low frequency amplifier AMl, etc. The power supply for the FM demodulation port yB I 7' O is relay RL 2-1.
7j point. The output end of the FM demodulation circuit 170 is connected to the contact point 1/R,7. speaker S
The amplifier A M l] connected to the clipper CLP'
, α (frequency width'; Ig A N'+ 2 and the power amplifier PA have no rim. The power amplifier PA has an output of 1-
Lanceless (OTL) configuration. amplifier AM
The input end of P is connected to one contact of relay R2. The output terminal of amplifier ΔM2 and the input terminal of power amplifier 11A are connected through one contact of relay R7. V
GI is a voice synthesis board included in the voice volume controller 200. The voice synthesis board VGI is a unit 1- that outputs voices of numerical values 0 to 9, and the address line, SD line, and BUSY line of VG are connected to the microcomputer 130. Voice synthesis board VG
I's audio (i1N output terminal OU'r is connected to the input terminal of the power amplifier PA via the contacts of relays R8 and R7. A plurality of bauds 1 to DB of the microcomputer 130 are connected to the voice synthesis board In addition to the VGI address line, a circuit shown in FIG. 4c is connected.

The other board 1- of the microcomputer 130 has a branch connection circuit 180 . A transistor that controls the horn drive relay R6, a transistor that drives the relay R7, a transistor that drives the range relay R8, and a buzzer B.
Connect the inverter that drives Z. The branch connection circuit 180 includes telephones TEL, , and mobiles TR.
X, the IBM demodulation circuit 170 and the amplifier AMP are connected. In the block of telephone 1゛E■, DI is the dial code output terminal, CP is the 1200 baud clock pulse output terminal, l]S is the power on/off control input terminal, C
I is the restriction instruction signal (rOJ: call allowed, rN: call disabled) input end, I-1r (key hook signal (on-hook/off-hook) output end), 'r is the transmitting audio signal output end, I is the receiving audio signal input end, l) OW is the power supply end. In the mobile station TRX, IIK+ and HK2 are both hook signal input terminals. The branch connection circuit 180 is equipped with relays R1, R2, R3 (111, 2), R4 and R5, which are connected to the mital computer 1.
Controlled by 30.

This will be explained with reference to FIG. FIG. 4C shows the electrical circuits of the audio output units 1 to 200 excluding the audio synthesis board VGI. To explain the general mB IfN configuration of the circuit in FIG. 4C, the integrated circuit VG2. Audio memory RA Ml, dial code memory RAM 2, voltage detection circuit VDIE, 8 pins 1
- analog/digital converter ΔDC, serial in-parallel out 1- type shift 1 - amplifier AM including register SRI, timing circuit TM, low-pass filter
3. It consists of a counter C04, a decoder DEI, a latch LAI, etc.

The dial code memory RAM2 is composed of two CMO8-RAMs with a 256×4 pin i-configuration. The address line of dial code memory RAM2 is latch LA.
The input end of the latch LAI is connected to the port DB of the microcomputer 130. The dial code memory RAM2 stores speed dial numbers at predetermined addresses.

The analog signal input terminal VIN of the analog-to-digital signal converter ADC is connected to the FM demodulation circuit 1 via the contact of relay R7.
It is connected to the output end of 70. The 8-bit output terminal of the ADC is connected to the input terminal of the shift register SRI.
The serial signal output terminal Q8 of RI is connected to the input terminal ADSI of the integrated circuit VG2. A minute/combination input terminal for selecting the voice analysis/speech synthesis function of the integrated circuit VG2 is connected to the output port of the microcomputer 130. VG2
The audio signal output terminal DAOU is connected to the amplifier AM3. It is connected to the input end of power amplifier PA via relays R8 and R7.

One unit of the audio memory RΔM1 is composed of eight 4-bit CM OS-RAMs, etc.

The data line of RAMI has a 4-pin configuration and is connected to the data lines Do to /D3 of the integrated circuit VC2. The address lines of each memory chip are all connected in common, and the output terminals Q1 to Q1 of the counter c04
It is connected to 2. The upper four memory chips and the lower four memory chips are connected to the output terminal Q13 of the counter CO4.
is selected. In the drawing, only one unit of audio memory RAMI is shown, but in reality, a total of 16 units of audio memory are provided. Each audio memory unit is connected to a respective output 5o-8I5 of the decoder I)El. Therefore, the input terminal D of the decoder DEI ~D
In response to a signal applied to the audio memory chip I
- One of the RAMIs is selected.

The audio memory unit 71'' RAMI and the dial code memory RAM 2 are constantly supplied with power from a constant voltage power supply or a battery built into the device, so that the memory contents do not disappear.

The voltage detection circuit VI) inhibits chip select 1- of the dial code memory RAM 2 when the power supply voltage is lower than a predetermined value, and prevents erroneous writing.

The microcomputer 130 is reset to prevent malfunction.

The timing circuit TM applies a predetermined timing pulse to the analog-to-digital converter ADC, shift 1 register SRI, and integrated circuit VG2 in synchronization with the tarock pulse etc. from the microcomputer 30.

In the voice analysis mode 1-, the focal product circuit VG2 has an input terminal At
)ADI by analyzing the serial data applied to Sr.
)C:Stores the audio data encoded using the M (adaptive differential pulse code modulation) method into a predetermined audio memory RAMI,
In the voice synthesis mode, encoded voice data is sequentially read out from the voice memory RAM1, an analog voice signal is synthesized based on the data, and it is sent to the output terminal 1).
Output to UT.

The approximate 111+'5 operation of the FSK modulation circuit 1.00 (+50 is also the same) will be described with reference to FIG. 3a. A constant period (T/'l) pulse signal is applied to the input end of the FSK modulation circuit 100 from the output capo of the microcombicoater 80. The counter COI divides the frequency of this pulse and generates a pulse signal with period T at output terminal 2 and a pulse signal with period 2 at output terminal 3.

The pulse signal with cycles 1...2 T is also applied to an r''SK demodulation circuit 110, which will be described later. This is the output terminal for data transmitted by the output port 1-1'I of the microcomputer 80. The flip-flop F1 synchronizes with the rising edge of a pulse signal with a period of 2T applied to the clock input terminal CLK, and outputs a level corresponding to the data from the port pH (high level H for data rLJ, data ``0''). The low level L) is output to the output terminal Q. Therefore, if the data is "1", the output terminal Q of F1 becomes I-1,
Nandoge-1-NΔ via Nandoga-1-N A I
A pulse signal of T period from COI Q2 appears at the output terminal of 3, and when the data is "0", the output terminal Q of Fl becomes L, and the NAND gate NA is output via NAND gate NA2. , 2T from Q3 of C0,1 to the output end of 3
A periodic pulse signal appears. microcomputer 8
0 output capo-1-1) 12 outputs a signal for controlling permission/prohibition of output of the FSK signal to the transmission path. Bow 1-
When F12 is at high level H, COI output period 2
In synchronization with the pulse of 'F, the output terminal Q of the flip-flop F2 becomes high level [-1]. As a result, K-h N
A4, NA5 are opened, and the 1' or 2T period signal from the output terminal of NA3 is transmitted to NA4. INS, and IN4. are applied to the 1-transistors Ql and Q2 via NA5, respectively. At the rising edge or falling edge of the signal, either the l-transistor Q1 or Q2 is turned on, charging and discharging the charge in the capacitor CI. As a result, pulse-like signals of positive polarity and negative polarity are generated in slip ring SAI at the rise and fall of the pulse signal. When port P12 is at low level L, the Q of F2 becomes L, gates NΔ4 and NA5 are closed, and low level L and high level 1■ are applied to transistors Q1 and Q2, respectively. In this state, both 1-transistors Q1 and Q2 are off,
No signal is output to slip ring SΔ1.

FIG. 5a shows a timing diagram of the FSK frequency-specific circuits shown in FIGS. 3a and 4a. The operation of this circuit will now be described with reference to FIG. 5a.

The microcomputer novo-1-P], 0 to (7)]/4'r same-period clock pulses are always applied to the clock input terminals CK of the free counter 11 and the counter C3. [7SK from outside
The signal is the J input terminal of l711, the flip-flop F]2
is applied to the clock input terminal, etc. of In this embodiment, the FSK signal is set so that when the data is "1" (high level H), the period is 1', and when the data is "0" (low level I-), the period is 2'F. be. In the initial state f, the counter C3 is reset to 1-. F
When the S K signal arrives and the J input terminal of Fil becomes high 1, the Fil
The Q output terminal of F1 is set to H, and the Q output terminal of Fll is set to L. As a result, the counter CO3 is released and the counter CO34 starts counting the clock ('r/4). If the FSK signal has the same period as i', the FSK signal becomes I-1 after the counter CO3 has cycled through O, l, 2°3, and the counter C3 is reset again. At the same time, flip flop F
I2 outputs the level at the input end, that is, H, to the output end Q.
- Therefore, at the output end of F i 2, a high level () corresponding to the data "1" is output as a demodulated output signal.If the FSK signal has a period of 2T, the counter CO
3 is 01 1! 2+ 3+ 415 and Karan 1-shi,
In callan i-5, a reset signal is applied to the clip-flop Fil via NAND game-1 to NA19 and inverter IN'22. Fil is thereby reseller 1-, and the output terminal Q is set to L and the output terminal Q is set to FI. As a result, the counter CO3 is reset to 1. Then, when the FSK signal becomes high level 1, the flip-flop F1.2 sends the output level L of Fil to the output terminal Q, that is, the demodulation output terminal, to the cellar 1. Therefore, when a predetermined FSK signal is applied, this circuit demodulates the signal and outputs data.

However, if noise similar to the '1' period FSK signal is applied to the frequency discriminator circuit, the Q of flip-flop F5 is set to 11 in response to the noise, and the demodulated output signal is high. Level 1 is output 4. If no signal or noise is applied after that, the Q output terminal of the flip-flop FI2 remains set to the high level 11. If this state continues for a predetermined period of time or more, the microcomputer 80 (or 130) connected to the demodulation circuit determines that data has arrived and erroneously starts reading the take. In this embodiment, a reference signal generation circuit and an external input priority circuit are provided to prevent this.

FIG. 5b shows the operation timing of the reference signal generation circuit.

This will be explained with reference to FIG. 5b. The tarok pulse of '/4 period from P1-P1O is sent to the control flop F.
9. F.1. is applied to the clock input terminal CK of the FSK modulation circuit 100 (or 150).
A pulse signal with a period of 2T, whose frequency is divided by 8, is applied to the J input terminal of F9, etc. Flip flop F9. The FIO etc. operate as a differentiating circuit, and a reference equal sign having a pulse width (period of high level I-1) of T/4 and a period of 2'1' is obtained at the output end of the inverter IN19. Since this reference signal has a period less than 2, when it is applied to the frequency discrimination circuit, the 1 frequency discrimination circuit discriminates this signal as data "0" and sets the demodulated output signal to a low level L.

FIG. 5c shows the operation timing of the external input priority circuit.

This will be explained with reference to FIG. 5c. The FSK signal from the waveform shaping/differentiation circuit (the signal output from NA7) is applied to the inverters IN ], O and the Nant gate NA8. The output signal of inverter lNl0 is applied to clip-flop F7. F8 and the NAND gate NA13L:Y are applied, and the output signal from the NAND gate NA13L:Y is applied to the reset input terminal R of the counter CO2. counter C
○2 and the clock input terminal C of the flip-flop 177
A clock pulse of T/4 period is applied to K.

When the FSK signal is applied to the external input priority circuit and the input terminal of the inverter IN10 becomes a low level L, the flip-flop F7 is activated in synchronization with the go/4 period 1'' tuta pulse.
The output terminals Q and Q of
- to be done. Signals from output terminals Q and Q of F7 are applied to NAND game-1-NAI4 and NA15, respectively. NAND GAME-1-NΔI-4, N A l 5 and NA] 6 is a circuit for selecting a signal, and depending on the state of the output terminal and the point of the Norinob flop F7, the FSK signal or the reference signal generation circuit is selected. selectively applies the reference signal from the frequency Jr to the frequency Jr circuit. When the Q of the flip-flop F7 is set to I-1, the FSK signal from the inverter INt7 is applied to the frequency discrimination circuit. Then, the reset of counter CO2 is released and CO2 starts counting the clock.

When the period of the FSK signal is T, the counter CO2 is 0.
, i, 2.3, the next Fs i<
Due to the change in the state of the signal, the signal changes from 1 to 5 again, and then 0.
], 2.3. When the period of the FSK signal is 2T, after the flip-flop F7 is set to 1~, the counter CO2 is 0, 1, 2 degrees, 3.4 degrees, 5.6 degrees.
is counted and reset.

In other words, when there is an FSK signal, regardless of whether the period of the FSK signal is T or 2T, the reset signal ■] is not applied to the reset input terminal R of the flip-flop F7, so F7 outputs the output terminals Q and Each point I4
and held in the L state. In this state, a high level H is output to the output terminal Q of the flip-flop F8 at a predetermined timing, so that the FSK signal input to the inverter 1Nl0 is transmitted to the Nant gate 1 through the Nant gate NA13 and the inverter TN17. - applied to NAl4. Here, a high level H is applied to the other input terminal of the Nant gate NΔ14, so the FSK signal is NAl
4 and NAl6 to the frequency discrimination circuit. Also, at this time, the input terminals of NAND game 1-NA15 are at low level L.

The reference signal from the reference signal generation circuit is output from NAl5.

173 When the K signal is no longer applied, the counter CO2
In this case, the reset with Karan l-G will no longer be applied,
The counter CO2 is O, ], 2, 3.4° 5.6, 7,
Continue with 8.9 and Callan 1-. CO2 value ranges from 1 to 9. In other words, when 3T has passed from the start of counting, the NANT game 1-N A 9 and the inverter I N 16
input terminal R to reseller 1 of flip-flop F7 via
A high level (reset 1-level) H is applied to F7, and F7 is reset. As a result, the output terminals Q and I of the flip-flop F7 are inverted to - and -, respectively. When the Q of F7 becomes 1-th, a reset signal is applied to the counter CO2. This reset signal is then applied to the inverter lN1o at a low level L, and the Q of F7 is changed to I.
, and continues until it is set again. When the output terminal of the flip-flop F7 and its level are inverted, the NAND game l-NA14 is closed and NAL5 is opened instead,
The reference signal from the inverter IN19 is
It is applied to the frequency discrimination circuit via NA16.

FIG. 6 shows a schematic signal waveform of the entire device.

Referring to FIG. 6, a case will be described in which signals are sent from the steering operation board shown in FIGS. 3a and 3b to the devices shown in FIGS. 4a and 4b. As mentioned above, the output port 1-P of the microcomputer 80
12 E high level 1] and a tarok pulse of 'F/4 period to F)10, the output port P1 is output.
When the level I-I or L is set according to the data to be transmitted to 1, a pulse signal with a cycle of T or 2, that is, an FSK signal, is generated at the output end of the inverter INS, etc., depending on the level, and as a result, When the FSK signal rises and falls, positive and negative polarity signals are generated in the transmission path including the slip ring SA1.

On the other hand, when audio is input to the microphones MCI and MC2, the audio signal is amplified by the differential amplifier DFA, passes through the bypass filter HPF, the low-pass filter LPF, and the amplifier ΔMP, and is sent to the audio in the FM modulator FMM.
applied to, 1 s. As a result, a relatively small-amplitude sine wave signal frequency-modulated by the audio signal appears at the output end of the FM modulation circuit 95, and this signal is applied to the transmission path including the slip ring SΔ1 via the capacitor.

Therefore, No. 1a, in which the FSK signal and the sinusoidal FM signal modulated by the audio signal are superimposed, appears on the transmission path. This signal is applied to a device on the vehicle body via slip ring SA2.

The signal is FSK demodulation +! 4160.

The FSK demodulation circuit 160 converts the signal into a simulator 1-
1 Helica ST1 extracts only the positive polarity pulse and negative polarity pulse components in a binary manner and converts them into FSK signals, and then converts the FSK signals to data rlJ or "0" depending on the period of the FSK signal. The demodulated data is applied to the input capo-1-PI3 of the microcomputer 130.

On the other hand, the signal from the transmission path is applied to the FM demodulation circuit 170. The FM demodulation circuit 170 includes a ceramic filter CF.
Only the FM modulation signal is taken out at T and applied to the integrated circuit FMD for FM demodulation.

The FMD demodulates the original audio signal from the FM modulated wave and applies the audio signal to the amplifier AMI.

FIG. 7 shows FSK modulation circuits 100 and 150 of the embodiment.
shows the structure of the signals applied by microcomputers 80 and 130. To explain with reference to FIG. 7, the signal is the first 10-bit mark signal (high level: rl
J), followed by a 1-bit start bit, 8-bit data, and an 8-bit BCC code. In the 8-bit data, bits 0 to 4 indicate the type of key, pins 1 to 5 indicate key on/off (“1” on, “0” off), and bits 6 and 7 indicate the key type. Indicates a group of In this example, the group of keys is
A is indicated by "00", B is indicated by roz, and "10
” It is divided into three groups C. Referring to FIG. 2b, key group A includes numeric keys (0
~9), #, *.

Clear key CLR and hold key HOL D, key group ■3 is horn key (Sl and ll5
2, and the key group C is the lie 1 key W R1'' and the call /71 key - CA, LL, / OFF
It is.

FIG. 8 schematically shows the operation of the device when making a call from a car telephone from the steering operation board, the operation of the device when making a reception operation, and the operation of registering speed dial and voice data of the other party. This will be explained with reference to FIG.

Input the destination phone number on the steering wheel operation board.
Enter using the numeric keys, * and #. The microcomputer will now memorize the keyed telephone number. When any of the numerical keys 0 to 9 is operated during this manual operation of each key, the microcomputer 130
instructs the voice synthesis board VG+ to output audio, and the speaker SP outputs “4” and “3” depending on the operated key.
..., etc. A sound corresponding to each numerical value is output.

Also, if you have performed the "registration" operation in advance.

When the dial key input is completed, the name of the other party corresponding to the input dial key is announced by voice.

Wait for the call-off key CAL L 10F F to be pressed.

When the call-off keys CALL10F, F are operated, the other party having the stored telephone number is automatically called.

When the called party picks up the receiver (off-hook), hands-free communication becomes possible.

Note that if you operate the hold key 110 LD here,
Relay I5 is activated, and the microphones MCI and MC2 on the microphones, ie, the steering wheel, are cut off from the mobile device TRX, and no sound is transmitted from the vehicle.

When the call-off keys CAT and L/○FF are operated again, it is determined that the call has ended, and the communication is terminated.

Receiving operation When the other party calls the on-board telephone, a ring tone sounds.

Wait until the call-off key CALL10FF is operated.

When the call-off key CALL/OF is operated, the state is the same as lifting the handset of the telephone receiver 7i, and the voice of the other party is output from the speaker SP, and the microphone of the steering control board 1-1- is output. MCI and L
The iC2 is connected to the telephone on 11F using the handset.

When the call 21 key - CALLloFF is operated again, it is determined that the call has ended, and the communication is terminated.

If, ft! motion Phase 1 Wait for Rye 1 to key W RT to be operated.

\Enter the phone number of the person you want to record using the numeric keys.

The buzzer sounds for J-Shin Ishizon.

Phase 2 Enter the speed dial value for Brisera 1.

At this time, each time a key is pressed manually, a numerical value associated with the key is output as a voice.

Lie 1 Hekey W Wait for RT to be operated.

Phase 3 A buzzer sounds for confirmation.

Steering operation board" second microphone MC1,...
Enter the name of the person you wish to register into the MG2 by voice.

For confirmation, the phone number, speed dial number, name, etc. of the person to be registered are sequentially output in voice.

Check whether it is OK to register using the output content. If you need to make any corrections, return to Phase 1.

Figures 9a and 9b illustrate the operation of the steering operation board of Figures 3a and 3b.

The operation of each step of the steering operation board will be described with reference to FIGS. 9A and 9B.

The contents of the Sl memory are set as initial values, and the states of each output capo-1 of the microcomputer 80 are set to initial levels. With this process, the output port P12 is at a low level L.
, and the output of the FSK signal is prohibited.

S2 Key reading signal output capo-1-i.e. PI~P5
Set the data to be output to the initial value. This initial data is stored in bits aro' (
In other words, set the low level 1-) to the other pins 1 to ``IJ
(ie, high level H). In this example, the initial cell number 1- corresponds to port P1.
・ is "0", Po1~I〕2゜L)3. P4 and []
The bit corresponding to 5 is set to "1".

S3 Output to predetermined data ports 1-P1 to P5. From this [;, Po 1-P] ~ Any Po j ~ of P5 is at low level I7, and the other boats are at high level ■1
bawl.

S4 Read the levels of the input ports PG to P9 connected to the column lines of the key 1-rix. Referring to FIG. 3a, six capos 1-P6 to P9 are pulled up to the power supply line Vcc through resistors, and output capos 1 to P[-
Since each key is connected in a 71-link pattern between I-]5 and the input capo-1-P6 to P9, for example, when key 0 of the key 1-rix 90 is pressed, the output capo-1- P
At the timing when the low level L is set to 1, the input port P6. P7. The levels of P8 and P9 are different,
H, l-1 and H.

S5 1 for each bit of the data read in step S4
Invert 10. In other words, take the complement.

S6 Enter the key reading data obtained in step S5 as a numerical value O
Compare with. If the value is 0, there is no key manpower, so the process goes to step S13, and if it is other than Ic, the process goes to step S7.

S7 -1i- Save (store) the read data in a predetermined memory.

S8: In order to eliminate the influence of mechanical vibration, that is, chattering, of the key contacts, wait a predetermined time (for example, Om5ec) necessary for the vibration to subside.

S9 Read the levels of Poe 1-P6 to P9 again.

The logical sum of the value read in SIO step S9 and the value Q((()) read in step S7 is calculated.

Sl+ Check whether the calculation result of step SIO is not 0. If it is not 0, it is assumed that there is no key manpower and the process proceeds to step S13. If so, the result is 312.
Proceed to.

SI2 The data [0] bit of the key reading line signal data output to output ports 1-P1 to P5 and ports 1-P6
~1] From the data read from 9, an 8-pitch 1- key code corresponding to the pressed key is generated.

S13 Shift the data "0" bit of the key reading line signal data output to output capo-hP]-P5 to the adjacent bit by one bit.

SI4 Check whether one key reading scan is completed. If not completed, the process returns to step S3.

L) I J Key Because there was no manpower, 8 pips 1-
The key code is code 00+1 (in hexadecimal).

S16 Load the key code from the previous key reading scan from the memory.

S17 Calculates the logical sum of the old key code loaded in step S16 and the new key code obtained in the current key reading scan for each pin.

S18 Check whether the calculation result is O. If O, that is, there is no key operation, the process returns to step S2; otherwise, the process proceeds to step S1.9.

S19 Store the newly generated key code in the memory at a predetermined address.

S20 Check whether the key code conforms to key group 8.

S21 Check whether the key is pressed or released. Group A keys, ie numeric keys.

*key, # key, clear key CLR hold key HOL
Since D is valid only when pressed, if the key is released, the process jumps to step S2.

S22 The buzzer sounds once to confirm the key force.

S23 Check whether the pressed key belongs to group B. Group B keys (horn keys)
I31 and H82 are valid both when pressed and when released.

S24 Sends the data of the generated key code to the transmission line, and 1) Notifies the device on the handle body side that there is a key input. This processing will be explained in detail later.

S25 In the data transmission of step S24, it is checked whether the data was sent correctly.

S, 26 Check whether the pressed key belongs to group C. Keys of group C, namely key 1 to lie 1 W RT and call-off key CΔL L /
Regarding OF lj', every time the key is depressed, data inverted between key on/off is transmitted.

S27 Memory or lmi), call-off key CΔLL1
Load data indicating the on/off state of 0FF.

828 From the key code and the data loaded in step S27, select the light key WRT or call-off key CΔ
L +,, / 01. A new key code with the on/off state of TF reversed is generated. For example, if the call-off key was turned on in the previous operation, key code data indicating that the call-off key is turned off is generated in the current key operation. - S29 Similar to step S24, S30 checks whether the data was sent correctly in the data transmission of step S29.

S31 Rye 1-key WRT or call-off key CA
The contents of the memory that records the on/off state of LL10FF are inverted.

5327. Depending on the state of the call-off key CΔLL10FF, the output of the microcomputer 80 is
], performs A on/off control of relays Rl and 1 connected to 5. As a result, the T''M modulation circuit 95 and the like are controlled.

S33 An error occurred in data transmission, so the buzzer B
Sound Z twice to notify the driver of the error occurrence.

S34 A key reading error occurred, so the buzzer
sounds three times to notify the driver that an error has occurred.

Figures 10a, 10b, 10c and 10d illustrate the operation of the device on the main body of the machine shown in Figures 4a and 41. Each operational step will be described with reference to FIGS. 10a, 10b, 10c and 10d.

S51) The contents of the memory are set as initial values, and the status of each output capo-1 of the microcomputer 130 is set to the initial level. Through this process, the output capo-1-1) 12 becomes a low level L, and the output of the FSK signal is prohibited.

352 Check whether the telephone G/L is off the hook.

S53 Telephone [i T' E L is off the hook, so output II to 20 to output capo-111, turn on relay R4, and output T1 to output capo-1 to I-I K I CI. and put 1. outputs L)-R,2 and R3 (RL2') are set off. Now you can use the telephone TEr in the same way as the telephone stand.

S54 Load the contents of the memory that stores the hands-free call instruction on the steering wheel operation board or I).

S55 Check whether hands-free calling is specified. In the initial state, hands-free calling is not specified, so the process proceeds to step S57, but when the call-off keys CAI, ■, /(')FF on the steering wheel operation board are set to on (CALL), hands-free calling starts. This is specified and the process advances to step 55G.

856 Output capo-1-Hi (output H to 20 to turn on relay R4, output capo-1-1-I K 10 to 11
output 14 to output capo 1sAudio, turn on relays R2 and R3 (RL2), and output 1 to output capo 1s Audio.
1-P Output L to S and turn on relay R1.
do.

Now, the power of the telephone device and the mobile device TRX is turned on, the power of the FM demodulation circuit 170 is turned on, and the power of the mobile device TRX is turned on.
An amplifier ΔLi +] is connected to the audio receiving line of J.

S57 Output r- to output port 1-1o LD to turn off relay R5, output ■7 to output port HK 20 to turn off relay R4, and output port-l-IIK 1
．． 0 to L, outputs L to output capo hAudjo to turn off relays R2 and R3 (RL2), and outputs II to output capo I-P S to turn off relay R1. do. Now phone 1' EL, , mobile device'■
” The power of the RX and FM demodulation circuit 170 is turned off, and the telephone set Er and the mobile terminal 'J'1 are connected.

358 Receive data from steering operation board. This will be explained in detail later.

S59 Determine whether data transmission generated by key operation on the steering operation board was sent from the steering wheel 91M operation board.

Sho It is determined whether the sent wo1-sho is the key code of group ha.

S61 It is determined whether the key code is a numeric key, 1: key, or # key.

S62 Determine whether the key code is bold key 1 (○LD).

S63 Determine whether the key code is clear key CL or R.

S64 Clear the address counter of the memory that stores the key code of the numeric key sent four days ago. In other words, f: cancels the manual input of the numerical keys.

S65 Determine whether the key code belongs to group B.

866 Key code is horn key 1-1s 1,
[-1s Determine whether it corresponds to 2.

S67 Key code is key switch on? S68
Since the horn key has been released, set the bow to off.

S69 Since the horn key was pressed, set the horn to on.

S70 Check whether the key code belongs to group C.

S71 Since the key code 1 received as data is not in any of groups A, B, or C, it is treated as a data reception error and the buzzer BZ sounds three times.

872 Load the contents of the memory that stores the Hashi 1-free call instruction from the steering operation board.

S73 Check whether the data loaded in S72 specifies hunt-free calling.

S74 Loads the contents of the memory that stores the instructions given by the bold key ■)○L I).

S75 Invert the data I10 (on/off) that was turned off in S74, and store the data in the original memory. Therefore, if there is no previous bold instruction, the predetermined number 1- of the data is set to "1", that is, the hold designation is set.

876 Check whether hole 1~ is specified.
-377 hole F Since Fff division was specified,
Output capo-1・II OL Output L to D and relay R5
Turn off Sera 1~. This moves the signal output end of the FM demodulation circuit 170 to the six transmit audio ends of fi'r RX]
The microphones MC1 and Mc2 above the steering wheel hole can be used to talk.

878 Hold was specified, so output capo-1-I
Output 11 to IOLD and turn on relay R5tyl. This disconnects the output end of the FM demodulation circuit 170 from the mobile device TRX.

S79 The key code for the numerical key has arrived, so the code is transferred to the BCD (+3in) corresponding to the numerical value of the numerical key.
ary Coded Decimal) code and stores it in memory at a predetermined address.

S80 Interprets the contents of the counter that specifies the memory address for storing the BCD code of the numeric key.
do.

5150 Turn on relay R3 and relay R7.

Power is supplied to the voice synthesis board VGI, and the signal output terminal OtJT of the voice synthesis board vG1 is connected to the input terminal of the power amplifier PA.

5151 Refer to the BCD-voice code address conversion table in the ROM and set the BC of the key obtained in step S79.
The address of the voice code to be output to the voice synthesis board VGI is generated from the D code.

5152 Sends the address obtained in step 5151 to the voice synthesis board VGI.

5153 Signal line BU from audio output board VGI
Check the SY level and wait until it is no longer 13 U SY (that is, voice output commands cannot be accepted).

5154 Set signal line SD to audio output command level. The audio output board VGI now reads the audio data corresponding to the specified address (τJ), converts it into an alarm log audio signal, and sends it to the output terminal OUT.
Output to.

5155 Turn off relay 1 (3) and relay R7 to turn off the power to the voice synthesis board VGI,
The input end of power amplifier PΔ is connected to the output end of amplifier ΔM2.

5I5 (li key The entry φt corresponding to the manually entered value
Load the code.

5I57 Check whether it is in phase 0 (ie, other than the registration operation phase).

5158 Relay T23. R7 and R8 are set on, power is supplied to each circuit, and the output terminal of amplifier ΔM3 is connected to the input terminal of power amplifier PΔ.

8159 Outputs the name of the other party corresponding to the registration code, which has been pre-written by MR, by voice. This will be explained in detail later.

8160 After finishing the audio output of the destination name, relays R3, R7, and R8 are turned off to cut off the power to each circuit.

8161 Check whether it is in phase l.

8162 Since it is Phase 1, the buzzer sounds for a predetermined period of time for confirmation.

8163 Since Phase 1 has ended, the current registration code is transferred to Phase 2.

5180 Check whether the key code corresponds to Rye 1 to Key WR"]"2.

5181 Since the light key WRT was operated, the specified registration code is loaded.

8182 Check whether it is in phase O.

5183 Key W RT was operated to go to Rye 1 in Phase 0, so enter the current registration code to Sera 1 and go to Phase 1.
Proceed to.

5I84 Check if it is phase 2.

5185 Since the lie 1-key WRT was operated in phase 2, proceed to phase 3. First, from the value of the other party that has been set to Sera 1, generate a save at Inos for Presera 1 dial data, save the Brisen 1 dial data to the address of the address (S1-A), and then Generate a memory address to register the audio data for.

5186 Turn on relays R3, R7 and R8
- L, supply power to each circuit, connect the output terminal of amplifier AM3 (i.e. the output terminal of the destination name audio signal) to the input terminal of power amplifier PΔ, and connect the output terminal of FM demodulation port VB+70. Connect to the input terminal VIN of the analog-to-digital signal converter A DC.

8187 The buzzer rings twice for confirmation.

5188 Enter the voice data such as the name of the other party and register
do. This will be explained in detail later.

5189 Turn off relay R8 and switch the voice signal output terminal OUT of the voice synthesis board VGI to the input terminal of the power amplifier PA.

5190. Audio outputs the speed dial value to be recorded. This will be explained in detail later.

SI9] Turn on relay R8 to switch and connect the output end of amplifier AM3 to the input end of power amplifier PA.

8192 Replays and outputs the manually input voice data of the other party for confirmation. I will explain this to the 1IYX state later.

SI9'3 Turn off relays R3, R7, and R8 to cut off power to each circuit.

8194 Clear the registration code.

S81 Check whether the key code received from the steering operation board indicates call-off, operation of keys CAL L', and 10FF.

S82 The key code is call-off key ON (OALL).
) Determine whether the condition is indicated.

S83 Since the call-off key is turned OFF once again, the contents of the memory storing the hands-free call designation are set to "0" (hands-free call canceled).

S84 Since the call-off key has been turned to CALL L, the content of the memory storing the hunt-free call designation is set to "1" (hand-free call designation).

S85 Check whether the handset of the telephone FI is removed from the telephone.

386 Output 1-1 to HK 20 to output capo-1, turn on relay R4'3, and output I- to output capo-1-11KIO.
I to 7-1-shi, output l-1 to output port 1-8, turn on relays R2 and R3 (Rr, 2),
Output 1 to the output capo 1-PS and turn on the relay R1.

As a result, the power source of the telephone (r=r-) and the mobile device TRX is turned on, and the power of the FM demodulation circuit 170 is turned on.
The amplification defect ΔMP is connected to the voice reception In line of the mobile unit TRX.

S87: Wait for the relay operating time and the time required for the mobile device to enter a predetermined operating state from power-on.

S88 Check whether the mobile device '1''RX is powered on.

889 Check whether the vehicle is in a position where it can communicate (whether radio waves can be received). This is determined by checking whether the output terminal CI of the TRX is at a level indicating that communication is possible.

S90 Since the vehicle is in a position where a failure has occurred or communication is not possible, the buzzer BZ sounds twice to notify the driver that an error has occurred.

S91: Set the contents of the memory that stores the hands-free call designation to "0" (hands-free call cancellation).

S92 4-pin I-BC of numerical value input with numerical key
Enter the contents of the memory that stores the D code using the numeric keypad (
The data is read from the address specified by the address counter) and loaded into a predetermined register.

S93 Convert the BCD code obtained in step S92 to the same code as the dial code generated by the telephone 'rEL.

S948 Motivation In synchronization with the pulse signal output from the CP terminal of TR and X, the dial code obtained in S93 is sequentially and
Output to I end.

S95 Increment the value of the numerical pointer once from 1 to 1.

S9'6 Check whether all BCD codes have been read from memory. This is determined by looking at the value of the numerical pointer. If not completed, the process returns to step S92 and reads the BcD code using the next numerical pointer.

The partner name voice recording subroutine of step 8188 will be explained.

S20] Generates the address of the voice memory from which storage is to be started from the input numerical value of the other party. This address is 1
This corresponds to which one of the 6 unit 1-audio memories R and M is selected.

5202 Output the data obtained in S20+ to the decoder DE. For example, if the data is 0, a memory selection signal is output to the output terminal So of the decoder DEI.

5203 Apply a signal to the min/sum input of integrated circuit VC2 to select the voice analysis function.

5204 Output JJ Set hP20 to a predetermined level and cancel each circuit setting.

5205 Integrated circuit V G 2 (7J output terminal V・CK
Wait until it reaches "1" (high level I-1).

8206 Wait for a predetermined period of time.

5207 Output write pulse to audio memory RAM1. The data that has been analyzed and encoded is now written to a predetermined location in the audio memory RAM 1.

8208 Check whether data has been written to all addresses of the selected voice memory.

5209 Wait for V-CK of integrated circuit VG2 to become "0".

5210 Baud 1- Set P 20 to reset level.

Step 5190 Priscella 1 ~ Damo Explain subroutines.

5221 Load the speed dial BCD code.

5222 Refer to the table and generate the address of numerical voice output data from the BCD code obtained in 5221'111.

5223 Outputs the multi-address data obtained in 5222 to the voice synthesis board VGI.

5224 Wait for the VGI BUS'Y line to reach the signal acceptance permission level.

5225 Sends the audio output signal to SD Learn.

8226 Increment the contents of the memory (pointer) that indicates the data read address to Precera 1.

5227 Brisef 1 - Checks the contents of the memory indicating the cheetah read address and checks whether reading of all data has been completed.

The partner name voice reproduction subroutine of step 5192 will be explained.

8241 Voice memory R from the manually entered numbers of the other party.
Data indicating which unit 1- of ΔM1 is selected is generated.

5242 The data obtained in S24'l is sent to decoder DE1.
Output to.

5243 Apply voice synthesis function selection No. 18 to the minute/sum input terminal of integrated circuit VG2.

5244 Set output capo-1-P 20 to reset I-s exclusion level.

5245 Reads all data from the specified audio memory RAMI and waits until output of the audio signal is finished.

3246 Set output capo-1-P 20 to the level of reseller 1-.

FIG. 11a shows details of the data transmission (transmission) operation of the microcomputer 80. The operation of each step will be explained with reference to Figure 1.1a.

S], 01 8 pino 1- for the data to be transmitted
CRC check character BCC is generated.

5102 Set a predetermined value to the power counter to limit the number of data transmissions.

3103 Set the output port P12 to 1-] so that the 2SK signal can be output, and each pin of the mark, star bit, transmission data, and BCC code
- Synchronize data with tarokku and output sequentially - I = P
l Set to 1.

Si20 output capo-1-P I 2 [7 to Sera 1-
The output of the 17S K signal is prohibited.

5105 Check whether there is data input from the other party's FSK modulation circuit. If there is no input, the process advances to step 5107.

8106 Check whether the data sent from the other party is an acknowledge ACKO indicating data reception confirmation. As will be explained later, when data is transmitted, the receiving side outputs an ACK O to the transmitting side.

5107 Decrement the value of the counter to 1 and determine whether the result is 0. 51 if not 0
Return to 03, and if it is 0, proceed to S+13.

5I08 Set 11 to output port P12 again so that the FSK signal can be output, and mark it.

The start pitches 1 to 1 and the acknowledge 8C1(] indicating confirmation of Δact<'o are continuously outputted in synchronization with the clock.

5109 Output capo-1-1) Set L to l2 to inhibit output of the FSK signal.

5110 Check whether the FSK (!) signal has come from the other side (receiving side).As will be explained later, when the receiving side receives an acknowledge ACKI from the transmitting side after outputting an acknowledge ACKO, it FSK signal will no longer be output, but if ACKI is not received, AC will start again.
Outputs FSK signal including KO. Therefore, the fact that the FSK signal comes from the receiving side means that the datum CK l from the transmitting side is not received by the receiving side.

Since the 5ill ACKI has not been received by the receiving side, the value of the limit counter is decremented once and it is checked whether the value is O or not. If it is not 0, the process returns to step 8106 and transmits CK1 again, and if it is 0, the process proceeds to step 5l13.

5112 Since the data transmission has been completed within the predetermined number of times after filling the counter with 7 readings, II Q K II is set in the transmission result code.

5IL3 Even after performing the data transmission the predetermined number of times set in the limit counter, data and acknowledgment ACK are not successfully transmitted, so "NG" is set as the transmission result code.

FIG. 11b shows details of the data receiving operation of the microcomputer 130. The operation of each step will be explained with reference to FIG. 111.

S121 Check whether the FSK signal has been received, that is, whether data has been input to the input port P13.

8122 Since data does not come to Capo-1-P 13, a code corresponding to no data reception is set in the data reception memory.

8123 Set a predetermined value to a limit counter that limits the number of data reception operations for one data transmission.

5124 CRC check character B from received data
Generate CC.

5125 Compare the BCC value of the received data and the BCC value generated in step 5124. If the two are equal, it is determined that the data has been received correctly and the process proceeds to step 8128; otherwise, the process proceeds to 8126.

5I26 Since an error has occurred, the limit counter is decremented once and checked to see if the result is 0. If not 0, return to 5127; if 0, return to 51
Proceed to step 34.

5127 There is data input, but I need to check. If there is received data, the process advances to 5124; otherwise, the process advances to 8126.

S 1.28 Since normal data has been received, set the output I-P 12 to enable the FSR< signal to be output, and set the mark, star 1 heavy 1- and acknowledge ACKO. Each bit is output continuously in synchronization with the clock.

5129 Output Capo-1~P12 with L as Sera 1~, F
Prohibits output of SK signal.

5130 Check if the FSK signal was received on the receiving side.

5131 Check whether the received data has an acknowledge ACKL from the transmitting side issued in response to an acknowledge ACK O from the receiving side. ACK 1
Then S ], go to 33, if it's not an elephant 11, if it's 51
Proceed to step 32.

5132 Decrement the contents of the limit counter once 1
~ and check whether the result is O. If not 0, return to S]28; if 0, proceed to S1.34.

5133 The data transmission was completed within the specified number of times in the limit counter, so the transmission result code is “”
o t< ” for seven strokes.

5I34 Even if the data is transmitted a predetermined number of times, data and acknowledgment ΔC1 (1) are not transmitted normally, so "NG" is set in the transmission result code.

In the above embodiment, the destination data storage means is a read/write memory 5, and the user can arbitrarily register the destination data by voice. Alternatively, a ROM may be used in which voice data is stored with phoneme combinations of approximately tB.

As described above, according to the present invention, since the name of the person to be called is announced in advance by voice, it is possible to eliminate the occurrence of a wrong call due to a key operation error or the like.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram of an on-board telephone device according to an embodiment of the present invention, FIG. Figure 2b is a front view of the steering wheel in Figure 2a, Figure 2c is a side sectional view showing the structure of the steering wheel in Figure 2a, and Figures 3a and 3b are the front view of the steering wheel in Figure 2a. Block diagrams showing the electric circuits provided on the operation board on the steering wheel of the device, Figures 4a, 4b, and 4 (Figure 3 shows the electric circuit provided on the vehicle body side of the device in Figure 1) The block diagram, Figures 5a, 5b, and 5C are the FS of Figure 1.
K demodulation circuit 110. Referring to timing chart 1 showing the operation of the IGO, FIG. 6 is a waveform diagram showing schematic signal waveforms of each part of the device in FIG. 1, and FIG.
A plan view showing the configuration of the data string of FS[0, FIG.
Flowchart 11 showing an outline of the operation of making a call, receiving a speech action, and registering an operation when making a telephone call using the device shown in the figure.
, FIGS. 9a and 9b are flowcharts 1-1 and 108 showing the operation of the microcomputer 80 in FIG. 1,
Figure 101), first flame (- figure and figure 10d are flowcharts showing the operation of the microcomputer 30 in Figure 1).
-I-1 Figure 1 La is a flowchart 1- showing the data transmission (transmission) operation of the microcomputer 80 in Figure 1.
5 is a flowchart showing the data receiving operation of the 11b computer +30. 1: Driving seat 1-2: Telephone (place) 3 Stairs cabinet 3j: Operation panel 38, 41: Support 1-39
, 42: Attachment jlf 4 C1: Steering shirt 1
to 43 = connection member 44 niblint board 70,
1.2 (1: Constant voltage power supply 80: Microcomputer (first control means) 90:
Key switch (switch means) 95: FM modulation circuit (second modulation means) 1 00:
FSK modulation circuit (first modulation means) 1 1 0: F
SK demodulation circuit 130: microcomputer (second control means) 15
0: FSK modulation circuit 160: FSK demodulation circuit (first demodulation means) 170: F
M demodulation circuit (second demodulation means) J80 nib branch connection circuit MC1. , MC2: Microphone (acoustic-electric conversion means) SA]. , SA2, SB 1, SB2 Nislip ring BAI, BA2, BB 1, BB2: Brush TR
X: Mobile device (mobile telephone device) DFA: Differential amplifier SP: Speaker RAMP: Voice memory (destination data storage means) VO2: Accumulation circuit (speech synthesis means) ADC: Analog-digital converter SRI: Shift register DEI: decoder COI,
CO2, CO3, CO4: Counter LAI: Latch RAM2: Dial code memory East 10d diagram

Claims (10)

[Claims] (1) A dial key switch, a hook key switch, and a first modulation means installed at or near the steering wheel. and a steering operation board comprising a first control means for applying a signal according to the operation of the key switch to the first modulation means; a first demodulation means for demodulating the signal from the first modulation means;
A destination data storage means for storing data associated with a mobile telephone device and a dial code. a voice synthesizing means that generates a voice according to data from the destination data storage means, and determining a key operation of the steering operation board from a signal demodulated by the first demodulating means;
A fixed control installed on the vehicle body side, comprising a second control means that generates a dial code and applies the dial code to the mobile telephone device, and also instructs the voice synthesis means to generate a voice corresponding to the dial code. and a signal transmission means i for coupling the steering operation board and the fixed control unit by at least one of electrical means, optical means and magnetic means. (2) The second control means instructs the voice synthesis means to generate a voice associated with the dial code when dial code 1 is a speed dial.
The on-board telephone device described in item 1). (3) The destination data storage means is a read/write memory,
The second control means generates data corresponding to the signal from the acoustic-electric conversion means in response to a predetermined switch operation,
The vehicle according to claim (1), which stores the data at a predetermined address of the destination data storage means.
Double IIi! i device. (4) The steering operation board includes at least one acousto-electric transducer and a second modulation means for modulating the signal from the acousto-electric transducer, and the fixed control unit modulates the signal from the acousto-electric transducer. The second demodulating means demodulates the signal, and the second controlling means generates data corresponding to the signal output from the second demodulating means in response to the signal from the first demodulating means and transmits the data to the other party. The on-board telephone device according to claim 3, wherein the on-vehicle telephone device stores the information in the destination data storage means. (5) The second control means applies the signal output from the second demodulation means to the mobile telephone device in response to the signal from the first demodulation means. car telephone device. (6) The vehicle telephone device according to claim (1), wherein the transmission means includes a slip ring and a brush in contact with the slip ring. (7) The on-board telephone device according to claim (6), wherein there are a plurality of slip rings and brushes, and the slip rings and brushes are formed concentrically around the steering operation shaft. (8) The output end of the first modulation means, the output end of the second modulation means, the input end of the first demodulation means and the input end of the second demodulation means are connected to the first set of slip links and brushes. 8. The vehicle telephone device as claimed in claim 7, wherein the upper battery is connected to a second set of slip rings and brushes. (9) The on-board telephone device according to claim (4), wherein the first modulation means is an FSK modulation circuit and the second modulation means is a frequency modulation circuit. (10) Claims (1), (2), and (3) above, wherein the steering operation board includes a third demodulating means, and the on-vehicle control device includes a third modulating means. , No. 4
), (5), (6), and (7). The on-board telephone device according to paragraph (8) or paragraph (9).