JPS5932892B2 - Wafer alignment method - Google Patents

Wafer alignment method

Info

Publication number
JPS5932892B2
JPS5932892B2 JP58157806A JP15780683A JPS5932892B2 JP S5932892 B2 JPS5932892 B2 JP S5932892B2 JP 58157806 A JP58157806 A JP 58157806A JP 15780683 A JP15780683 A JP 15780683A JP S5932892 B2 JPS5932892 B2 JP S5932892B2
Authority
JP
Japan
Prior art keywords
wafer
mask
air
mounting table
alignment method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58157806A
Other languages
Japanese (ja)
Other versions
JPS5980931A (en
Inventor
進 小森谷
清 吉田
弘 西塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58157806A priority Critical patent/JPS5932892B2/en
Publication of JPS5980931A publication Critical patent/JPS5980931A/en
Publication of JPS5932892B2 publication Critical patent/JPS5932892B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces

Description

【発明の詳細な説明】 本発明は半導体ウェーハに所定のパターンを有するマス
クを位置合せするためのウェーハ整合に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to wafer alignment for aligning a mask having a predetermined pattern to a semiconductor wafer.

この種のウェーハ整合においてはウェーハ載置台の上に
表面にホトレジスト膜を有する半導体ウェーハを載置し
、さらにこのウェーハ上に所定のパターンを有するマス
クを配置し、両者を密着してマスクのパターンをウェー
ハ上のホトレジスト層に焼付ける。
In this type of wafer alignment, a semiconductor wafer having a photoresist film on its surface is placed on a wafer mounting table, a mask with a predetermined pattern is placed on top of this wafer, and the two are brought into close contact to form a pattern on the mask. Bake onto the photoresist layer on the wafer.

この際、ウェーハとマスクの中間に存在する空気が部分
的に密封状態となつて、両者を所定の関係位置に保持し
つつ密封状態にするのに時間がかかり、また逆に、良好
に密着したマスクをウェーハから引離す場合、両者の間
に空気が入り込みにくいので、その引離しにも時間がか
かる。この引離しの困難さは特にクロム製マスクを使用
し、かつ真空密着方式とした場合において著しいもので
ある。本発明の目的は、ウェーハ載置台上に載置された
ウェーハとマスクとの密着およびその引離しの容易なウ
ェーハ整合方法を提供することにある。
At this time, the air that exists between the wafer and the mask becomes partially sealed, and it takes time to maintain the two in a predetermined position and create a seal. When separating the mask from the wafer, it takes time to separate the mask because it is difficult for air to enter between the two. This difficulty in separating is particularly remarkable when a chrome mask is used and a vacuum sealing method is used. An object of the present invention is to provide a wafer alignment method that allows a wafer placed on a wafer mounting table to be brought into close contact with a mask and to easily separate the wafer and the mask.

この目的を達成するため本発明によるウェーハ整合方法
は、中央部に空気吹出し口を有し、周辺部に空気吸込み
口を有するウェーハ載置台と、このウェーハ載置台上に
載置されたウェーハの上に配置されるマスクと、前記空
気吹出し口から空気を吹出させる手段と、前記空気吸込
み口から空気を吸込ませる手段とを準備し、前記ウェー
ハ載置台上に載置されたウェーハは、前記空気吹出し口
からの空気吹出し作用により中央部が盛上げられ、かつ
前記空気吸込み口からの空気吸込み作用により周辺部が
前記ウェーハ載置台上に吸着される。これにより前記ウ
ェーハそりを生じさせることにより、ウェーハとマスク
との相互の引離し(分離)作業は極めて容易になる。第
1図及び第2図において11は本発明の実施に供するウ
ェーハ載置台である。
In order to achieve this object, the wafer alignment method according to the present invention includes a wafer mounting table having an air outlet in the center and an air suction port in the periphery, and a wafer mounting table having an air outlet in the center and an air suction port in the periphery. A mask placed on the wafer mounting table, a means for blowing air from the air outlet, and a means for sucking air from the air suction port are prepared, and the wafer placed on the wafer mounting table is placed in the air outlet. The center portion is raised by the air blowing action from the opening, and the peripheral portion is attracted onto the wafer mounting table by the air suction action from the air suction port. By causing the wafer warpage, the mutual separation (separation) of the wafer and mask becomes extremely easy. In FIGS. 1 and 2, reference numeral 11 denotes a wafer mounting table used for carrying out the present invention.

このウェーハ載置台11には中央部に適当間隔で複数個
の空気吹出し口12が設けられ、また周辺部にほぼ等間
隔に周方向に分布して空気吸込み口13が設けられてい
る。各空気吹出し口12は環状の連通孔14を介して相
互に連通しており、しかも載置台11の側面に開口する
連通孔16を介して圧縮空気源に接続される。また各空
気吸込み口13は環状の連通孔17を介して相互に連通
され、上記と同様に載置台11の側面に開口する連通孔
18を介して真空装置に接続される。ウエーハ載置台1
1の上に表面にホトレジスト層を有するウエーハ21が
載置され、さらにその上にマスク22が配置される。
The wafer mounting table 11 is provided with a plurality of air blowing ports 12 at appropriate intervals in the center thereof, and air suction ports 13 are provided in the periphery thereof distributed at approximately equal intervals in the circumferential direction. The air outlets 12 communicate with each other through an annular communication hole 14 and are connected to a compressed air source through a communication hole 16 that opens on the side surface of the mounting table 11. Further, the air suction ports 13 are communicated with each other through an annular communication hole 17, and are connected to a vacuum device through a communication hole 18 opened in the side surface of the mounting table 11 in the same manner as described above. Wafer mounting table 1
A wafer 21 having a photoresist layer on its surface is placed on top of the wafer 1, and a mask 22 is further placed on top of the wafer 21.

ウエーハ21は例えば半導体ウエーハであり、マスク2
2は例えばクロムマスクでありうる。そしてウエーハ2
1およびマスク22は真空チヤツクないし真空ピンセツ
トを用いてウエーハ載置台11上に持つてきたり、そこ
から持つていつたりすることができる。さて、ウエーハ
とマスクの整合が完了した後、ウエーハとマスクを密着
するときには、空気吹出し口12からの空気吹出し、お
よび空気吸込み口13からの空気吸込みを行つて、ウエ
ーハ21を図示のごとく中央部は上方に盛上がらせ、周
辺部はウエーハ載置台11上に吸着させる。このように
して、ウエーハ21をそらせておいて、マスク22をウ
エーハ21の上に載置すると両者はウエーハ21の中央
盛上がり部のみで当接し、両者の間に空気が密封状態と
なることはないので、マスク22をウエーハ21上の所
定位置に容易に位置させることができる。この後、空気
吹出しおよび空気吸込みを中止してウエーハ21の盛上
がり変形を解除すれば、ウエーハ21とマスク22とは
中央部から周辺部へと容易に密着状態へと移行すること
になる。ウエーハ21にマスク22のパターンを焼付け
露光した後は、再ひ空気吹出し口12からの空気吹出し
、および空気吸込み口13からの空気吸込みを行つてウ
エーハ21を図示のごとくそり変形させてマスク分離を
行う。
The wafer 21 is, for example, a semiconductor wafer, and the mask 2
2 can be, for example, a chrome mask. and wafer 2
1 and the mask 22 can be brought onto and from the wafer mounting table 11 using a vacuum chuck or vacuum tweezers. Now, after the alignment of the wafer and the mask is completed, when the wafer and the mask are brought into close contact with each other, air is blown out from the air outlet 12 and air is sucked in from the air suction port 13, so that the wafer 21 is moved to the center as shown in the figure. is raised upward, and the peripheral portion is adsorbed onto the wafer mounting table 11. In this way, when the wafer 21 is deflected and the mask 22 is placed on top of the wafer 21, the two will come into contact only at the central raised part of the wafer 21, and no air will be sealed between them. Therefore, the mask 22 can be easily positioned at a predetermined position on the wafer 21. Thereafter, if air blowing and air suction are stopped to release the bulging deformation of the wafer 21, the wafer 21 and the mask 22 will easily transition to a close contact state from the center to the periphery. After the pattern of the mask 22 is printed and exposed on the wafer 21, air is again blown out from the air outlet 12 and air is sucked in from the air suction port 13 to warp and deform the wafer 21 as shown in the figure to separate the mask. conduct.

この場合も、ウエーハ21とマスク22との間に周辺方
向から自由に空気が入り込めるので、マスク22はウエ
ーハ21から容易に引離すことがでぎる。以上述べたよ
うに本発明によれば、ウエーハ載置台上に載置されたウ
エーハとマスクとの引離しの容易なウエーハ整合方法を
提供することができる。
Also in this case, since air can freely enter between the wafer 21 and the mask 22 from the peripheral direction, the mask 22 can be easily separated from the wafer 21. As described above, according to the present invention, it is possible to provide a wafer alignment method that allows easy separation of a wafer placed on a wafer mounting table and a mask.

また、本発明の方法によれば周辺から徐々に引きはがす
ため、マスクへのレジストのステイツキングを防止する
ことができる。
Further, according to the method of the present invention, since the resist is gradually peeled off from the periphery, it is possible to prevent the resist from sticking to the mask.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施に供するウエーハ整合装置の一例
を示す縦断面図、第2図は第1図の一5線から見た平面
図である。
FIG. 1 is a longitudinal cross-sectional view showing an example of a wafer aligning apparatus used for carrying out the present invention, and FIG. 2 is a plan view taken from line 15 in FIG. 1.

Claims (1)

【特許請求の範囲】[Claims] 1 (a)ウェーハ及びマスクの相対位置を合せる工程
(b)上記ウェーハ及びマスクを密着させて露光する工
程(c)上記ウェーハ中央部を突出させて徐々に上記ウ
ェーハ周辺より上記ウェーハとマスクの間にガスを導入
する工程(d)上記ウェーハとマスクを完全に引きはな
す工程よりなるウェーハ整合方法。
1 (a) Step of aligning the relative positions of the wafer and mask (b) Step of exposing the wafer and mask while bringing them into close contact (c) Protruding the center of the wafer and gradually increasing the distance between the wafer and the mask from the periphery of the wafer A wafer alignment method comprising a step of introducing gas into the wafer and (d) a step of completely separating the wafer and the mask.
JP58157806A 1983-08-31 1983-08-31 Wafer alignment method Expired JPS5932892B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58157806A JPS5932892B2 (en) 1983-08-31 1983-08-31 Wafer alignment method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58157806A JPS5932892B2 (en) 1983-08-31 1983-08-31 Wafer alignment method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP51146522A Division JPS6053464B2 (en) 1976-12-08 1976-12-08 Wafer alignment equipment

Publications (2)

Publication Number Publication Date
JPS5980931A JPS5980931A (en) 1984-05-10
JPS5932892B2 true JPS5932892B2 (en) 1984-08-11

Family

ID=15657691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58157806A Expired JPS5932892B2 (en) 1983-08-31 1983-08-31 Wafer alignment method

Country Status (1)

Country Link
JP (1) JPS5932892B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61272927A (en) * 1985-05-29 1986-12-03 Hitachi Electronics Eng Co Ltd Method for separation of wafer and mask
KR101237617B1 (en) 2010-09-07 2013-02-26 삼성전기주식회사 Exposure apparatus for substrate
US10838685B2 (en) 2017-03-23 2020-11-17 Fuji Xerox Co., Ltd. Information processing device and non-transitory computer-readable medium

Also Published As

Publication number Publication date
JPS5980931A (en) 1984-05-10

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