JPS5930342A - Carrier wave detecting circuit - Google Patents
Carrier wave detecting circuitInfo
- Publication number
- JPS5930342A JPS5930342A JP57141495A JP14149582A JPS5930342A JP S5930342 A JPS5930342 A JP S5930342A JP 57141495 A JP57141495 A JP 57141495A JP 14149582 A JP14149582 A JP 14149582A JP S5930342 A JPS5930342 A JP S5930342A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- carrier wave
- carrier
- terminal
- transmission line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
- H04L1/206—Arrangements for detecting or preventing errors in the information received using signal quality detector for modulated signals
Abstract
Description
【発明の詳細な説明】 く技術分野〉 本発明は搬送波検知回路の改良に関するものである。[Detailed description of the invention] Technical fields> The present invention relates to improvements in carrier wave detection circuits.
く従来技術〉
従来、送受信装置に備えつけられている搬送波検知回路
は、伝送ライン上の空きを認知するもので、送信の起動
手段として使用されていた。即ち、単に伝送ライン上の
搬送波の有無を確認するためのものであった。ところが
、前に信号を受けだ装置は、当然、該信号による情報を
処理するために所定の処理時間を要するわけで、たとえ
前記処理時間内において伝送ライン上が空であっても実
質的には送信できないわけである。つまり、前に受信を
して送信をしようとする装置にとっては伝送ライン上に
搬送波がなく且つ受信処理をし終えてないと伝送ライン
上は空きとはならないのである。Prior Art Conventionally, a carrier detection circuit installed in a transmitting/receiving device detects an empty space on a transmission line, and is used as a means for starting transmission. That is, the purpose was simply to confirm the presence or absence of carrier waves on the transmission line. However, the device that previously received the signal naturally requires a predetermined processing time to process the information from the signal, and even if the transmission line is empty within the processing time, it will not actually work. This means that it cannot be sent. In other words, for a device that has previously received data and is attempting to transmit data, the transmission line will not be empty unless there is a carrier wave on the transmission line and the receiving process has not been completed.
く目的〉
そこで本発明は、従来の搬送波検知回路を改良し、搬送
波検知回路に搬送波の終了を検知した時から該搬送波の
伝文処理時間を経た後に伝送ラインをオープンにする信
号を出力するようにした。Therefore, the present invention improves the conventional carrier wave detection circuit so that the carrier wave detection circuit outputs a signal to open the transmission line after the transmission processing time of the carrier wave has elapsed since the end of the carrier wave is detected. I made it.
〈実施例〉 本発明の構成を実施例に即して述べる。<Example> The configuration of the present invention will be described based on examples.
第1図に本実施例に係る搬送波検知回路を有する装置の
受信部の回路構成を示す。Lは伝送ラインで、Rはレシ
ーバで、Dは復調回路である。FIG. 1 shows a circuit configuration of a receiving section of a device having a carrier detection circuit according to this embodiment. L is a transmission line, R is a receiver, and D is a demodulation circuit.
搬送波検知回路はバイナリ−カウンター1及びラッチ2
から成る。ここで@2図のタイムチャートを用いて本実
施例の搬送波検知動作を説明する。The carrier detection circuit consists of binary counter 1 and latch 2.
Consists of. Here, the carrier wave detection operation of this embodiment will be explained using the time chart shown in Fig. @2.
伝送ラインLより受けた信号は復調回路りでレシーブク
ロック(@2図(a)〕となり〕バイナリーカウンター
lびラッチ2へ入力される。そして伝送ラインL上に信
号が無くなり、上記レシーブクロックが消えると(第2
図fa)の1+ )、バイナリ−カウンター1のCL
(クリア〕端子が解除され、該バイナリ−カウンター1
のカウントが基本クロツタ#(第2図(C))により進
み、該カウントが所定のカウントに達してt2時間にな
ると、上記バイナリ−カウンターlの出力端子IQBよ
りラッチ回路2へタロツクが伝えられる。すると、この
ラッチ回路2は出力端子Qよシ搬送波のミラーイメージ
を発する(@2図(d))。The signal received from the transmission line L becomes a receive clock (@Figure 2 (a)) in the demodulation circuit and is input to the binary counter 1 and latch 2.Then, there is no signal on the transmission line L, and the above receive clock disappears. and (second
1+) in figure fa), CL of binary counter 1
(Clear) The terminal is cleared and the corresponding binary counter 1
The count is advanced by the basic clocker # (FIG. 2(C)), and when the count reaches a predetermined value at time t2, the tarlock is transmitted to the latch circuit 2 from the output terminal IQB of the binary counter I. Then, this latch circuit 2 emits a mirror image of the carrier wave from the output terminal Q (@Fig. 2 (d)).
さて、上記バイナリ−カウンターlはさらにカウントが
進んでt8時間になると、該バイナリ−カウンターlの
出力端子2QDより検知信号を出力する(@2図(e)
)。この検知信号は本装置が他の装置からのアクセス要
求に答えられる状態となったことを意味する。Now, when the binary counter l further advances the count and reaches time t8, it outputs a detection signal from the output terminal 2QD of the binary counter l (@2 (e))
). This detection signal means that the device is now ready to respond to access requests from other devices.
上記ニおりで、バイナリ−カウンターlがミラーイメー
ジ信号を出してから検知信号を出力するまでの時間は本
装置が搬送波より情報を受は入れて該情報を処理するだ
めの処理時間である。であるから、本実施例では搬送波
による伝文が伝送ラインLを専有する時間は、装置が搬
送波の初めを検知して次いでその搬送波の終わりを検知
して後所定の処理時間を経るまでとなる。In the above case, the time from when the binary counter 1 outputs the mirror image signal until it outputs the detection signal is the processing time during which the device receives information from the carrier wave and processes the information. Therefore, in this embodiment, the time during which a carrier wave message occupies the transmission line L is from when the device detects the beginning of the carrier wave to when it detects the end of the carrier wave until a predetermined processing time elapses. .
このように本実施例においては、搬送波検知回路は2つ
の出力端子を有し、第1の出力端子(第1図X)よりミ
ラーイメージ信号を、第2の出力端子(第1図Y)より
搬送波終了後必要な処理を終了したという検知信号を出
力する。もちろん、処理時間即ち処理時間に相当する基
本クロック−のカウント数は装置(例えば電子レジスタ
)VCよって自由に変えられる。In this embodiment, the carrier wave detection circuit has two output terminals, and the mirror image signal is output from the first output terminal (X in Figure 1) and the mirror image signal is output from the second output terminal (Y in Figure 1). After the carrier wave ends, a detection signal indicating that the necessary processing has been completed is output. Of course, the processing time, that is, the basic clock count corresponding to the processing time, can be freely changed by the device (eg, electronic register) VC.
さて本実施例の搬送波検知回路を用すると以下の様な便
利さがある。Now, the use of the carrier wave detection circuit of this embodiment provides the following conveniences.
それは、従来、処理時間をかせぐため第3図falの如
く伝文の信号mlの後にダミー信号mdを送りキャリア
ー信号がオフにならない様にしてbる装置があるが、そ
のダミー信号mdが送られている闇は伝送ラインは該ダ
ミー信号m4VC専有されることになっていた。これに
対して本実施例では、第3図(b)の通り、伝文の信号
mlが終了した時点で伝送ラインは空状態になるので返
答用の伝文ma等のシーケンシャルな伝文は搬送波のミ
ラーイメージにより送信すれば良く、手間を要するダミ
ー信号mdを作成しなくて済む。なお、図中m2は他の
伝文の信号である。Conventionally, in order to save processing time, there is a device that sends a dummy signal md after the message signal ml to prevent the carrier signal from turning off, as shown in Figure 3 fal, but the dummy signal md is not sent. In the dark, the transmission line was to be exclusively used for the dummy signal m4VC. On the other hand, in this embodiment, as shown in FIG. 3(b), the transmission line becomes empty when the message signal ml ends, so sequential messages such as the reply message ma are carried out using the carrier wave. It is sufficient to transmit the mirror image of the dummy signal md, which eliminates the need to create a time-consuming dummy signal md. Note that m2 in the figure is a signal of another message.
〈効果〉
以上の様に本発明によれば伝送システムの全ての送信装
置2、送信装置間で優先順位を定めることなく平等に送
信起動できるようになるから、伝送システムの効率が上
昇する。<Effects> As described above, according to the present invention, all the transmitting devices 2 of the transmission system can start transmitting equally without determining priorities among the transmitting devices, so that the efficiency of the transmission system increases.
第1図は本発明の搬送波検知回路を有する装置の受信部
の回路構成図、第2図は本発明の搬送波検知回路の搬送
波検知動作を示すタイムチャート図、第3図(a) 、
(b)は伝送ライン上の専有状態を用いて搬送波検知
回路の動作を説明する説明図である。
1・・・バイナリ−カウンター、 2・・・ラッチ、
L・・・伝送ライン、 R・・・レシーバ−1D・・
・復調回路。FIG. 1 is a circuit configuration diagram of a receiving section of a device having a carrier wave detection circuit of the present invention, FIG. 2 is a time chart diagram showing a carrier wave detection operation of the carrier wave detection circuit of the present invention, and FIG. 3(a),
(b) is an explanatory diagram illustrating the operation of the carrier wave detection circuit using the exclusive state on the transmission line. 1...Binary counter, 2...Latch,
L...Transmission line, R...Receiver-1D...
・Demodulation circuit.
Claims (1)
る出力手段と、該搬送波が無くなった時から該搬送波に
よる伝文を受信装置内で処理するに必要な時間を経た後
に伝送ラインをオープンにする信号を出力する出力手段
とを備えることを特徴とする搬送波検知回路。1. An output means for outputting a signal detecting the presence or absence of a carrier wave on the transmission line, and opening the transmission line after the time necessary for processing the message by the carrier wave in the receiving device after the carrier wave disappears. and output means for outputting a signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57141495A JPS5930342A (en) | 1982-08-12 | 1982-08-12 | Carrier wave detecting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57141495A JPS5930342A (en) | 1982-08-12 | 1982-08-12 | Carrier wave detecting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5930342A true JPS5930342A (en) | 1984-02-17 |
Family
ID=15293256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57141495A Pending JPS5930342A (en) | 1982-08-12 | 1982-08-12 | Carrier wave detecting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5930342A (en) |
-
1982
- 1982-08-12 JP JP57141495A patent/JPS5930342A/en active Pending
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