JPS5929416Y2 - Receiving machine - Google Patents

Description

[Detailed explanation of the idea] In AM stereo broadcasting, the pilot signal is 5Hz~
A single tone with a low frequency of about 25 Hz is used.

An AM stereo receiver can perform stereo display by detecting this pilot signal.

In this case, it may be possible to use a bandpass filter or the like to detect the pilot signal, but accurate detection is difficult.

By the way, the FM stereo demodulation circuit of the FM stereo receiver, the so-called FM multiplexer, is one of the
A PLL that locks to a 9kHz pilot signal and obtains a 38kHz carrier for switching detection, and this PL
It is equipped with a detection display circuit that detects the L lock and displays stereo.

This invention focuses on this point and uses this FM stereo demodulation circuit to detect and display the biloft signal of AM stereo broadcasting.

FIG. 1 shows an example of the receiver of this invention, which consists of an FM stereo signal receiving section having an FM stereo demodulation circuit and an AM stereo signal receiving section.

First, let me explain when receiving an FM stereo signal.
The signal received by the FM antenna 10 is supplied to the FM front end 20 and converted into an intermediate frequency signal, which is supplied to the FM detector 40 through the intermediate frequency amplifier 30 and is converted to ω5 S-(L+R)+(L-R). Sinωs t + Ps
A composite signal is obtained, expressed as in -t[ωs=2πx38kHz).

When receiving an FM stereo signal, the switch 50
is switched to the contact F side, and this composite signal is supplied to the FM stereo demodulation circuit 60.

The FM stereo demodulation circuit 60 includes a switching detection circuit 7
0, a PLL 80, and a detection display circuit 90.

In the PLL 80, the output of the voltage controlled oscillator 81 is passed through the frequency divider 82.
The output of the frequency divider 82 is further divided into 1 by the frequency divider 83, the input composite signal and the output of the frequency divider 83 are multiplied by the phase comparator 84, and the output of the frequency divider 82 is divided by 1. 8
The output of 4 passes through a low-pass filter 85 and is sent to a DC amplifier 8.
The configuration is such that the signal is supplied to the oscillator 81 through 6.

In the detection display circuit 90, the output of the frequency divider 83 of the PLL 80 is phase-shifted by 90 degrees by a phase shifter 91, and the input composite signal and the output of the phase shifter 91 are multiplied by a phase comparator 92.
The output of the phase comparator 92 passes through a low-pass filter 93,
The power is supplied to the base of a transistor 95 through a DC amplifier 94, and a light emitting diode 96 for stereo display is connected to the collector of the transistor 95.

Then, the switch 8 is connected to the voltage controlled oscillator 81 of the PLL 80.
7 is provided, and when receiving an FM stereo signal, the switch 87 is switched to the contact F side, a time constant circuit 88F is connected to the oscillator 81, and the oscillation frequency of the oscillator 81 is set to 76 kHz.

Therefore, PLL80 is in the composite signal (7)1
Locked to the 9kHz pilot signal, a 38kHz carrier synchronized with the pilot signal is obtained from the frequency divider 82, and the composite signal is switching-detected by this 38kHz carrier in the switching detection circuit 70, and the left signal R and right signal R is demodulated.

Furthermore, by locking the PLL 80 to the pilot signal, a 19 kHz carrier in phase with the pilot signal is obtained from the phase shifter 91 of the detection display circuit 90, the transistor 95 of the circuit 90 is turned on, and the light emitting diode 96 lights up. stereo display.

When receiving an FM stereo signal, switch 10
0L and 100R are switched to the contact F side, and the left signal R and right signal R obtained from the FM stereo demodulation circuit 60
is connected to the speaker 120 through amplifiers 110L and 110R.
L and 120R.

On the other hand, when receiving an AM stereo signal, the signal received by the AM antenna 130 is supplied to the AM tuner 140 and converted into an intermediate frequency signal, which is then sent to the intermediate frequency amplifier 150.
taken out through.

This signal is, for example, a single carrier that is amplitude-modulated according to the sum signal L+H and phase-modulated according to the difference signal LR.

This intermediate frequency signal is supplied to an envelope detector 160, and an onion sum signal L+R is demodulated.

Further, this intermediate frequency signal is supplied to the synchronous detector 170 and synchronously detected using the carrier obtained from the PLLI 80, and the difference signal LR is demodulated.

The PLL 180 includes a phase comparator 181. Voltage controlled oscillator 18
2 and a low-pass filter 183, into which an intermediate frequency signal is input.

The sum signal L+R obtained from the envelope detector 160 and the difference signal L-R obtained from the synchronous detector 170 are supplied to a matrix circuit 190, and a left signal and a right signal R are extracted.

When receiving an AM stereo signal, switch 10
0L and 100R are switched to the contact A side, and the left signal and right signal R obtained from the matrix circuit 190 are sent to the speaker 120L through the amplifiers 110L and 110R.
and 102R.

Output of envelope detector 160 and synchronous detector 170
The output includes, for example, a 25 Hz pilot signal of an AM stereo signal.

When receiving an AM stereo signal, the switch 50
is switched to the contact A side, and the output of, for example, the synchronous detector 170 containing this 25Hz pilot signal becomes FM.
The signal is supplied to a stereo demodulation circuit 60.

When receiving an AM stereo signal, P of the circuit 60 is
Switch 87 of LL80 is switched to contact A side,
A time constant circuit 88A is connected to the oscillator 81, and the oscillation frequency of the oscillator 81 is set to 100 Hz.

Therefore, PLL 80 locks to the 25 Hz pilot signal in the output of synchronous detector 170.

Then, by locking the PLL 80 to the pilot signal, a 25 Hz carrier in phase with the pilot signal is obtained from the phase shifter 91 of the detection display circuit 90, the transistor 95 of the circuit 90 is turned on, and the light emitting diode 96 lights up. stereo display.

Furthermore, if a low pass filter or a 25 Hz band pass filter is inserted between the output side of the synchronous detector 170 and the contact A of the switch 50, more stable detection becomes possible.

When the loop band of the PLL 180 is wide, a 25 Hz pilot signal appears at the output of the low-pass filter 183, so the output of the low-pass filter 183 is converted to FM.
It may also be supplied to the stereo demodulation circuit 60.

FIG. 2 shows another example of the PLL of the FM stereo demodulation circuit 60.
The oscillation frequency of the oscillator 81 of 80 is fixed at 76 kHz.

A switch 87 is provided on the output side of the oscillator 81, and when an FM stereo signal is received, the switch 87 is switched to the contact F side, and the output of the oscillator 81 is directly supplied to the frequency divider 82.

On the other hand, when receiving an AM stereo signal, the switch 87 is switched to the contact A side, and the output of the oscillator 81 is transferred to the frequency divider 8.
9 and the output of the frequency divider 89 is supplied to the divider 82.

Therefore, the PLL 80 will still lock to the 19 kHz pilot signal when receiving an FM stereo signal, and will lock to the 25 Hz pilot signal when receiving an AM stereo signal.

According to this invention, by using the FM stereo demodulation circuit 60 which becomes useless when receiving an AM stereo signal, it is possible to accurately and stably detect the pilot signal of the AM stereo signal.

In particular, since PLL is difficult to respond to frequencies outside the capture range, it is ideal for detecting 25 Hz.

In the existing FM multiplexer, the parts other than the time constant circuit of the oscillator 81, the low-pass filters 85 and 93, and the light emitting diode 96 are integrated into ICs, so the time constant circuit can be switched as shown in the example in FIG. When switching the oscillation frequency, this existing FM multiplexer I
C can be used as is.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram of one example of the receiver of this invention, and FIG. 2 is a connection diagram of the main parts of another example. 60 is an FM stereo demodulation circuit, 80 is its PLL,
90 is its detection and display circuit.

Claims (1)

[Scope of utility model registration request] It consists of an FM stereo signal receiving section having an FM stereo demodulation circuit equipped with a PLL and a circuit for detecting and displaying locking of this PLL, and an AM stereo signal receiving section, and the above-mentioned F
The PLL of the M stereo demodulation circuit is provided with a switch that switches the oscillation frequency determining circuit to selectively lock to a frequency that is a common multiple of the FM stereo subcarrier frequency and the frequency of the AM stereo pilot signal, and receives the FM stereo signal. Sometimes the FM stereo demodulation circuit performs stereo demodulation and stereo display, and also
When receiving a stereo signal, the receiver detects and displays a pilot signal of an AM stereo signal using the FM stereo demodulation circuit.