JPS5929401Y2 - Multipoint analog input device - Google Patents

Description

[Detailed explanation of the idea] This invention relates to a multi-point analog input device.

Generally, a multi-point analog input device, as shown in FIG. , and are sent to the data bus 5 through the analog input interface 4 as required, and read into the deco processing device.

Therefore, in conventional devices of this kind, each analog human power e1 to en
There is a sequential shift in the reading time corresponding to the switching speed of the multiplexer circuit 1.

In order to reduce the amount of deviation in reading time, it is necessary to increase the switching speed of the multiplexer circuit 1 and the conversion speed of the A-D converter 3.

However, even if these response speeds are increased, the values of the analog human forces e1 to eo at the same time cannot be extracted as data.

The purpose of this invention is to enable such a multi-point analog input device to read data from each analog input at the same point in time.

In this invention, as shown in Fig. 2, the multiplexer circuit 1
Sample and hold circuits 6a, 6b, 6c, . The hold values are then sequentially read out by the multiplexer circuit 1.

In particular, each of the sample and hold circuits 6a to 6n is provided with a pair of memory elements, and each pair of memory elements is configured to alternately operate in a sample mode and a hold mode,
The feature is that the reading speed is increased.

An embodiment of the sample and hold circuit will be described below in detail with reference to FIG.

FIG. 3 shows one sample and hold circuit.

In this figure, 7 indicates a buffer amplifier, and input terminal 8
-8 is connected to analog signal source 9, the analog signal output from analog signal source 9 is taken out as a low impedance output by buffer amplifier 7, and the output is sent to
0 and 11 to the pair of storage elements 14 and 15 alternately, and from the pair of storage elements 14 and 15 to the switch 12.
, 13, the hold values are alternately output to the output terminal 16-
It is designed to be output within 16 minutes.

That is, the buffer amplifier 7 can be configured by an operational amplifier 17 having a non-inverting input terminal and an inverting input terminal,
The analog signal supplied to input terminal 8-8 is connected to resistor R1
, R2 to the non-inverting input terminal and the inverting input terminal of the operational amplifier 17.

A part of the output of the operational amplifier 17 is negatively fed back to the inverting input terminal through the negative feedback resistor R4, and the non-inverting input terminal is connected to the common potential point 18 through the resistor R3.

By appropriately selecting the resistance values of these resistors R1 to R4, the levels of the respective input analog signals e1 to eo can be adjusted to appropriate levels, and range switching becomes possible.

On the other hand, the output of the buffer amplifier 7 is as explained above.
A pair of storage elements 14 and 15 through switches 10 and 11
are supplied alternately.

In this example, the storage element 1415 uses a capacitor, and the sample values of the analog signals held in the storage elements 14 and 15 are alternately supplied to the multiplexer circuit 1 from the output terminals 16-16 by the switches 10 and 13. .

That is, the switches 10 and 13 and 11 and 12 are interlocked with each other,
Switches 10 and 13 and 11 and 12 provided in each sample and hold circuit 6a to 6n are switched synchronously.

Therefore, for example, when switches 10 and 13 are off and switches 11 and 12 are on, storage element 14 is in sample mode and storage element 15 is in hold mode, and in this state there is no storage between output terminals 16 and 16. The sample value held in element 15 is output.

At the next point in time, switches 10 and 13 are turned on and switches 11 and 12 are turned off.

At this time, the instantaneous value of the analog signal immediately before the switch 11 is turned off is held in the memory element 14, and the held value is outputted between the output terminals 16-16 through the switch 13.

For example, if an analog waveform Sa as shown in FIG. 4A is supplied to this sample and hold circuit, the sample and hold output will be the hold output H0 from the memory element 14 and the hold output from the memory element 15 as shown in FIG. 4B. H2 are obtained alternately.

Therefore, by reading the outputs of the sample and hold circuits 6a to 6n using the multiplexer 1 during the time when the hold outputs H1 and H2 are being output, the values of the analog inputs at the same time can be read.

After all, according to this invention, each sample and hold circuit 6a to 6
n (a pair of memory elements 14 and 15 are provided, and the output terminal 16
A hold output is always obtained at -16.

Therefore, the switching time of the switches 10 to 13 can be effectively used for the switching timing of the multiplexer 1, and this can be achieved by increasing the sample rate period accordingly.

In other words, if only one memory element is provided in the sample and hold circuit, a time period is first provided in which the instantaneous value of the analog input is stored in the memory element of each sample and hold circuit 6a to 6n when the multiplexer circuit 1 starts scanning. Must-have.

The time required for this storage is determined by the capacitance value of the storage capacitor and the internal impedance of the buffer amplifier 7, and there is always a finite value.

Therefore, in order to make the sampling rate period equivalent to that of the present invention, it is necessary to increase the scanning speed of the multiplexer circuit 1 by the sampling time, and accordingly, the conversion speed of the A-D converter 3 must also be increased. Must be fast.

On the other hand, according to this invention, as described above, the pair of memory elements 14 and 15 are alternately placed in the hold mode, and while they are not in the hold mode, they are placed in the sample mode, so that the scanning of the multiplexer circuit 1 can be performed within the time required by the analog human power e1. .about.en can be used to effectively utilize the switching time, and there is an advantage that the sample rate period can be increased without increasing the scanning speed of the multiplexer circuit 1.

As explained above, according to this invention, each instantaneous value of multiple analog input points at the same time point can be read as data without increasing the scanning speed of the multiplexer circuit 1, and data at the same time point can be read at low cost. A multi-point analog input device can be obtained.

Furthermore, the sample rate can be controlled by the software of the data processing device, and the device can be simplified accordingly.

Furthermore, range switching is also possible in each sample-and-hold circuit 63 to 6n, which has the advantage of expanding the measurement range.

[Brief Description of the Drawings] Fig. 1 is a system diagram for explaining a conventional multi-point analog input device, Fig. 2 is a system diagram showing an embodiment of this invention, and Fig. 3 is a system diagram for explaining a conventional multi-point analog input device.
The figure is a connection diagram showing a specific example of the main part of this invention.
The figure is a waveform diagram for explaining the operation of FIG. 3. 1: multiplexer, 6a to 6n: sample and hold circuit, 14, 15: memory element.

Claims (1)

[Scope of utility model registration request] In a multi-point analog input device that sequentially extracts analog inputs from a plurality of points through a multiplexer circuit, a pair of sample-hold circuits are provided in parallel for each input point of the multiplexer circuit, and the sample-hold circuits are connected to a pair of sample-hold circuits connected in series. It consists of a first switch, a second switch, and a capacitor connected between the connection point of the first switch and the second switch and a common potential point, and is connected in parallel to each input point. A multi-point analog input in which a pair of sample-and-hold circuits are interlocked and operate synchronously so that they are alternately in sample mode and hold mode, and sample signals at the same point in time of each input point are extracted from the multiplexer circuit. Device.