JPS592876B2 - Time display correction device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an electronic wristwatch having an electronic circuit that uses an oscillation signal from an oscillation circuit using a crystal resonator or the like as a time standard signal, and counts this signal to form a relatively low-vibration signal. It depends on the time display correction device.

The object of the present invention is to provide a time display correction device that can easily adjust the time display of these crystal wristwatches to a display close to standard time at all times.

Conventional electronic wristwatches have a time display correction device, such as a seconds setting device that stops the movement of the hands when the crown is pulled out. If the clock was running late, the clock would stop for up to 59 seconds and restart after waiting for the correct time, which was extremely inconvenient.

SUMMARY OF THE INVENTION In order to eliminate the above-mentioned inconvenient operations, it is an object of the present invention to perform an operation to stop the operation of a watch (and to quickly and accurately adjust the time with a simple operation).

Next, examples of the present invention will be described.

1 to 3 show a switching mechanism according to the present invention, in which 1 is a switching member that is rotatable and movable in stages and corresponds to the winding stem of a mechanical watch; 2 is a switching member that engages with the switching member 1; The fixed wheel 3 is a fixed wheel, and when the switching member 1 is rotated, the fixed wheel 3 is rotated via the fixed wheel 2.

This die wheel 3 is integrally equipped with die wheels 4 and 5 made of an insulating material as shown in FIG. Fixed.

6 and γ are contact springs each having one end fixed; the tip of one spring 6 is interposed between the teeth of one die wheel 4, and the tip of the other spring 7 is interposed between the teeth of the other die wheel 5. is interposed between.

8 and 9 are stopper pins 10 and 11 of the contact spring 6.7.
is a contact pin with which the spring 6.7 comes into contact when the mold wheel 4 rotates either left or right.

Therefore, the contact spring 6 and the contact pin 10 and the contact spring I and the contact pin 11 constitute two switches S1 and 82.

This switch S0. Time display correction is performed electrically by turning S2 ON and OFF.

To explain the ON/OFF action of switches S1 and 82,
As shown in Figure 1, when the switching member 1 is rotated in the direction of arrow A at one position of the switching mechanism, the rotation wheel rotates in the direction of arrow A'.

At this time, the contact spring 6 is deflected by the teeth 4a of the timing wheel 4, and comes into contact with the contact pin 10.

When the switching member is further rotated in the same direction, the teeth 4a and the contact spring 6 are removed and return to their initial state.

At this time, the other die wheel 5, which is integral with the die wheel 3, rotates in the same direction as described above, but the teeth of the die wheel 5
Since the direction of a is opposite to that of the teeth 4a of the die wheel 4, the contact spring 7 is pressed by the stopper pin 9 and does not come into contact with the contact pin 11.

Further, when the switching member 1 is rotated in a direction opposite to that described above, the rotation becomes opposite to that described above.

That is, the switch S□ is turned off and the switch S2 is turned on.

Therefore, either the switch S□ or 82 is ON or OFF.
Use the FF to correct the time display to either + or -a.

Hereinafter, the time display correction means using the switches S, , S2, which are turned on and off by the switching mechanism, will be explained using an electronic circuit block shown in FIG.

The electronic wristwatch includes a crystal oscillator 20 as a standard oscillator, a frequency divider circuit 21 that receives a signal from the oscillator 20 and extracts a time signal, a time display drive circuit 22 that receives the output of the frequency divider circuit 21, and its time display means 23. Between the frequency dividing circuit 21 and the time display driving circuit 22, there is provided a time display correction circuit, that is, an S+ correction gate circuit 24 and its control circuit 25 based on the switch S1, and an S- correction gate circuit using the switch S2. 26 and its control circuit 21 are inserted.

During normal operation of the watch, the switches S1 and 82 of the switching mechanism described above are in the OFF state, the S-correction gate circuit 26 is in the ON state, and the S-correction gate circuit 24 is in the ON state.
is in an OFF state, so the output pulse of the frequency dividing circuit 21 is taken out as an input to the time display drive circuit 22 through the S-correction gate circuit 26.

Now, with the switching mechanism in the state of quantitative time adjustment, rotate the winding stem to the left or right, for example, turn the S-correction switch S2 to O.
When N, the S-correction gate control circuit 2γ operates and S-
The correction gate circuit 26 is turned off, and the frequency dividing circuit 2101
This prevents the output pulses from passing through the time display drive circuit 22, and prevents the pulses from passing through the time display drive circuit 22, so that no pulses are supplied to the time display drive circuit 22.

(Thus, correction can be made to delay the clock display by a certain amount of time corresponding to one period of the pulse passing through the output terminal 21a of the frequency dividing circuit 21.

On the other hand, when the S0 correction switch S1 is operated, the S
The ten correction gate control circuit 25 operates and causes the output of the S ten correction gate circuit 24, which normally does not generate an output pulse, to generate a pulse at the input terminal 26a of the clock display drive circuit, and therefore passes through the output terminal 21a of the frequency dividing circuit 21. The above-mentioned pulse is added to the normal pulse that is received, and the added pulse is supplied to the time display drive circuit, and the displayed time is corrected by the predetermined amount.

Of the block diagram in FIG. 4, the details of the configuration of the S-correction circuit block, ie, 26 and 27 degrees S2 in FIG. 4, are shown in FIG. 5, and the time chart thereof is shown in FIG. 6.

In this embodiment, the correction time amount is set to 1 second, and a frequency dividing circuit for further dividing the output of the frequency dividing circuit 21 shown in FIG. 4 is not particularly provided.

Referring to FIG. 5, a clock pulse with a period of 1 second is constantly supplied from the output of the frequency dividing circuit 21 to the terminal 21a.

This 1 second signal at the terminal 21a is considered to be the φ phase.

Since the S-correction gate circuit 26 is normally open (ONt), the signal from the terminal 21a is also output to the terminal 26a, but when the S-correction switch S2 is operated, the gate G4 is turned on only once. When closed, the pulse supply to the terminal 26a is stopped by one terminal.

The details of this operation are as shown in the time chart FIG. 6. First, when the S-correction switch S2 is turned on, the flip-flops FF1 and FF2 are each set to 1.
The signal 1S-π supplied to the input 30 of the gate G2, that is, the signal whose phase is shifted by π from the terminal 26a, is
The signal is supplied from the frequency divider circuit 21 in the figure, and upon arrival of this signal, the flip-flop FF3 is set.

At this time, the S-correction gate circuit 26 is closed, and the pulse that came to the terminal 21a after about 0.5 seconds, that is, the pulse A in FIG. 6, does not appear at the terminal 26a.

Thus, for the clock display drive circuit 22 in FIG.
It is possible to reduce the emitted pulse and delay the time display by one second.

Pulse A in Figure 6 is also applied to gate G3 in Figure 5, and since flip-flop FF3 is set to 1, pulse A also appears at the output of gate G3, which resets flip-flops FF2 and FF3. be done.

Note that in FIG. 5, flip-flop FF3 is assumed to be a JK flip-flop, and the output of flip-flop FF3 is reset at the trailing edge of pulse A. It is explained in.

Next, flip-flop FF1 is reset by gate G
1 output, the 01 manual power consists of the FF2 Q output and the pulse train C applied to the input 31.

If the S-correction switch S2 is operated by an input from a crown or the like as shown in FIG. 1 of this embodiment, the operation of the switch is not necessarily completed by the end of the main correction operation.

A method to solve this problem is to input a reset pulse train to the gate G1. No matter how long the operation of the switch 4 is, the flip-flop FF□ will be reliably reset by the reset pulse C that comes after the operation is completed. Ru.

Next, FIGS. 7 and 8 will be explained.

The details of the circuit operation are almost the same as in FIGS. 5 and 6.

The pulse train injected into the terminal 21a in FIG. 1 was the φ phase in FIG. ) and no signal appears at the output terminal 26a.

When the S0 correction switch S1 is operated, the flip-flop FF3 is set by the IS-φ pulse applied to the gate 02 human power 32, and after about 0.5 seconds, the I
An S-π pulse is sent from the terminal 21a to 26, and the time display from 22 onward in FIG. 4 is advanced by one second and corrected by this pulse.

As mentioned above, the only difference between FIG. 5 and FIG. 7 is that the pulses applied to the terminal 21a are reversed for the π phase and the φ phase, and that the OFF and ON states of the gate G4 are reversed in the normal state. The other operations are the same.

In the time display drive circuit 22 of FIG. 4, for example, the subsequent time display mechanism is a step motor, a gear train coupled to the step motor,
In the case of a case consisting of hands and a dial, it is possible to consider both cases in which a part of the frequency dividing circuit is added to the previous block 1p22 and cases in which it is not.

For example, when the display moves the hands every second, it is convenient to use correction in units of one second, so a part of the frequency dividing circuit is
Do not add it inside the block.

Or, if it is displayed up to the hour and minute hands, it is an integer fraction of a minute.
Since it is convenient to use correction in units of 30 seconds, 15 seconds, etc., it is possible to add a part of the frequency divider circuit within the 22 blocks.

Furthermore, the number of signals from the frequency dividing circuit that drives or controls the time display correction circuit block shown in FIG. 4 is not limited to one type.

None of these is intended to undermine the gist and gist of the present invention.

Furthermore, due to the nature of a frequency divider circuit made up of ordinary flip-flops, the signals present in the circuit usually have a period that is an integer fraction of the time interval of the final time display. It is preferable to set the correction time amount to an integer fraction of the time interval of the final time display, and by driving and controlling these time display correction circuits using the signals in this frequency dividing circuit, the correction circuits can be adjusted. It is possible to simplify the configuration and reduce manufacturing costs.

Also, from the perspective of time adjustment users, it is easy to understand and prefer that the fixed amount of adjustment is an integral multiple or fraction of the unit of time display, and it significantly increases the value of the product. Become.

This is one of the effects of the present invention. Note that the frequency dividing circuit 21, the time display correction circuit block, the subsequent frequency dividing circuit 22, the time display driving circuit, etc. are usually integrated together, so the present invention cannot be implemented in a limited space such as a wristwatch. would be easy.

As described above, according to the present invention, it is possible to quickly adjust the time with a simple operation, and the amount of adjustment by one operation of the time display adjustment device can be adjusted for advance adjustment and delay adjustment. For example, if the correction amount is 1
It also has the advantage that the number of correction operations can be easily determined from the amount of time to be corrected when the displayed time is compared and observed with the standard time in seconds.

[Brief explanation of the drawing]

Fig. 1 is a plan view of a switching mechanism showing an embodiment of the present invention, Fig. 2 is a sectional view thereof, Fig. 3 is an exploded view of a switching mechanism, and Fig. 4 is a clock drive circuit. and a block diagram of a time display correction circuit, FIG. 5 is a correction circuit diagram for correcting the advance of the clock, FIG. 6 is a diagram showing its time chart, and FIG.
The figure shows a correction circuit diagram for correcting the clock delay, and FIG. 8 shows its time chart. 1...Switching member, 2...Tsuzumi wheel, 3
...Kichi car, 4,5...model car, 6,7
...Contact spring, 10゜11...Contact pin, Sl, s2...Switch, 20...
・Oscillator, frequency divider circuit, 22...
Time display drive circuit, 23... Time display means, 2
6...S-modified gate circuit, 27...
S-correction gate control circuit, 24...S10 correction gate circuit, 25...S10 correction gate control circuit.

Claims (1)

[Claims] 1: a standard signal oscillation circuit, a frequency divider circuit that inputs the time reference signal output from the standard signal oscillator circuit, a drive circuit that inputs the output of the frequency divider circuit and outputs a signal for displaying time, and the drive circuit. A wristwatch comprising a time display means for displaying the time in response to an output from a circuit, and a time display adjustment device for correcting the time displayed on the time display means, wherein a part of the time display adjustment device is included in the wristwatch. An advance correction switch and a delay correction switch that are exposed to the exterior and are rotatable, and are located near the member within the wristwatch to control advance and lag operations of the time display correction device, and rotation of the member in a fixed position. A transmission member is provided between the member and the switch in order to selectively operate the advance correction switch and the delay correction switch depending on the rotational direction of the operation, and a transmission member is provided which is interposed between the member and the switch, Activate the advance correction switch by rotational operation,
Further, by operating the delay correction switch by a rotation operation in the opposite direction, a correction logic circuit in the display time adjustment device connected to the mouth switch is operated, and the output of the logic circuit is inputted. By controlling the drive circuit, the time display is advanced or delayed by a certain amount of time set to one minute or less by selecting the direction of the rotation operation of the member, and when the switch is turned once. A time display adjustment device characterized in that the amount of adjustment time required by the operation is the same for advance adjustment and for delay adjustment.