JPS59270A - Picture detecting system - Google Patents

Picture detecting system

Info

Publication number
JPS59270A
JPS59270A JP57109229A JP10922982A JPS59270A JP S59270 A JPS59270 A JP S59270A JP 57109229 A JP57109229 A JP 57109229A JP 10922982 A JP10922982 A JP 10922982A JP S59270 A JPS59270 A JP S59270A
Authority
JP
Japan
Prior art keywords
picture
block
character
dither
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57109229A
Other languages
Japanese (ja)
Inventor
Shigeru Yoshida
茂 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57109229A priority Critical patent/JPS59270A/en
Publication of JPS59270A publication Critical patent/JPS59270A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits
    • H04N1/40062Discrimination between different image types, e.g. two-tone, continuous tone

Abstract

PURPOSE:To simplify a hardware, and to improve a picture at a high speed, by providing a detecting system which sets plural threshold levels to a dither matrix, and a detecting system which sets a single threshold level, and deciding by a logical operation whether a picture data is a shading picture or a character picture. CONSTITUTION:Whether each block is a shading picture or a character picture is decided from two deciding conditions of (1) whether the maximum level value of a variation portion of a tone between plural blocks of a dither picture exceeds a prescribed level or not, and (2) a picture element of a block of a single threshold level is not all white nor all black. A signal 1 in which the shading picture and the character picture are mixed is inputted in parallel to comparators 10, 11. The comparator 10 binary-codes the signal 1 by a single threshold level 2, and the comparator 11 binary-codes it by a dither threshold level 3. The binary-coded signal is brought to a logical operation and is inputted to a multiplexer 33, in which in accordance with the conditions (1), (2), it is made to pass through a simple binary data and a binary dither data when the input is a character picture, and when it is a shading picture, respectively.

Description

【発明の詳細な説明】 U)発明の技術分野 本発明は濃淡画家と文字1図形等の21直画慮(文字画
1象と略称)の混在する画1象データを人力し、組織的
ディザ法を用いて検出する4会、文字画1象の1!!I
I貞を改善する画1象検出方式に関するものである。
[Detailed Description of the Invention] U) Technical Field of the Invention The present invention employs systematic dithering by manually processing image data in which 21 direct drawings (abbreviated as character drawing 1 elephant) such as gradation painters and character 1 figures are mixed. 4 meetings detected using the method, 1 character image 1 elephant! ! I
This invention relates to a single-image detection method that improves I-sensitivity.

(2)従来技術と間4点 従来、白黒2値で中間−を餞現する4酋、階調の再現性
とハードウェア構成が袢易なことから、通/It組鐵的
ディザ法が用いられる。組織的ディザ法では中間Aを黒
l[III素の密度によって嵌現するため、−淡画+*
に対しては良好な画慮が得られる。
(2) Four points between the conventional technology and the conventional dither method, which expresses intermediate values in black and white binary values, has been used because of its gradation reproducibility and easy hardware configuration. It will be done. In the systematic dithering method, the intermediate A is inlaid by the density of the black l[III element, so it becomes -light +*
Good planning can be obtained for this.

しかし、分!S能が劣化するため、原イA中に一淡画祿
と文字画IIが混在する4合、文字画慮の画質が悪くな
る。
But minutes! Due to the deterioration of the S ability, the image quality of the character strokes becomes worse in the 4th case where the Ittan Gaki and the character strokes II are mixed in the original A.

第1図(→、(b)にそれぞれ単−開直とディザ法によ
る文字画1象を■漢字と■英字の実例で示す。図示のよ
うにディザ法で21直画1象を検出すると、白黒の想状
の境界が正しく検出されないため字体がくずれ画質が悪
くなることが分る。
Figure 1 (→ and (b) show examples of one character stroke using the single-open dither method and the dither method for ■kanji and ■alphabet.As shown in the figure, when one straight stroke of 21 is detected using the dither method, It can be seen that because the boundaries between black and white images are not detected correctly, the fonts become distorted and the image quality deteriorates.

従来、−淡画慮と文字画1象が混在している4合、これ
ら2つの画1象を分離して文字画順の画質を改善する方
式として、 (1) nt子道通1言学会技術報告4jiVol 8
1 、 A 133. IE81−57「文字画1象を
考イした擬似中間調再現、の検討」と、 (2)%開昭57−24165 1画1象識別方法−j
がある。
Conventionally, the method of improving the image quality in the order of character strokes by separating these two strokes and improving the image quality in the order of character strokes was proposed. Technical report 4jiVol 8
1, A 133. IE81-57 "Study of pseudo-halftone reproduction considering character stroke one image" and (2) % 1977-24165 One stroke one image identification method-j
There is.

(1)の方法は、4×41#承の小−域毎に多1lIt
画謙1d号で最大塊と最小1直の差分を求め、この差分
が所定の1直よシ小さいかどうかで濃淡画1象か文字画
IIaかt補足している。(2)の方法は、ディザ画1
象を特定の大きさく例では8×17画、りの小娘域母に
ディザマトリックスの閾値かり決まる各画素の階調レベ
ルのll11i素数の分布を求め、この分布の形から一
淡m+象か文字1慮かを判定している。しかし、(1)
の方法は多源I[ki1破1d号の最大直、最小lli
金求めるブロック毎の石埋を全画素に亘って行なう必殺
がろシ、(2)の方法ではディザutii+#中で1m
+素ずつ4階調レベルの1il!i素数をカウントする
必委がめる。
Method (1) uses 1lIt for each small area of 4×41#.
The difference between the maximum mass and the minimum 1 scale is determined using the 1d model, and depending on whether this difference is smaller than a predetermined 1 scale, the gradation image 1 or the character image IIa is supplemented. Method (2) is dithered image 1
If the elephant is made to a specific size, for example 8 x 17 pixels, the distribution of the ll11i prime number of each pixel's gradation level determined by the threshold value of the dither matrix is calculated from the shape of this distribution. We are determining whether or not it is a consideration. However, (1)
The method is the maximum directness of multisource I [ki1 break 1d, the minimum lli
A special attack that performs rock filling for each block to search for gold over all pixels, method (2) is 1m in dither utii+#
+ 1il with 4 gradation levels for each element! A compulsory task is to count i prime numbers.

このため、ハードウェア構成が大きくなり、また処理が
高速化できないという欠点がめった。
As a result, the hardware configuration becomes large and the processing speed cannot be increased.

(3)発明の目的 本@明の目的は縞淡画1象と文字画謙の混在する画慮デ
ータ全入力し、組織的ディザ法を用いて検出する場合、
文字自重の画質を改善する自虐検出方式を提供すること
である。
(3) Purpose of the Invention The purpose of this book @ Ming is to input all the design data containing a mixture of striped and light paintings and characters and characters, and to detect it using the systematic dither method.
An object of the present invention is to provide a self-abuse detection method that improves the image quality of text.

(4)発明の構成 Ii’u rt己目的を達成するため、本発明の画1象
検出方式は濃淡画1象と文字1図形画像とが混在する1
IliIi像データを、複数1−1直をディザマトリッ
クスに設定した第1の検出系と、単一1i141直をf
52足した第2の検出系に並列に記憶させ、前記デイザ
マ) IJラックスたはその一部の複式−it″1ブロ
ックとし、第1の検出系に注目するブロックをよむ複数
ブロック間の階調レベルの変化分の最大値?検出する手
段を、第2の検出系に注目するブロックを単一1禰直C
レベル変化を検出する手段を設け、前記第1の検出糸の
手段の変化分の最大塊が所属1直以上CX第2の検出系
の手段の検出直に異なるレベル変化がめるとき、前記注
目するブロックのデータを文字1図形画慮と判定し単−
閾1直による検出1d号を出力することを%徴とするも
のである。
(4) Structure of the Invention In order to achieve the purpose, the image detection method of the present invention uses a single image detection method in which a grayscale image and a character image are mixed.
IliIi image data is transferred to the first detection system in which a plurality of 1-1 directs are set as a dither matrix, and a single 1i141 direct is set to f.
52 plus is stored in parallel in the second detection system, the above-mentioned dizama) IJ Lux or a part thereof is set as one block, and the first detection system reads the block of interest. The maximum value of the level change?The means for detecting the second detection system is a single block.
Means for detecting a level change is provided, and when a different level change is detected immediately after detection by the means of the CX second detection system, the maximum lump of the change of the first detection thread means belongs to one or more cycles, the block to be noticed The data is determined to be a character 1 figure design, and it is simply -
The output of the detection number 1d based on the threshold value 1 is used as a % sign.

(5)発明の実施例 本発明の詳細な説明する前に、組織的ディザ法につき量
率(C説明する。
(5) Embodiments of the Invention Before explaining the present invention in detail, the systematic dither method will be explained.

42図は組織的ディザ法のディザマトリックスの1例を
示し、列数4竹畝jの桝目内の数子が1直である。いま
16値に電子化された多重自虐16号をディザ処理する
場合、ディザマトリックスに閾1直を設足し、多1lt
l[!I11象の対応頭載(ブロック)と比戟する。各
画素(try)の一度しペルQ買yとそれに対応するデ
ィザマトリックスの61−1直TIJと全比較し、Qx
y>T+」のと11庄目lI!11素を黒レベル”1”
にし、QXF(TOのときそれを白レベルl+oNにす
る。
FIG. 42 shows an example of a dither matrix of the systematic dither method, in which the numerals in the squares of bamboo ridges j having four rows are 1. When dithering the multiple masochism No. 16, which is now digitized into 16 values, a threshold 1 shift is set up in the dither matrix, and a multiple 1lt
l[! Compare it with the corresponding block of I11 elephants. Compare each pixel (try) once with the 61-1 direct TIJ of the dither matrix and the corresponding dither matrix, Qx
y>T+” and the 11th sho lI! Black level “1” for 11 elements
and set it to the white level l+oN when QXF (TO).

これは濃淡画1兼を2直化する方法である。This is a method of converting a single grayscale image into two.

本発明では、この複数1−1直のディザマトリックスの
検出系と、単−間1直の検出系t−設けておき、原稿中
に濃淡画1#Iと文字−廉が混在するとき、ディプマト
リックスまたは1部領域(ブロック)単位でIJX禰中
のtti++1が濃淡画1峨か文字画像かを判定する。
In the present invention, a dither matrix detection system with a plurality of 1-1 shifts and a detection system with a single shift is provided, and when a grayscale image 1#I and character defects are mixed in a document, the dither matrix detection system is provided. It is determined whether tti++1 in the IJX line is a grayscale image or a character image in units of matrix or partial area (block).

そして、そのブロックを濃淡自虐と判定したときはディ
ザマトリックス検出系で偵出し、そのブロックを文字画
1象と判定したときは、単−I閥はの検出系で検出する
。このように処理することにより、上l己原橘をディザ
マトリックス検出系のみを用いた第1図(b)の場合の
画質に比べ同図(0)に示tように、同図(α)の単一
1!I4櫃と同じ画質が得られる。
When the block is determined to be masochistic, it is detected by the dither matrix detection system, and when the block is determined to be a character image, it is detected by the single-I detection system. By processing in this way, the image quality of the first half of Tachibana (α) as shown in FIG. 1(0) is improved compared to the case of FIG. Single 1! You can get the same image quality as I4.

ここで文字画11!は濃淡自虐よp一度変化が急でめシ
、かつ急I*la度変化の頻度が大きいという特徴をも
つ。
Character drawing 11 here! It is characterized by a sudden change in intensity and a high frequency of sudden I*la degree changes.

本発明では上記の特徴をとりえ、次の2つの1(1足未
注から)京禰の間ブロックが−fl幽1象か文字1慮か
全補足“する。
In the present invention, the above feature is taken, and the next two 1 (from 1 pair not noted) Kyonema block is fully supplemented whether it is a -fl image or character 1.

(1)ディザ自虐の複数ブロック間での階調の変化分の
最大塊が所にレベル以上か。
(1) Is the maximum amount of gradation change between multiple blocks of dither masochism equal to or higher than the level?

(ll)単一1列置のブロックの自系がオール白または
オール黒ではない。すな4ノち白黒の変化がある。
(ll) The self-family of a single 1-row block is not all white or all black. There are four black and white changes.

上記条件(1) 、 (n)を満すときそのブロックを
文字画謙と判定する。
When the above conditions (1) and (n) are satisfied, the block is determined to be a character/painting character.

判定条件(1) 、 (II)は次のようにして論4演
算のみで求められる。
Judgment conditions (1) and (II) can be obtained using only Logic 4 operations as follows.

条件(1)については、まず注目しているrm鐵が各ブ
ロック内は一様な一度をもつと仮定すると、ディ9’画
1砿中のa故ブロック間の階調レベルの変化分の最大1
lLDは次のようにして求められる。
Regarding condition (1), first of all, assuming that the rm iron of interest has a uniform degree in each block, then the maximum change in gradation level between blocks in a 1
lLD is obtained as follows.

いま、複数ブロック中の画素を5rnnと表わす。ここ
でSmnは日10″か黒012かであり、mは複数ブロ
ック中のブロック番号(m= 1 +・・・、M)、n
はブロック中の閾+1のrm ti (n=1 v・・
・、N)を表わす。
Now, pixels in a plurality of blocks are expressed as 5rnn. Here, Smn is day 10" or black 012, m is the block number among multiple blocks (m = 1 +..., M), n
is the threshold+1 rm ti (n=1 v...
・, N).

調レベルのそれぞれ最大1直と厳小櫃となり、(1)式
の直はこれらの4大値と最小直の屑分金とる形になって
いる。Qは排曲的論理沌を禰わす。
Each of the key levels has a maximum value of 1 and a small value, and the value of the value in equation (1) is taken as the sum of these four major values and the minimum value. Q expresses a discursive logical chaos.

実際にVよ、各ブロック内の一度は厳密には一様ではな
いが、ブロック間で平均をとるので、ブロックの個数k
 4 +固橿度とれば問題ない。
In fact, V, the number of times in each block is not strictly uniform, but it is averaged across blocks, so the number of blocks k
There is no problem if you get 4 + hardness.

条件(If)については、各ブロックは次の(Z) +
 (3)式が成立するとき、ブロック内のすべての画素
がそれぞれ白と黒になる。
For the condition (If), each block has the following (Z) +
When equation (3) holds true, all pixels within the block become white and black, respectively.

(J  8mn=0   (m=L  2*””M) 
    12)n側1 A Smn = 0  (m=1+ 2r=M)   
””、!Gs図は上述の原理に従う本発明の実施例の構
成説明図でめシ、自重検出回路を示す。
(J 8mn=0 (m=L 2*””M)
12) n side 1 A Smn = 0 (m=1+ 2r=M)
"",! The Gs diagram is a configuration explanatory diagram of an embodiment of the present invention according to the above-mentioned principle, and shows a self-weight detection circuit.

同図において、・・−ドウエア構成を簡単化するため、
1ブロツクの大きさを2×4画素にとる。つま#)54
2図に示すディザマトリックスC上2行。
In the same figure, in order to simplify the hardware configuration,
The size of one block is set to 2 x 4 pixels. Tsum #) 54
The top two rows of dither matrix C shown in Figure 2.

F2行をそれぞれ1ブロツクにとる。また、ISl調の
変化分の最大重を決める積数ノロツクの開数を4とする
Take each F2 line as one block. Further, the numeric value of the multiplier nolock that determines the maximum weight of the change in the ISL tone is set to 4.

まrl−淡画鍼と又字画1峨の混在した多1直画1象信
号■を比較器(COMP)10.itに並列入力する。
Comparator (COMP)10. Input it in parallel.

比較器10は多重自虐1d号■を単−I媚直■によシ2
直化する。比較器11は多;直両1象1d号■をディザ
1禰1直■によシフ1直化する。丈なわら、ラインカウ
ンタ(CNT)15と画JA数カウンタ(CNT)14
はそれぞれ’F欧2ピットを読出し専用メモリ(ROM
)12のアドレスに入力し、140M12に第2図に示
したようなディザ閾値音発生させる。
The comparator 10 converts the multiple self-abuse number 1d ■ into single-I flattery ■ 2
Become straight. The comparator 11 converts the multi-direction signal 1d into a single signal by dithering the signal into a single signal. Line counter (CNT) 15 and stroke JA number counter (CNT) 14
are read-only memory (ROM) with two pits each.
) 12 and causes 140M12 to generate a dither threshold sound as shown in FIG.

ざ−C121直化された単純21直信号■と2j直ディ
ザ1百号■はそれぞれシフトレジスタ(SR) 15と
16に入力し、直並列&換を行なう。4ビット並列に&
倶した単純2櫃データ■tメモリ(MEM)17に蓄4
責し、21直デイザデータ■をメモリ(MEM)19に
蓄積する。そして上記の動作を−返し−C,1ライノ目
のデータ■と■をそれぞれメモリ17と19に#遺し終
ると、次に2ライ/目のデータ■と■tそれぞれメモ!
j (tvigM) 18と20に蓄積する。
The simple 21 direct signal (2) which has been converted into a Z-C121 signal and the 2J direct dither number 100 (2) are input to shift registers (SR) 15 and 16, respectively, and are subjected to serial/parallel conversion. 4 bit parallel &
2 simple data stored in memory (MEM) 17
The 21st shift dither data (2) is stored in the memory (MEM) 19. Then, when the above operation is returned to C and the data of the 1st rhino is left in memories 17 and 19, respectively, the data of the 2nd rhino and the data of ■ and ■t are memorized respectively!
j (tvigM) Accumulate on 18 and 20.

メモリ17.18.19.20は4ビツト/ワードの構
成で、谷メモリとも厳重1ライン分のデータを格納でき
る4菫を有する。
Memories 17, 18, 19, and 20 have a configuration of 4 bits/word, and have 4 violets that can store exactly one line of data together with the valley memory.

以F−1(1足条件(1) 、 (n)に関連した構成
と動作につ@説明する。
The configuration and operation related to F-1 (one foot condition (1), (n)) will be explained below.

〔1)判定条件(1)の決尼 2ライン分の画成データの#債が終ると、まずメモリ1
9と20から4ワ一ド分読出t0データ■金1ワードr
つiA次続出r心に以ドに述べる迅速を行なう。
[1] When the determination condition (1) is completed, first the memory 1 is
Read t0 data for 4 words from 9 and 20 ■ Gold 1 word r
I will continue to do the following quickly in my heart.

カウンタ((、’NT)21と22はメモリ17.1B
、 19゜20のアドレスカラ/りでるる。
Counters ((,'NT) 21 and 22 are memory 17.1B
, 19°20 address color/rideruru.

カウンタ22はf位2ピットをカウントし、4ワ一ド分
だけ読出すのに用いる。
The counter 22 counts 2 pits at the f position and is used to read out 4 words.

まずレジスタ(REG)26と28には16進沃示でそ
れぞれ(FF)xと(00)*のデータを初期1直とし
てセットし−(a(。次にカウンタ22を1つカウント
アンプし、メモリ19と20からそれぞれ1ワ一ド分読
出tと、読出したデータ■の8ビツトをレジスタ260
内尋とAND回P625で調理槓(ANDンをとるとと
もに、レジスタ2日の内容とOR回路27でぃ浦4+1
j(OR)t−とり、それぞれレジスタ26 、28に
ヒツトする。
First, the registers (REG) 26 and 28 are set with the data of (FF) One word t is read from each of the memories 19 and 20, and 8 bits of the read data 2 are stored in the register 260.
Cooking shell (AND) with Uchihiro and AND time P625, and the contents of register 2 and OR circuit 27 Diura 4+1
j(OR)t- and hits registers 26 and 28, respectively.

上記と同様にして、カラ/り22t1つずつカウントア
ンプして、メモリ19.20から逐次データt、4出し
、AND ト(JRtとす、レジスタ26.28にセッ
トする。
In the same manner as above, count and amplify one color/22t at a time, sequentially output data t and 4 from memory 19.20, AND (JRt), and set in registers 26.28.

この!db作を4回繰返す。ANDとORをとる動作に
より、レジスタ26と28には4ブロツク間の階調レベ
ルの最小1直と最大重が求められる。次にレジスタ26
と28の自答を排曲的論4和回M(EOR)29に入れ
EORkとることにより、4ブロツク間の夏化分の最大
il!■が求められる。この)直[有]はROM 50
のアドレスに入力される。ROM50は最大1直[相]
が所定の直以上のとき出力信号@は”1″を出力し、そ
の直が所定値未満のときは′0″を出力する。
this! Repeat db creation 4 times. By performing AND and OR operations, the registers 26 and 28 determine the minimum value of 1 and the maximum value of the gradation levels between the four blocks. Next, register 26
By putting the self-answer of 28 into the 4 summation M (EOR) of 29 and taking EORk, the maximum il of summerization between 4 blocks! ■ is required. This) direct [has] ROM 50
is entered in the address of ROM50 has a maximum of 1 direct [phase]
The output signal @ outputs "1" when the value is greater than or equal to a predetermined value, and outputs "0" when the value is less than a predetermined value.

この1d号@は7リツグ70ング(FF ) 31にセ
ットされる。
This number 1d @ is set to 7 rigging 70 ng (FF) 31.

(2)NIJj:条件1)の決定 次に、カラ/り22 t−クリアした後、カウンタ22
t1つカウントアラブレ、メモリ17.18.19.2
0からそれぞれ1ワードd出す。メモv 17,18か
ら続出された単純211!データ■はゲート回路26と
24をノaしそれぞれNANDl路25 ’t’ NA
ND kと、0 、OR回路24で0Rt−とる。
(2) NIJj: Determination of condition 1) Next, after clearing the color/re 22 t-, the counter 22
t1 count Arabure, memory 17.18.19.2
Output one word d each starting from 0. Simple 211 continued from Memo v 17 and 18! Data ■ connects gate circuits 26 and 24 to NAND1 path 25 't' NA
ND k, 0, and OR circuit 24 take 0Rt-.

その出力1d号0と■をAND回路32に人力する。The output 1d No. 0 and ■ are inputted to the AND circuit 32.

出力1d号■はそのブロックの単純2直画ぶがオール黒
でないとき′1”とな夛、出力16号Qは上記画素がオ
ール白でないと*”i”となる。すなわち、門れの4会
も1つでも白黒の変化がめるとき、−tなわち文字画像
のときには両川力信号とも”1”となる。
Output No. 1d (■) becomes '1' when the simple 2-directions of the block are not all black, and output No. 16 Q becomes *'i' when the pixels are not all white. In other words, the number 4 of the gate When there is even one change in black and white, -t, that is, when it is a character image, both the Ryokawa power signals become "1".

一方、フリップフロップ61よジ、判定条件(1)によ
る出力16号[株]もANI) l!l!l路62に入
力しである。
On the other hand, output No. 16 [stock] of flip-flop 61 according to judgment condition (1) is also ANI) l! l! It is input to the l path 62.

AND回路62の出力1ぎ号(ロ)は、前記判定条件(
■ハ(II)が成立つとキ゛0”となplそれ以外のと
きは1@となる。つまシ、1g号■は注目ブロックを文
字画1象と補足したとき1′″となp1員淡mi+破と
判定したとき0″となる。注目ブロックの、4L純2I
直データ■と2直デイザデータ■はともに分岐され、マ
ルチプレクサ(MPX)3!lに人力されている。マル
チプレクサ66は1d号■によって(1ン注目ブロツク
が文字画1砿と1足されたとき、単純2直データ■を趨
し、ま九(1)注目ブロックが動機画像と判定されたと
き、2直ディザデータ■全通す。以上のようにして、マ
ルチプレクサ55の出力には画質改善された2 tE画
一1百号■が得られる。なお、制御回路40に19上記
壱カウンタ13.14.21.22、シフトレジスタ1
5,16、レジスタ26.28.フリップフロップ51
4!のタイミング制−が行なわれる。
The output number 1 (B) of the AND circuit 62 satisfies the above-mentioned judgment condition (
■If C(II) holds, the key becomes 0'', otherwise it becomes 1@.Tsumashi, No. 1g■ becomes 1''' when the block of interest is supplemented with one character image, and p1 member is indifferent. It becomes 0'' when it is judged as mi+ broken.The 4L pure 2I of the block of interest
Direct data ■ and 2-direct dither data ■ are both branched and sent to multiplexer (MPX) 3! It is man-powered by l. The multiplexer 66 uses No. 1d (1) when the block of interest is added to the character stroke 1 and the simple 2-direction data (1), when the block of interest is determined to be the motive image, (2) The direct dither data ■ are all passed through. In this way, the output of the multiplexer 55 is obtained as 2 tE 100 ■ with improved image quality. In addition, the control circuit 40 has the above 19 counters 13, 14, 21. .22, shift register 1
5, 16, register 26.28. flip flop 51
4! A timing system will be used.

判定条件(II)の判定を4ブロツク分繰返して、4ブ
ロツクの画質改善をすると、カウンタ21は1つカウン
トアツプされ、カウンタ22はクリアされて次の4ブロ
ツクの画質改善に備える。以ド同様に上記の動作を繰返
して画質改善を行なう。
When the judgment of judgment condition (II) is repeated for four blocks to improve the image quality of four blocks, the counter 21 is incremented by one and the counter 22 is cleared to prepare for the image quality improvement of the next four blocks. Thereafter, the above operations are repeated in the same manner to improve the image quality.

このようにして、5g1図(O)に示tように本発明に
より画質改善した文字画1砿は当然のことながら同図(
α)と同一になる。
In this way, as shown in Figure 5g1 (O), one character stroke whose image quality has been improved by the present invention is naturally shown in Figure 5g1 (O).
α) becomes the same.

本実ml+すでは、ブロックの大きさτ2X41[!I
I素にとったが、これは4×4画素の4曾についても同
様vc4えることができる。また、本方式は第2図に示
したディザマトリックス以外の形式にも1走用口丁I]
巨である。
In real ml+su, the block size is τ2×41[! I
Although we took the I element, the same can be said for the 4 elements of 4×4 pixels as well. This method can also be applied to formats other than the dither matrix shown in Figure 2.
It's huge.

また、実施例ではワイアードロジックで回路を構成した
Ja曾を示したが、ビットスライスのマイクロプロセッ
サ等を用いて、ゲート回路弄の磯iピを代行することに
よシ、回路構成をさらに簡単化することができる。
In addition, although the example shows a circuit configured with wired logic, the circuit configuration can be further simplified by using a bit slice microprocessor or the like to act as a gate circuit controller. can do.

(6)発明の詳細 な説明したように、本発明によれば、f!!故閾1直t
ディザマトリックスに設定したiM出系と単一14直を
設定した炭田系を設け、−炭画順と文字。
(6) As described in detail, according to the present invention, f! ! Late threshold 1st shift
An iM output line set in the dither matrix and a coalfield line set with a single 14th shift are set up, and -charcoal drawing order and letters are set.

図形画家とが混在する画慮データをブロック単位に論4
演算で、濃淡自虐か文字画誠かを判定するので、ハード
ウェア構成が簡単であり、かり尚速のm+1改−を行な
うことができる。
Discussion of planning data mixed with figure artist in block units 4
Since it is determined by calculation whether it is shading or masochism, the hardware configuration is simple, and m+1 correction can be performed very quickly.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(α)〜(6)はに米クリおよび本発明VCよる
文字画1砿例、5g2図Vよディリ′マトリックスの1
例、第6図Vま本@明の、lI!!1M例の構成説明図
Cあり、図中、10、11は比較4、L5.14.21
.22はカラ/り、12、30はROM、 15.16
はシフトレジスタ、17゜18、19.20はメモリ、
25.32はAND1gljii!)、24゜27はO
R回路、26はNAND m路、29はBOR回+1’
M、26.28はレジスタ、61はフリップフロップ、
66はマルチプレクサ、4oは制−回路を示す。 特許出禎人富士通株式会社 復代理人 弁理士 1)坂 身 重 第1図 (a)、      (1)) 第2図
Figures 1 (α) to (6) are examples of character strokes made by the VC of the present invention, 5g2 Figure V, and 1 of the Diri' matrix.
Example, Figure 6 V Mamoto @ Ming's, lI! ! There is a configuration explanatory diagram C for the 1M example. In the diagram, 10 and 11 are comparison 4, L5.14.21
.. 22 is color/re, 12, 30 is ROM, 15.16
is a shift register, 17°18, 19.20 is a memory,
25.32 is AND1gljii! ), 24°27 is O
R circuit, 26 is NAND m path, 29 is BOR circuit +1'
M, 26.28 is a register, 61 is a flip-flop,
66 is a multiplexer, and 4o is a control circuit. Patent Attorney Fujitsu Limited Sub-Agent Patent Attorney 1) Shige Saka Figure 1 (a), (1)) Figure 2

Claims (1)

【特許請求の範囲】[Claims] 濃淡画慮と文字2図形画慮とが混在する画1峨データを
、複a閾値をディザマトリックスに設だしfc第1の検
出系と、単−間11i[を設定し九42の検出系に並列
に記憶させ、III記ディザマトリックスまたはその一
部のa数画素を1ブロツクとし、第1の検出系に注目す
るブロックを含yy41故ブロック間の階調レベルの変
化分の最大値を検出する手段を、第2の検出系に注目す
るブロックを単−一1直でレベル変化を検出する手l1
1.を設け、前記51!1の検出系の4一段の変化分の
最大値が所定直以上で、第2の検出系の手段の検出値に
異なるレベル灰化かめるとき、前d己注目するブロック
のデータを文字2図形画家と判定し単−閾直による検出
信号を出力することを特徴とする画1a慣出方式。
For stroke 1 data in which gradation planning and character 2 figure planning are mixed, a multi-a threshold is set in the dither matrix, and fc first detection system and single-interval 11i [ are set to be set to 942 detection system. They are stored in parallel, a number of pixels of the dither matrix III or a part thereof are set as one block, and the block to be focused on is included in the first detection system, so the maximum value of the change in gradation level between the blocks is detected. A method for detecting a level change in a single block focusing on the second detection system.
1. is provided, and when the maximum value of the change in step 4 of the 51!1 detection system is equal to or greater than a predetermined value, and the detection value of the second detection system has a different level of graying, the previous block of interest is A picture 1a habituation method characterized by determining data as a character 2 graphic artist and outputting a detection signal based on a single threshold.
JP57109229A 1982-06-25 1982-06-25 Picture detecting system Pending JPS59270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57109229A JPS59270A (en) 1982-06-25 1982-06-25 Picture detecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109229A JPS59270A (en) 1982-06-25 1982-06-25 Picture detecting system

Publications (1)

Publication Number Publication Date
JPS59270A true JPS59270A (en) 1984-01-05

Family

ID=14504881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109229A Pending JPS59270A (en) 1982-06-25 1982-06-25 Picture detecting system

Country Status (1)

Country Link
JP (1) JPS59270A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS614368A (en) * 1984-06-19 1986-01-10 Canon Inc Picture processor
JPS61169083A (en) * 1985-01-21 1986-07-30 Canon Inc Image processing system
JPS62104379A (en) * 1985-10-31 1987-05-14 Ricoh Co Ltd Digital copying device
JPH0637315U (en) * 1992-10-15 1994-05-17 良三 竹村 Feather
US5321523A (en) * 1988-03-11 1994-06-14 Canon Kabushiki Kaisha Image processing apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS614368A (en) * 1984-06-19 1986-01-10 Canon Inc Picture processor
JPS61169083A (en) * 1985-01-21 1986-07-30 Canon Inc Image processing system
JPS62104379A (en) * 1985-10-31 1987-05-14 Ricoh Co Ltd Digital copying device
US5321523A (en) * 1988-03-11 1994-06-14 Canon Kabushiki Kaisha Image processing apparatus
JPH0637315U (en) * 1992-10-15 1994-05-17 良三 竹村 Feather

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