JPS5925408A - Automatic gain control system - Google Patents

Abstract

PURPOSE:To increase a dynamic range and to reduce the distortion, by actuating the 1st variable gain control as an emitter earth type amplifier when the input signal increases in order to reduce the output signal of an output terminal and therefore decreasing the increment of the subsequent input signals by the 2nd variable gain circuit. CONSTITUTION:The 1st variable gain circuit is provided with transistors TRQ1, Q2 and Q9, and the emitters of the TRQ1 and Q2 are grounded with a resistance R4. At the same time, the AGC feedback voltage is applied to the base of TRQ9, and the signal is supplied to the base of the TRQ1 from an input terminal 1. The collector of the TRQ9 is connected to the base of the TRQ2, and DC voltage VB2 is supplied to the bases of the TRQ1 and Q2 via resistances R3 and R5. The 2nd variable gain circuit consisting of TRQ7 and Q8 is connected to the collector of the TRQ1, and the AGC feedback voltage is applied to the base of the TRQ7. Then an output signal is extracted out of a load resistance R1. The 1st and 2nd variable gain circuits are used in response to the level of the AGC feedback voltage. Thus the dynamic range is increased to an automatic gain control circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control system for radio frequency signals (referred to as RF
It F'A (abbreviated as AGC method) improves practical sensitivity in 1-weak electric fields and reduces distortion during ultra-fine input.
The purpose is to provide a GC method.

Referring to the drawings below, FIG. 1 shows a circuit diagram of an example of an RFAGC circuit using a conventional differential amplifier. Q,
, Q, are a pair of transistors, the base of one transistor Q1 is supplied with the input signal, and the base of the local transistor Q1 is supplied with the AGC feedback. Q
3 is a constant current circuit transistor, whose base is connected to a constant voltage, and a constant DC current is constantly flowing between the collector and emitter.If the input signal is strong, the output signal of transistor Q1 increases, and the AGC feedback voltage also increases, so the bias current of transistor Q1 changes, its pm decreases, and the output signal of transistor Q increases.The one-way force signal is weak. Then, the output signal of transistor Q decreases, but
Since the AGC feedback voltage also decreases, the bias current of transistor Q1 changes and its 1m increases, and the bias current of transistor Q1 increases.
A control is applied to reduce the output signal of . In the sentence-intermediate type different timing, the AGC voltage and gIn of the transistor Q1 do not change, and the output signal is not controlled. Automatic gain control is performed in this manner.

Figure 2 shows I't using a conventional common emitter amplifier.
A circuit diagram of an example of a FAGC circuit is shown. In the figure.

Q4 is a transistor whose base is supplied with an input signal. Q is a transistor connected in cascade to the transistor Q4, whose base is supplied with a DC source voltage. Q6 is a transistor whose emitter is commonly connected to the emitter of the transistor Q, and whose base is supplied with the AGC feedback voltage.

Now, when the input signal is strong (when the collector signal of transistor Q increases, the output signal of transistor Q5 also increases, but at the same time, the AGC feedback voltage increases and the bias current of transistor Q6 also increases, so the transistor The bias current of Q changes, its pm decreases,
Control is applied to the increase of the output signal. When the one-sided force signal becomes weaker.

The collector signal of transistor Q4 decreases and the output signal of transistor Q also decreases, but the AGC feedback voltage also decreases and the bias current of transistor Q6 also decreases, so the bias current of transistor Q changes and its pm increases and controls the decrease of the output signal.

Automatic gain control is performed in this manner.

However, in the conventional circuit shown in FIG. 1, the mutual conductance Jam is large, so when an electric field of 5 or less is input.

Although the practical sensitivity is good (good S/'N), the input dynamic resin is narrow and distortion increases when ultra-fine input is used. In addition, in the conventional circuit shown in Fig. 2, the input magnitude resin is large but the mutual conductance pm is small, so the practical sensitivity is poor when an electric field of 1 weak is input, and therefore the S/
There was a drawback that N deteriorated.

The present invention eliminates the above-mentioned drawbacks.

An embodiment thereof will be explained with reference to FIG. 3 and the following figures.

FIG. 3 shows a circuit diagram of a first embodiment of the RFAGC circuit according to the present invention. In the figure, the same parts as those in FIGS. 1 and 2 are given the same reference numerals, and their explanations will be omitted. In FIG. 3, reference numeral 1 denotes an RF signal source, one end of which is grounded and the other end connected to the input terminal 2 of the semiconductor integrated circuit chip via a capacitor C1.

Input terminal 2 is connected to the base of transistor Q (NPN). This base is supplied with the ilE source voltage v112 through a resistor R5. Transistor Q.

The emitter of is grounded via a resistor R6, and the collector is connected to the emitter of an NPN transistor Q7 via a resistor R7. The base of transistor Q7 is the fifth
The AGC feedback voltage is supplied through the transistor Q+o shown in the figure, and the collector is connected to the output terminal 3. In addition, the above collector is connected to the original voltage V through the resistor R1.
B is supplied. Q is an NPN transistor, the emitter is connected to the collector of transistor Q1,
A power supply voltage VB□ is supplied to the base, and a power supply voltage VB is supplied to the collector. Q2 is an NPN transistor whose emitter is connected to the emitter of the transistor Q, whose base is supplied with the power supply voltage n2 through a resistor R6, and whose collector is supplied with the original voltage VB. Q
, is an NPN) transistor, the emitter is grounded through the resistor R6, and the collector is connected to the base of the transistor Q.

At the base is a transistor Q +o r Q shown in Figure 5.
AGC feedback N pressure is supplied via ++.

Therefore, transistors Q, ,Q, ,Q constitute a 10iJ variable gain circuit, and the base of transistor Q1 is the signal terminal of this circuit, transistor Q.

The collector of is the output terminal of this circuit, and the base of transistor Qo is the control terminal of this circuit.

Further, transistors Q, , Q, constitute a second variable gain circuit, and the emitters of transistors Q, , Q8 are the @ input terminal of this circuit, and transistor Q.

The collector of Q7 is the output terminal of this circuit, and the base of transistor Q7 is the control input terminal of this circuit.

The first AGC is connected to the control input terminal of the variable gain circuit.
A voltage is applied, and a second AGCt pressure is applied to the control input terminal of the second variable gain circuit. Therefore, the output signals of variable gain circuits Q+, Q2, Q- of measure 1 and the second variable gain circuit Q? , Q8 are supplied to a resistor R3 as a load impedance means.

Therefore, when a weak electric field is input, the AGC feedback voltage applied to the base of the transistor Q9 is very small, so the transistor Q9 is off, and the transistor Q2 is biased with the DC power supply voltage vI]. QI and Q operate as differential amplifiers. That is, the RF multiplied signal applied to the input terminal 2, this differential multiplication 1111
After being amplified by one amplifier, the signal is taken out from the output terminal 3 through a transistor Q7 connected in cascade to this amplifier. Here, since the voltage applied to the base of transistor Q7 is large, transistor Q? is saturated, but transistor Q8 is cut off. Since a differential amplifier is used here, a high transconductance gm is obtained,
The practical sensitivity is high, for example, 46 dBμ/m, which is extremely high for an integrated circuit. Therefore, the S/N is also good.

Therefore, at intermediate electric field strength, as the input signal increases, the AGC feedback voltage also increases, and the transistor Q
2 heading into the cutoff. Then, the gain of transistor Q1 decreases. Therefore, the AGC function is performed by transistor Q2. At this time, since the voltage applied to the base of transistor Q is large, transistor Q is saturated, but transistor Q is cut off.

Next, at the time of ultra-fine input, the AGC feedback voltage applied to the base of transistor Q9 is large.

Therefore transistor Q9 is on and transistor Q
engineering is turned off. Therefore, transistor Q.

operates as a common emitter amplifier. That is, the RF multiplied signal applied to the input terminal 2 is amplified by this common emitter amplifier, and then taken out from the output terminal 3 via the transistor Q7 connected in cascade to the amplifier. At this time, transistor Q? 1Q6 operates in the active region, and the AGC function is performed by the common-base amplification transistor Q7. Since a common-emitter amplifier is used here, a wide dynamic range is achieved, distortion is reduced, and the electric field strength is 126 dBμ/ m or less, the distortion rate is 1% or less.

FIG. 4 shows a circuit diagram of a second embodiment of the RFAGC circuit according to the present invention. In the figure, the same parts as those in the third diagram are designated by the same reference numerals, and their explanations will be omitted. In this embodiment, the DC power supply voltage V82 is an emitter follower type transistor Q. , is applied to the base of transistor Q through resistor R9.

Also, resistor ■ (6, emitter follower transistor Qn
to the base of transistor Q2. Therefore, the output impedance of the bias power supply is small, noise is reduced, and the bias is stabilized.

The present invention is particularly effective when applied to AM tuners.

As described above (according to the automatic gain control method of the present invention,
During ultra-fine input, the first variable gain circuit Q+ rQ operates as a base-input crab-limiter grounded amplifier with its emitter grounded via resistor R4, providing a wide dynamic range, reducing distortion, and ensuring AM output. It has the following advantages:

[Brief explanation of the drawing]

1 and 2 are circuit diagrams of each side of a conventional automatic gain control circuit, FIG. 3 is a circuit diagram of a first embodiment of the automatic gain control system of the present invention, and FIG. 4 is a circuit diagram of a second embodiment of the automatic gain control system of the present invention. Example circuit diagram, 5th
The figure is a circuit diagram of a voltage generating circuit for generating the AGCt pressure supplied in the first embodiment of FIG. 3. Q, ,Q2,Q,...first variable gain circuit, Q7゜Q,...20th variable gain circuit, R1...load impedance means. Figure 3 Figure 4 Figure 5 Figure 36-

Claims (1)

[Claims] 1. First and second variable gain circuits each having an @ input terminal, a control input terminal, and an output terminal. The signal input terminals of the first and second variable gain circuits are provided with a load impedance, the signal input terminals of the first and second variable gain circuits are responsive to a signal from an input signal source, and the control input terminal of the first variable gain circuit has a load impedance. A first AGC voltage is applied, and the second AGC voltage is applied.
A second AGC voltage is applied to the control input terminal of the variable gain circuit. The load impedance means is supplied with a signal related to the output signal of the output terminal of the first variable gain circuit and the output signal of the output terminal of the second variable gain circuit; Upon an increase in the level of the signal of the input signal source, the first AGC voltage causes the output signal at the output terminal of the first variable gain circuit to decrease, and upon a subsequent increase of the signal of the input signal source, the first AGC voltage decreases the output signal at the output terminal of the first variable gain circuit. 2 AGC
An automatic gain control method characterized in that the voltage is reduced by the second variable gain circuit. 2. When the signal from the input signal source is extremely strong, the first variable gain circuit is operated as a base-input crabmitter grounded amplifier whose emitter is grounded via a resistor. Automatic gain control method described in section.