JPS5923825U - DMA transfer stop device - Google Patents
DMA transfer stop deviceInfo
- Publication number
- JPS5923825U JPS5923825U JP11717882U JP11717882U JPS5923825U JP S5923825 U JPS5923825 U JP S5923825U JP 11717882 U JP11717882 U JP 11717882U JP 11717882 U JP11717882 U JP 11717882U JP S5923825 U JPS5923825 U JP S5923825U
- Authority
- JP
- Japan
- Prior art keywords
- listener
- talker
- stop device
- signal
- dma transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案に係るＤＭＡ転送停止装置の一実施例を
示す構成図、第２図はタイムチャートである。
１０・・・マイクロプロセッサ、２０・・・ＧＰＩＢ
トーカ−／リスナー、２１・・・ＥＯＳレジスタ、２２
・・・インタラブド・イネーブル・レジスタ、３０・・
・ＤＭＡコントローラ。FIG. 1 is a block diagram showing an embodiment of a DMA transfer stop device according to the present invention, and FIG. 2 is a time chart. 10...Microprocessor, 20...GPIB
Talker/listener, 21... EOS register, 22
... Interwoven enable register, 30...
・DMA controller.
Claims (1)
スする機能を有するＧＰＩＢトーカ−／リスナーのＥＯ
Ｓレジスタに特定のパターンを設定しておき、このパタ
ーンデータと一致するデータを受けたときエンド受付は
モードに入り、ＥＯＩ又はＥＯ３信号を受けると初めて
インタラブド・イネーブル・レジスタのＥＮＤがセット
されてインタラブド信号を出力するようにトーカ−／リ
スナーを構成し、該トーカー／リスナーのインタラブド
出力をＣＰＩＢに接続されたＤＭＡコントローラのＤＭ
Ａ転送を停止する信号に使用するようにしたことを特徴
とするＤＭＡ転送停止装置。A GPIB talker/listener EO that has the ability to interface a microprocessor to GPIB.
A specific pattern is set in the S register, and when it receives data that matches this pattern data, the end reception enters the mode, and when it receives the EOI or EO3 signal, the END of the interleaved enable register is set for the first time, and the interleaved mode starts. Configure a talker/listener to output a signal, and connect the interconnected output of the talker/listener to the DM of the DMA controller connected to the CPIB.
A DMA transfer stop device characterized in that it is used as a signal to stop A transfer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11717882U JPS5923825U (en) | 1982-07-30 | 1982-07-30 | DMA transfer stop device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11717882U JPS5923825U (en) | 1982-07-30 | 1982-07-30 | DMA transfer stop device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5923825U true JPS5923825U (en) | 1984-02-14 |
Family
ID=30269842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11717882U Pending JPS5923825U (en) | 1982-07-30 | 1982-07-30 | DMA transfer stop device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5923825U (en) |
-
1982
- 1982-07-30 JP JP11717882U patent/JPS5923825U/en active Pending
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