JPS59228783A - Manufacture of gaas semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a GaAs semiconductor device having preferably characteristics by forming an active layer capable of being formed directly with ohmic contact electrode and sufficiently performing the role as the active layer by one ion implantation. CONSTITUTION:After a dioxidized silicon SiO2 film is first formed as a mask layer to become a mask for ion implantation on a GaAs substrate, ion implanting hole is formed. Then, silicon ion Si<+> is implanted in the dosage of 3.5X 10<12>cm<-2> or higher through the hole, and then an annealing is performed for approx. 30min at approx. 800-820 deg.C to form an active layer. GaAs is much larger in electron mobility (mu) than Si. This mu is varied depending upon the dosage under the annealing condition, and is 4,000cm<2>/V.sec at the maximum. Accordingly, the role as the active layer can be effectively performed, and ohmic contacting electrode can be effectively attached by the active layer, which is performed by ion implantation by the formula between the dosage Q and the mu.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a gallium arsenide (GaAs) semiconductor device that can improve pattern accuracy and increase yield by eliminating the effects of mask alignment errors and etch pit density. Relating to a manufacturing method.

Conventional structure and its problems GaAs has extremely high electron mobility compared to silicon (Si), which is the main material of semiconductor devices, has a wide forbidden band width, and can be a semi-insulating material. Because of its superiority, it has come to be widely used as a starting material for high-frequency semiconductor devices and Hall elements.

By the way, when manufacturing a semiconductor device using a GaAs substrate, it is essential to form an active layer in the CraAs substrate, and either a method using epitaxial growth or a method using impurity ion implantation is adopted. An ion implantation method that takes advantage of the GaAs substrate's semi-insulating properties and separates the active layer from the GaAs substrate itself is mainly used.

FIG. 1 is a diagram showing the cross-sectional structure of a conventional GaAs H/L device using such a GaAs substrate as a starting material and in which an active layer is formed by an ion implantation method. A low-concentration n-type active layer 2, which becomes a magnetoelectric conversion region, is formed by ion implantation, and an n''-type region 2 is added at the position where an electrode is to be formed in this active layer to obtain good ohmic contact. and 3 are built in, and electrodes 6 and 6 are attached to these areas.

FIG. 2 is a diagram showing the cross-sectional structure of a conventional GaAs Hall element formed by combining an epitaxial growth method and selective etching using a GaAs substrate as a starting material. An n-type epitaxial layer is grown on the GaAs substrate 1. This is selectively etched to form an active layer 22 in a predetermined pattern, and furthermore, electrodes 52 and 62 are attached to this active layer 22.

FIG. 3 is a diagram showing the planar shape of the main part of the Hall element shown in FIGS. 1 and 2, and the active layer 2 (22) has a cross shape. In the active layer, electrodes 7 and 8 which become input electrodes and electrodes 5 (52) and 6 (which become output electrodes)
62) is attached. In the GaAs Hall element having such a structure, when an input voltage is applied between the input electrodes 7 and 8 and an external magnetic field is present, a Hall electromotive force is generated between the output electrodes.

Incidentally, the GaAs Hall element having the structure shown in FIG. 2 has been subjected to two ion implantation processes.

Therefore, it is impossible to completely eliminate errors in mask alignment between the ion implantation mask for forming the active layer 2 and the ion implantation mask for forming the n+ type regions 3 and 4. This error in mask alignment impairs the symmetry of the pattern and reduces the accuracy of the pattern. In a Hall element, the symmetry of the pattern of the active layer is particularly important, and if this is impaired, a Hall electromotive force is generated even in the absence of an external magnetic field, which causes the Hall element to malfunction.

On the other hand, in the method using epitaxial growth, the grown epitaxial layer is pattern-etched to form an active layer, but there is a problem that the etching becomes uneven due to the influence of the etch bit density of the epitaxial layer. Since it is difficult to make the etch pit density uniform over the entire area, there are also problems with pattern accuracy and pattern asymmetry, and there are problems with the generation of Hall electromotive force in the absence of an external magnetic field. .

It should be noted that prevention of pattern accuracy deterioration and elimination of pattern asymmetry are particularly important in Hall elements.
This is also important in high-frequency semiconductor devices in which the active layer has a fine pattern.

Purpose of the Invention The present invention provides that when manufacturing a GaAs semiconductor device, high pattern accuracy and symmetry can be ensured even though the active layer is formed by an ion implantation method, and as a result, GaAs with good characteristics can be obtained.
The object of the present invention is to provide a manufacturing method capable of obtaining a semiconductor device.

Structure of the Invention The method for manufacturing a GaAs semiconductor device according to the present invention includes forming a mask layer to serve as a mask for ion implantation on an insulating or semi-insulating GaAs substrate, and then selectively removing the mask layer. After forming an opening for ion implantation,
The dose is Q, the electron mobility of GaAs is μ, and Q/μ
The active layer is formed by implanting impurity ions at a dose that satisfies ≧8×1097 V, sec. According to this manufacturing method, since an ohmic contact electrode can be directly attached to the formed active layer, only one ion implantation process is required. Therefore, the problem of mask alignment errors can be reduced by H1, making it possible to manufacture a G&AS semiconductor device having a highly accurate and symmetrical active layer pattern.

DESCRIPTION OF EMBODIMENTS A method for manufacturing a GaAs semiconductor device according to the present invention will be described by taking a method for manufacturing a GaAs Hall element as an example.

First, a silicon dioxide (SIO2) film is formed on the raAs substrate as a mask layer for ion implantation, and then a cross-shaped opening for ion implantation is formed as shown in FIG. 3.Next, Through this enlightenment, silicon ions (
81'') was implanted at a dose of 3.6 x 1012cn2 or more, and then annealing was performed at a temperature of 800 to 820t for about 30 minutes to form an active layer.The annealing conditions were This is the condition for maximum recovery.

The sheet resistance of the active layer formed through the above processing is approximately 1K.
It is Q/10.

By the way, if the resistance of the active layer is too low, the active layer becomes conductive and ceases to fulfill its original role. Is this value strictly defined? 400
It is desirable to obtain a sheet resistance of 400'Ω27 or more, since the possibility of such problems occurring increases when the resistance is lower than C7.

Under the above annealing conditions, the dose Q is 8.5X
1 O12Cm", the sheet resistance becomes 400Q/
/D was experimentally confirmed.

On the other hand, whether or not a good ohmic contact electrode can be formed in the active layer is determined by the sheet resistance of the active layer, and if this value exceeds 1 to 7 Ω, it may be difficult to form a good ohmic contact electrode. Confirmed experimentally.

Note that one of the characteristics of GaAs from the viewpoint of physical properties is that the electron mobility μ is much larger than that of Si.

This electron mobility μ is as follows under the above mentioned annealing temperature:
The amount varies depending on the dose, and the highest value is 4000 ca.
r/V, about east. The active layer, which can reliably play the role of an active layer and which can also be reliably attached with an ohmic contact electrode, has the following characteristics: the dose Q and the electron mobility μ. This is achieved by an ion implantation process that establishes the relationship between the two.

FIG. 4 is a graph showing the experimental results for confirming the effect of the present invention, in which GaAs Hall elements were manufactured by the conventional method using ion implantation method and the manufacturing method of the present invention. The Hall electromotive force J) when an external magnetic field is applied is taken as Ait!llt, and the relative frequency is plotted on the vertical axis.In the figure, the solid line indicates the conventional method. The broken line B is a graph obtained by the manufacturing method of the present invention.

As is clear from the drawings, according to the manufacturing method of the present invention, a GaAs Hall element with a small unbalance rate can be obtained.

Effects of the Invention The manufacturing method of the present invention is capable of directly forming an ohmic contact electrode, and also forms an active layer capable of fully fulfilling its role as an active layer in a single ion implantation process. As a result, it is possible to manufacture a GaAs semiconductor device having an active layer with high pattern accuracy and ensuring symmetry.

Note that the formation of an active layer with a highly accurate pattern that ensures symmetry brings about uniformity of the characteristics of the semiconductor device and improves its manufacturing yield. Further, the work efficiency of the pot manufacturing process is improved since the number of ion implantations is one time.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional ml structure diagram of a conventional GaAs Hall element whose active layer was formed by ion implantation. Figure 2 is a cross-sectional view of a conventional GaAs Hall element whose active layer was formed by epitaxial growth and etching. 3 is a plan view of a main part of a GaAs Hall element not shown in FIGS. 1 and 2, and FIG. 4 is a graph showing experimental results for confirming the effectiveness of the manufacturing method of the present invention. be. 1,, =-GaAs substrate, 2, 22 =...=-active layer, 3゜4...region for forming ohmic contact electrode, 5
゜52.6.62・・・Electrode (input electrode), 7,8
...Output electrode. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 4
Figure f Ki impact (%) CC62ノ

Claims (2)

[Claims] (1) A mask layer that serves as an ion implantation mask is formed on an insulating or semi-insulating GILAS substrate, and the mask layer is selectively removed to form openings for ion implantation. , the dose amount is Q. The active layer is formed by implanting impurity ions at a dose that satisfies Q/μ≧8×109゛/V, sec, where the electron mobility of GaAs is μ. . (2) The GaAs semiconductor device according to claim 1, wherein the GaAs semiconductor device is a Hall element.
! 9. Method for manufacturing semiconductor device.