JPS5922375A - Light-emitting semiconductor device - Google Patents
Light-emitting semiconductor deviceInfo
- Publication number
- JPS5922375A JPS5922375A JP57132734A JP13273482A JPS5922375A JP S5922375 A JPS5922375 A JP S5922375A JP 57132734 A JP57132734 A JP 57132734A JP 13273482 A JP13273482 A JP 13273482A JP S5922375 A JPS5922375 A JP S5922375A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- alloy layer
- area
- lead wire
- inner diameter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 239000013543 active substance Substances 0.000 claims abstract description 5
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract description 18
- 229910045601 alloy Inorganic materials 0.000 abstract description 13
- 239000000956 alloy Substances 0.000 abstract description 13
- 229910052737 gold Inorganic materials 0.000 abstract description 8
- 230000007423 decrease Effects 0.000 abstract description 4
- 230000031700 light absorption Effects 0.000 abstract description 2
- 230000002708 enhancing effect Effects 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 18
- 229910000952 Be alloy Inorganic materials 0.000 description 8
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 8
- 229910001020 Au alloy Inorganic materials 0.000 description 7
- 229910005540 GaP Inorganic materials 0.000 description 7
- 241000587161 Gomphocarpus Species 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 235000012489 doughnuts Nutrition 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4845—Details of ball bonds
- H01L2224/48451—Shape
- H01L2224/48453—Shape of the interface with the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は良好なホンディング性と高発光出力を得ること
ができる発光ダイオード（以下ＬＥＩ）と記す）の電極
に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an electrode for a light emitting diode (hereinafter referred to as LEI) which can obtain good bonding properties and high light emission output.
従来例の構成とその問題点
ＬＥＤは砒化ガリウム（、ＧａＡｓ ）や燐化ガリウム
（ＧａＰ）等のＩＩＩ−Ｖ族化合物半導体からなり、ｎ
側およびｐ側にオーミック接触を得るための電極層か形
成される。そして通常、この電極層はリード線をこの電
極層に接着させるボンディングパソドを兼ねている。Conventional structure and problems LEDs are made of III-V compound semiconductors such as gallium arsenide (GaAs) and gallium phosphide (GaP).
An electrode layer is formed on the side and the p-side to obtain ohmic contact. Usually, this electrode layer also serves as a bonding pad for bonding lead wires to this electrode layer.
半導体とのオーミック接触は一般にドナーあるいはアク
セプタとなる不純物を含んだ金属を電極層として用いる
ときに得られる。しかし、これらの不純物を含んだ金属
電極層の表ｊ＋ｉは酸化膜を形成しやすく、そのためリ
ード線とのホンディング性が極めて悪くなる。そこで、
通常、この種の電極層は、オーミック接触を得るための
＠１層の上に良導電体の金属層を形成して２重層となし
、これによりボンディング性の改善を計ったものが用い
られている。Ohmic contact with a semiconductor is generally obtained when a metal containing impurities serving as a donor or acceptor is used as an electrode layer. However, an oxide film is easily formed on the surface j+i of the metal electrode layer containing these impurities, and as a result, the bonding property with the lead wire becomes extremely poor. Therefore,
Usually, this type of electrode layer is a double layer in which a metal layer with good conductivity is formed on the first layer to obtain ohmic contact, thereby improving bonding properties. There is.
例えばＧ ａ Ｐを素材とするＬＥＤの場合、通常、ｐ
側電極層がボンディングパノトを兼ねる。第１図に典型
的なＧａＰＬＥＤの断面図を示す。同図に示されるよう
に、リード線１はその先端のネイルヘッド部２を」二層
の金（Ａｕ）層３に圧着されている。そして、オーミッ
ク接触は、下層側の金（Ａｕ）とべＩＪ ＩＪウム（Ｂ
ｅ）との合金の層４により得ている。なお、第１図そ、
５はオーミック接触に形成されるアロイ層、６はｐ型Ｇ
ａ Ｐ層、７はｎ型ＧａＰ層、８はｎ″−型ＧａＰ基
板てあり、９はｎ１型Ｇ ａ Ｐ基板８とオーミック接
触をなす電極層、１ｏはアロイ層、１１はステムあるい
はコムと呼ばれる金ｌ萬体である、しかし、このような
電極構造でも溶接（アロイ化）等の熱処理工程の間に下
層のＡｕ −Ｂｅ合金層４中のＢｅが上層のＡｕ層３の
表面まで拡散し、上層のＡｕ層３の表面にＢｅの酸化膜
を形成することがあり、このため同表面にリード線１を
圧着したときのホンディング性が悪くなり、これが、製
造歩留り低下の大きな要因となっている。For example, in the case of an LED made of GaP, usually p
The side electrode layer also serves as a bonding panel. FIG. 1 shows a cross-sectional view of a typical GaPLED. As shown in the figure, the nail head portion 2 at the tip of the lead wire 1 is crimped to two gold (Au) layers 3. Ohmic contact is made between the gold (Au) on the lower layer side and the aluminum (B) on the lower layer side.
e) is obtained by layer 4 of an alloy with In addition, Figure 1
5 is an alloy layer formed in ohmic contact, 6 is a p-type G
7 is an n-type GaP layer, 8 is an n''-type GaP substrate, 9 is an electrode layer that makes ohmic contact with the n1-type GaP substrate 8, 1o is an alloy layer, and 11 is a stem or comb. However, even with this electrode structure, Be in the lower Au-Be alloy layer 4 diffuses to the surface of the upper Au layer 3 during heat treatment processes such as welding (alloying). , a Be oxide film may be formed on the surface of the upper Au layer 3, resulting in poor bonding properties when the lead wire 1 is crimped onto the same surface, and this is a major factor in reducing manufacturing yield. ing.
またＬＥＤの発光出力は一般に順方向電流の増加に伴い
向上する。特に、ＧａＰ（純緑色）ＬＥＤは、第２図に
示すように、その傾向が顕著である。Furthermore, the light emitting output of an LED generally improves as the forward current increases. In particular, this tendency is remarkable for GaP (pure green) LEDs, as shown in FIG.
この事実から翻ってみると、ＬＥＤの発光出力を向」ニ
させるためには、電流密度を増加させることも一つの方
策であるが、そのためには電極面積を小さくする必要が
ある。しかしながら、リード線１のネイルヘッド部２の
大きさには一定の制約かあって、任意に小さくはできず
、また、付着強度を考慮すると、電極層の面積をネイル
ヘッド部２の面積以下にすることは好ましくない。Considering this fact, one way to increase the light emitting output of the LED is to increase the current density, but this requires reducing the electrode area. However, there are certain restrictions on the size of the nail head portion 2 of the lead wire 1, and it cannot be made arbitrarily small.Also, when considering adhesion strength, the area of the electrode layer must be less than or equal to the area of the nail head portion 2. It is not desirable to do so.
発明の目的
本発明は、従来装置にみられた」二連のような問題点を
解消するものであり、リード線の電極層へのボンディン
グ性を良好にするとともに、発光出力をも向上させたＬ
ＥＤを提供するものである。Purpose of the Invention The present invention solves the problem of "double connection" seen in conventional devices, improves the bonding property of the lead wire to the electrode layer, and improves the light emitting output. L
It provides ED.
発明の構成
本発明は、半導体と接触し、活性物質を含む第１の導電
層の面積を、前記第１の導電層に接続され、リード線の
接着された第２の導電層の面積より小さくなした発光半
導体装置であり、これにより、第１の導電層から第２の
導電層の全域に及ぶ酸化性の強い活性物質の拡散が避け
られ、併せて、半導体との接触部面積を小さくすること
によって、１妾合の電流密度を高めて高出力特性を実現
するものである。Structure of the Invention The present invention provides that the area of a first conductive layer in contact with a semiconductor and containing an active substance is smaller than the area of a second conductive layer connected to said first conductive layer and to which a lead wire is attached. This is a light-emitting semiconductor device made of a semiconductor device, which avoids diffusion of a highly oxidizing active substance over the entire area from the first conductive layer to the second conductive layer, and also reduces the area of contact with the semiconductor. By doing so, the current density of one concatenation is increased and high output characteristics are realized.
実施例の説明
以下、ＧａＰ（純緑色）ＬＥＤにおける本発明の詳細な
説明する。本発明のＬＥＤの平面図と断面図を第３図（
ａ） 、 （ｂ）に示す。同図において、第１図と同一
番号は同一物を示す。ＬＥＤのチップサイズは１辺３０
０μｍの正方形で、リード線を付着させるためのＡｕの
層３を内径１６０７ｚｍの円形とし、ｐ型Ｇ ａ Ｐ層
６とオーミック接触を得るためのＡｕとＢｅとの合金層
４を最大外径１６０７１ｍ。DESCRIPTION OF EMBODIMENTS A detailed description of the present invention in a GaP (pure green) LED will be given below. Figure 3 (
Shown in a) and (b). In this figure, the same numbers as in FIG. 1 indicate the same parts. LED chip size is 30 on a side
The Au layer 3 is a square with a diameter of 0 μm, and the inner diameter of the Au layer 3 for attaching the lead wire is 1607 zm, and the Au and Be alloy layer 4 has a maximum outer diameter of 16071 m to obtain ohmic contact with the p-type GaP layer 6. .
内径１ｏｏｌ１ｍのドーナツ形とした。経験によると、
電極層の最大外径１５０μｍのもので、リード線のボン
デインク率は、ＡｕとＢｅとの合金層４の内径をγ１ｔ
ｍとして、その内径γに対する依存性がみられ、第４図
にその結果を示す。内径γか大きくなるにつれて、つま
りＡｕとＢｅの合金層４の面積が小さくなるにつれて、
電極の表面まで拡散してくるＢｅの量が減少して、ボン
ディング性か向−Ｉニジた。It was shaped like a donut with an inner diameter of 1 oool and 1 m. According to experience,
The maximum outer diameter of the electrode layer is 150 μm, and the bonding ink rate of the lead wire is γ1t, which is the inner diameter of the alloy layer 4 of Au and Be.
A dependence of m on the inner diameter γ was observed, and the results are shown in FIG. As the inner diameter γ increases, that is, as the area of the Au and Be alloy layer 4 decreases,
The amount of Be that diffused to the surface of the electrode decreased, and the bonding properties deteriorated.
また、発光出力のＡｕとＢｅとの合金層４の内径γに対
する依存性を第５図に示す。同図から明らかな様に、電
流はＡｕとＢｅとの合金層４を通して流れるため、電流
密度が増加したことに加えて、半導体中のアロイ層６の
面積の減少による光の吸収が減少したことによって、発
光出力が一段と向上している。Furthermore, the dependence of the light emission output on the inner diameter γ of the Au and Be alloy layer 4 is shown in FIG. As is clear from the figure, since the current flows through the Au and Be alloy layer 4, the current density has increased, and in addition, light absorption has decreased due to the decrease in the area of the alloy layer 6 in the semiconductor. As a result, the light output is further improved.
ところて、ＡｕとＢｅの合金層４の内径γを大きくして
いくと、所定電流を供給するための順方向電圧が高くな
る。この現象を勘案すると、内径γは９０〜１００μｍ
が適当である。この範囲にすること′により、対応の従
来装置にくらべて、ボンディング率で約３０％、発光出
力で約２０係の向」ニしたが確認された。However, as the inner diameter γ of the Au and Be alloy layer 4 increases, the forward voltage for supplying a predetermined current increases. Considering this phenomenon, the inner diameter γ is 90 to 100 μm.
is appropriate. It was confirmed that by setting the device within this range, the bonding rate improved by about 30% and the light emitting output increased by about 20 times compared to the corresponding conventional device.
なお、本発明はＧａＰＬＥＤに限らず、すべてのＬＥＤ
に適用でき、電極形状も円形に限らずすべての形状に対
して適用できる。Note that the present invention is not limited to GaPLEDs, but can be applied to all LEDs.
It can be applied to any electrode shape, not just circular.
発明の効果
以上に詳記したように、本発明は、電極層を二層構造と
し、半導体と接触し、活性物質を含む第１の導電層の面
積を、前記第１の導電層に接続されリード線の接着され
た第２の導電層の面積より小さくしたので、前記第２の
導電層上にリード線を圧着する場合に、リード線のホン
ディング部分には、第１の導電層内に存在する酸化性の
強い不純物が拡散析出して、この部分て酸化物を形成し
て、ワイヤホンディングを４「１害する物質か除かれて
いるので、ホンディング率すなわち、ワイヤボンデイン
クの良品率を顕著に向上させることができる。また、半
桿体と電極層との接触部分の面積の径小化により、半導
体側へ流入させる電流の密度を実質的に高めて、発光出
力の向上をはかることか可能であり、すくれたＬＥＤを
実現することかできる。Effects of the Invention As described in detail above, the present invention provides an electrode layer with a two-layer structure, in which the area of the first conductive layer that is in contact with the semiconductor and contains an active substance is connected to the first conductive layer. Since the area is smaller than the area of the second conductive layer to which the lead wire is bonded, when the lead wire is crimped onto the second conductive layer, the bonding portion of the lead wire has a surface area within the first conductive layer. Strongly oxidizing impurities that are present diffuse and precipitate, forming oxides in these areas, and substances that harm wire bonding are removed, thereby increasing the bonding rate, that is, the quality of wire bonding ink. In addition, by reducing the diameter of the contact area between the semi-rod and the electrode layer, the density of the current flowing into the semiconductor side can be substantially increased, thereby improving the light emitting output. It is possible, and it is possible to realize a compact LED.
第１図は従来の電極を用いたＬＥＤの断面図。
しＩ
ＬＥＤの平面１断面図、第４図は、リード線のボンディ
ング率のＡｕとＢｅの合金層の内径に対する依存性図、
第５図は、発光出力のＡｕとＢｅの合金層の内径に対す
る依存性図である。
１・・・・・・リード線、２・・・・・・リード線のネ
イルヘッド部、３・・・・・・リード線を付着させるた
めの導電性物質（Ａｕ）の層、４・・・・・オーミック
接触を得るための導電、性物質（ＡｕとＢｅの合金）の
層、６・・・・・・アロイ層、６・・・・・・ｐ型半導
体、７ ・・・・ｎ型半導体、８・・・・・ｎ型半導体
基板、９・・・・・・ｎ側電極、１ｏ・・・・・・アロ
イ層、１１・・・・・・ステムあるいはコム。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図
順方向電うＬ（７ｒ１．Ａ）
第 ３ 区
第４図FIG. 1 is a cross-sectional view of an LED using conventional electrodes. FIG. 4 is a cross-sectional view of the top surface of the LED, and FIG. 4 is a dependence diagram of the bonding ratio of the lead wire on the inner diameter of the Au and Be alloy layer.
FIG. 5 is a diagram showing the dependence of light emission output on the inner diameter of the Au and Be alloy layer. DESCRIPTION OF SYMBOLS 1... Lead wire, 2... Nail head portion of the lead wire, 3... Layer of conductive material (Au) for attaching the lead wire, 4... ... layer of conductive material (alloy of Au and Be) for obtaining ohmic contact, 6 ... alloy layer, 6 ... p-type semiconductor, 7 ... n type semiconductor, 8... n-type semiconductor substrate, 9... n-side electrode, 1o... alloy layer, 11... stem or comb. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Forward direction L (7r1.A) Section 3 Figure 4
Claims (1)
らなり、活性物質を含む前記第１の導電層の面積を、前
記第１の導電層に接続され、ＩＪ−ド線に接着された前
記第２の導電層の面積より小さくなしたことを特徴とす
る発光半導体装置。The electrode layer in contact with the light emitting semiconductor layer is the first. a second conductive layer, the area of the first conductive layer containing an active substance being smaller than the area of the second conductive layer connected to the first conductive layer and bonded to the IJ-domain; A light emitting semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57132734A JPS5922375A (en) | 1982-07-28 | 1982-07-28 | Light-emitting semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57132734A JPS5922375A (en) | 1982-07-28 | 1982-07-28 | Light-emitting semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5922375A true JPS5922375A (en) | 1984-02-04 |
Family
ID=15088341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57132734A Pending JPS5922375A (en) | 1982-07-28 | 1982-07-28 | Light-emitting semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5922375A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130288459A1 (en) * | 2012-04-25 | 2013-10-31 | Hon Hai Precision Industry Co., Ltd. | Method for making epitaxial structure |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53116073A (en) * | 1977-03-22 | 1978-10-11 | Toshiba Corp | Semiconductor device |
| JPS5784188A (en) * | 1980-11-13 | 1982-05-26 | Toshiba Corp | Semiconductor device |
-
1982
- 1982-07-28 JP JP57132734A patent/JPS5922375A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53116073A (en) * | 1977-03-22 | 1978-10-11 | Toshiba Corp | Semiconductor device |
| JPS5784188A (en) * | 1980-11-13 | 1982-05-26 | Toshiba Corp | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130288459A1 (en) * | 2012-04-25 | 2013-10-31 | Hon Hai Precision Industry Co., Ltd. | Method for making epitaxial structure |
| US8859402B2 (en) * | 2012-04-25 | 2014-10-14 | Tsinghua University | Method for making epitaxial structure |
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