JPS59221177A - Charge transfer device - Google Patents

Charge transfer device

Info

Publication number
JPS59221177A
JPS59221177A JP58096025A JP9602583A JPS59221177A JP S59221177 A JPS59221177 A JP S59221177A JP 58096025 A JP58096025 A JP 58096025A JP 9602583 A JP9602583 A JP 9602583A JP S59221177 A JPS59221177 A JP S59221177A
Authority
JP
Japan
Prior art keywords
transfer electrode
transfer
train
charge transfer
transfer device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58096025A
Other languages
Japanese (ja)
Inventor
Takashi Nishizawa
西沢 隆司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58096025A priority Critical patent/JPS59221177A/en
Publication of JPS59221177A publication Critical patent/JPS59221177A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/713Transfer or readout registers; Split readout registers or multiple readout registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To decrease the scanning time without cutting photosensitive picture element train or a transfer electrode train into pieces by tansferring a signal charge in two directions opposite to each other from a middle part of a transfer electrode to extract the charge by two output circuits. CONSTITUTION:The transfer electrode train 8 is formed that the transfer direction of the signal charge is reversed at a half of the arrangement length. That is, a barrier 11 is formed to a semiconductor substrate 10 under each transfer electrode and a potential well of downward staircase form is formed in opposite direction to each other toward both ends of the transfer electrode train 8. The signal charge generated in each photosensitive picture element is transferred once to the transfer electrode train 8 and stored in each potential well. Then the signal charge under each transfer electrode is transferred sequentially in opposite directon and read by an output circuit by applying two-phase driving of the transfer electrode train 8.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、−次元または二次元の固体撮像装置に用いら
れる電荷転送装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a charge transfer device used in a -dimensional or two-dimensional solid-state imaging device.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

第1図に従来の電荷転送装置の例を示す。1は一次元配
列された感光画素列を示しており、この感光画素列1に
沿って複数の転送電極列2が形成されている。転送電極
列2の一側の端部には出力回路3が設けられており、感
光画素列lから移送された信号電荷は転送電極列2によ
り順次転送され出力回路3により電気信号として読み出
される。
FIG. 1 shows an example of a conventional charge transfer device. Reference numeral 1 indicates a one-dimensional array of photosensitive pixels, and along this photosensitive pixel column 1, a plurality of transfer electrode columns 2 are formed. An output circuit 3 is provided at one end of the transfer electrode row 2, and signal charges transferred from the photosensitive pixel row 1 are sequentially transferred by the transfer electrode row 2 and read out as electrical signals by the output circuit 3.

上記第1図の構成からなる電荷転送装置の欠点は、読出
した信号電荷の転送時間が長いということである。
A drawback of the charge transfer device having the configuration shown in FIG. 1 is that it takes a long time to transfer read signal charges.

そこで、この問題を解決するために、転送電極を2分割
して転送時間の短縮化を図ったものが提案されている。
In order to solve this problem, it has been proposed to divide the transfer electrode into two to shorten the transfer time.

その例を第2図に示す。第2図かられかるように、転送
電極5は中間で2分割されている。そして、各分割され
た転送電極列5の一側の端部にはそれぞれ出力回路6が
形成されている。このようにすることにより、第1図の
例に比べて転送長さが1/2となることから走査時間も
1/2で済むことになる。すなわち、第1図の場合の走
査時間をTOとすると、2分割した第2図の場合はTψ
 となる。
An example is shown in FIG. As can be seen from FIG. 2, the transfer electrode 5 is divided into two parts in the middle. An output circuit 6 is formed at one end of each divided transfer electrode array 5. By doing this, the transfer length becomes 1/2 compared to the example shown in FIG. 1, and therefore the scanning time can also be reduced to 1/2. That is, if the scanning time in the case of Fig. 1 is TO, then in the case of Fig. 2 divided into two, Tψ
becomes.

しかしながら、第2図の場合は転送電極列を分断するこ
ととなり、分断せずに出力回路を転送電極列の中間位置
に配置することは極めて困難である。
However, in the case of FIG. 2, the transfer electrode array is divided, and it is extremely difficult to arrange the output circuit at an intermediate position of the transfer electrode array without dividing it.

〔発明の目的〕[Purpose of the invention]

そこで、本発明は感光画素列あるいは転送電極列を分断
することな(走査時間を短縮することが可能な電荷転送
装置を提供することを目的とする。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a charge transfer device that can shorten scanning time without dividing a photosensitive pixel array or a transfer electrode array.

〔発明の概要〕[Summary of the invention]

上記目的を達成するために、本発明による電荷転送装置
は、 前記転送電極列の両端のそれぞれに出力回路を設け、前
記転送電極列下の半導体基板内に当該電極列の配列方向
において中間部から各端部に向って前記各転送電極ごと
に対称的な階段状の電位の井戸が構成され、前記中間部
側からそれぞれ互に逆の転送方向で前記各出力回路に信
号電荷が転送されるようにしたことを特徴とするもので
ある。
In order to achieve the above object, the charge transfer device according to the present invention is provided with an output circuit at each end of the transfer electrode row, and includes an output circuit in the semiconductor substrate under the transfer electrode row from an intermediate portion in the arrangement direction of the electrode row. A symmetrical stepped potential well is formed for each of the transfer electrodes toward each end, so that signal charges are transferred to each output circuit from the intermediate portion in mutually opposite transfer directions. It is characterized by the following.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明による電荷転送装置の実施例を図面に基づ
いて説明する。
Embodiments of a charge transfer device according to the present invention will be described below with reference to the drawings.

第3図に示すように、転送電極列80両端部にはそれぞ
れ出力回路9A、9Bが設けられている。
As shown in FIG. 3, output circuits 9A and 9B are provided at both ends of the transfer electrode array 80, respectively.

各出力回路9A、9Bにはそれぞれ転送電極列8から逆
方向の転送方向で転送されてきた信号電荷が与えられる
Each of the output circuits 9A and 9B is supplied with signal charges transferred from the transfer electrode array 8 in the opposite transfer direction.

すなわち、第4図に示すように、転送電極列8はその配
列方向1/2の点で信号電荷の転送方向が逆にt仁るよ
うになっている。より具体的には次のような構成となっ
ている。各転送電極下の半導体基板1()にはバリア1
1が形成され、転送電極列8の1/2の点に対応する転
送電極8Aと8aの間を境に転送電極列80両端側に向
かってそれぞれ逆向きの下り勾配階段状の電位の井戸が
形成されている。例えば、図上左側に向かって電極8A
 、 8B 。
That is, as shown in FIG. 4, the transfer electrode array 8 is arranged such that the direction of signal charge transfer is reversed at a half point in the arrangement direction. More specifically, the configuration is as follows. A barrier 1 is placed on the semiconductor substrate 1 () under each transfer electrode.
1 is formed, and step-like potential wells with downward slopes in opposite directions are formed between the transfer electrodes 8A and 8a corresponding to the 1/2 point of the transfer electrode column 8 toward both ends of the transfer electrode column 80. It is formed. For example, electrode 8A toward the left side in the figure.
, 8B.

8C,・・・・・・FC@かつて4つの階段状の電位の
井戸が形成され、一方、図上右側に向かって電極8a。
8C,...FC@Once, four step-like potential wells were formed, and on the other hand, electrode 8a towards the right side of the figure.

sb、sc、・・・・・・ に向かって4つの階段状の
電位の井戸が形成されるようになっている。
Four stepped potential wells are formed toward sb, sc, . . . .

各感光画素7で発生した信号電荷は一度に転送電極列8
に移送され、図示するように各電位の井戸に蓄積される
。次に、転送電極列8を2相駆動する。すなわち、各転
送電極8A、8B、8C,・・・・・・および8a、8
b、8c、・・・・・・ には互に180°位相の異な
る転送・ぞルスφ1.φ2 が与えられ、各転送電極下
の信号電荷は図上左側と右側へ、順次逆向きに転送され
て出力回路9A、9Bに読出されてゆく。このように、
信号電荷は転送電極列8の中央1/2の点からそれぞれ
逆方向に転送されることとなる。その結果、転送段数は
画素をN個とすると、全画素の電荷を走査するのにN/
2段でよいこととなり、走査時間は1/2となる。そし
て、このことは従来(第2図)のように転送電極列を2
つに分断することな(達成される。具体的数値で示すと
、例工ば2000  ビットのシングルチャンネル−次
元イメージセンサを考えた場合、1(1MHzで読み出
す最小の走査時間は200μ8eeであるが、本発明に
よれば、同じ10 MHz  で読み出したとしても1
00μgeaの走査時間で済むことになる。
The signal charge generated in each photosensitive pixel 7 is transferred to the electrode row 8 at once.
and accumulated in each potential well as shown. Next, the transfer electrode array 8 is driven in two phases. That is, each transfer electrode 8A, 8B, 8C, . . . and 8a, 8
b, 8c, . . . have transfer signals φ1.b, 8c, . φ2 is applied, and the signal charges under each transfer electrode are sequentially transferred in reverse directions to the left and right sides of the diagram and read out to output circuits 9A and 9B. in this way,
The signal charges are transferred in opposite directions from the central 1/2 point of the transfer electrode array 8. As a result, if the number of transfer stages is N, it takes N/1 to scan the charges of all pixels.
Two stages are sufficient, and the scanning time becomes 1/2. This means that the transfer electrode array can be divided into two as in the conventional case (Fig. 2).
For example, if we consider a 2000-bit single-channel dimensional image sensor, the minimum scanning time for reading at 1 MHz is 200μ8ee, but According to the present invention, even if read at the same 10 MHz, 1
This results in a scanning time of 00 μgea.

なお、デュアルチャンネルの場合でも出力回路を同様に
して4ケ所設ければ同様に走査時間を1/2とすること
ができる。また、以上の説明は一次元イメージセンサを
例にしたが、二次元イメージセンサの場合にも本発明の
適用が可能であることはいうまでもない。すなわち、水
平シフトレジスタおよび垂直シフトレジスタにそれぞれ
本発明を適用すればよい。
Note that even in the case of dual channel, if four output circuits are similarly provided, the scanning time can be similarly reduced to 1/2. Furthermore, although the above explanation has been made using a one-dimensional image sensor as an example, it goes without saying that the present invention can also be applied to a two-dimensional image sensor. That is, the present invention may be applied to both the horizontal shift register and the vertical shift register.

〔発明の効果〕〔Effect of the invention〕

以上の通り、本発明によれば転送電極列に中間部を境に
して信号電荷を逆方向に転送するように電位の井戸を形
成したことにより、感光画素列あるいは転送’tlY、
極列を分断することなく走査時間を短縮することができ
る。
As described above, according to the present invention, by forming potential wells in the transfer electrode row so as to transfer signal charges in the opposite direction with the intermediate portion as a boundary, the photosensitive pixel row or the transfer 'tlY,
Scanning time can be shortened without separating the pole rows.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の電荷転送装置の第1の例を示す構成図、
第2図は同上、第2の例を示す構成図、第3図は本発明
による電荷転送装置の実施例を示す構成図、第4図は本
発明による電荷転送装置の断面構造奢示す縦断面図であ
る。 7・・・感光画素列、8・・・転送電極列、8A、8B
。 8C,・・・・・・、8a、8b、8c・・・・・・転
送電極、9・・・出力回路、10・・・半導体基板、1
1・・・バリア、φ1.φ2・・・転送ノξルス。 第1図 第2図 楕3図 ソ         b′:3 φ1
FIG. 1 is a configuration diagram showing a first example of a conventional charge transfer device;
FIG. 2 is a block diagram showing a second example of the same as above; FIG. 3 is a block diagram showing an embodiment of a charge transfer device according to the present invention; FIG. 4 is a longitudinal section showing a cross-sectional structure of a charge transfer device according to the present invention. It is a diagram. 7... Photosensitive pixel row, 8... Transfer electrode row, 8A, 8B
. 8C,..., 8a, 8b, 8c... Transfer electrode, 9... Output circuit, 10... Semiconductor substrate, 1
1... Barrier, φ1. φ2... Transfer nolus ξ. Figure 1 Figure 2 Oval Figure 3 So b': 3 φ1

Claims (1)

【特許請求の範囲】 1、感光画素列からの信号電荷を転送する転送電極列と
、転送された信号電荷を電気信号として取出す出力回路
とを備えた電荷転送装置において、 前記転送電極列の両端のそれぞれに出力回路を設け、前
記転送電極列下の半導体基板内に当該電極列の配列方向
において中間部から各端部に向って前記各転送電極ごと
に対称的な階段状の電位の井戸が構成され、前記中間部
側からそれぞれ互に逆の転送方向で前記各出力回路に信
号電荷が転送されるようにしたことを特徴とする電荷転
送装置。 2、特許請求の範囲第1項記載の装置において、前記中
間部は転送電極列の配列方向におけるIAの点であるこ
とを特徴とする電荷転送装置。 3、特許請求の範囲第1項または第2項記載の装置にお
いて、転送電極列は一次元固体撮像装置に用いられるも
のであることを特徴とする電荷転送装置。 4、特許請求の範囲第1項または第2項記載の装置にお
いて、転送電極列は二次元固体撮像装置の水平シフトレ
ジスタまたは垂直シフトレジスタであることを特徴とす
る電荷転送装置。
[Scope of Claims] 1. In a charge transfer device comprising a transfer electrode array that transfers signal charges from a photosensitive pixel array and an output circuit that extracts the transferred signal charges as an electric signal, both ends of the transfer electrode array An output circuit is provided for each of the transfer electrodes, and a symmetric step-like potential well is formed for each transfer electrode in the semiconductor substrate under the transfer electrode row from the middle part toward each end in the arrangement direction of the electrode row. A charge transfer device configured such that signal charges are transferred from the intermediate portion side to each of the output circuits in mutually opposite transfer directions. 2. The charge transfer device according to claim 1, wherein the intermediate portion is a point IA in the arrangement direction of the transfer electrode array. 3. A charge transfer device according to claim 1 or 2, wherein the transfer electrode array is used in a one-dimensional solid-state imaging device. 4. A charge transfer device according to claim 1 or 2, wherein the transfer electrode array is a horizontal shift register or a vertical shift register of a two-dimensional solid-state imaging device.
JP58096025A 1983-05-31 1983-05-31 Charge transfer device Pending JPS59221177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58096025A JPS59221177A (en) 1983-05-31 1983-05-31 Charge transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58096025A JPS59221177A (en) 1983-05-31 1983-05-31 Charge transfer device

Publications (1)

Publication Number Publication Date
JPS59221177A true JPS59221177A (en) 1984-12-12

Family

ID=14153793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58096025A Pending JPS59221177A (en) 1983-05-31 1983-05-31 Charge transfer device

Country Status (1)

Country Link
JP (1) JPS59221177A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08307741A (en) * 1995-05-02 1996-11-22 Matsushita Electric Ind Co Ltd Image pickup device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08307741A (en) * 1995-05-02 1996-11-22 Matsushita Electric Ind Co Ltd Image pickup device

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