JPS59172888A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To improve the degree of integration in the horizontal direction and to increase the amount of transfer charge by deciding a horizontal picture element pitch almost depending on the horizontal size of a picture element in a solid-state image pickup device for two-dimension using a CCD. CONSTITUTION:The 1st photosensing picture element group 201 and the 2nd photosensing picture element group 202 are arranged with an offset by the horizontal size of the picture element in the horizontal direction in an area sensor, and an oblique gap part is provided among the most adjacent picture elements in oblique direction in the matrix arrangement. Further, a 2-phase driving vertical transfer register 21 comprising a CCD in zig-zag along each vertical picture element array is provided respectively and a transfer electrode 21 of each stage is prolonged to the gap between the adjacent picture elements in the vertical direction from the oblique gap part. Thus, the picture element PH in the horizontal direction is decided almost by the size of the horizontal picture element without adding the width of the vertical transfer register 21. Thus, the horizontal picture element pitch can be squeezed back.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a two-dimensional solid-state imaging device (area sensor) using a charge-coupled device (COD), and particularly to a video tape recorder that can safely handle a large number of pixels. The present invention relates to high-resolution area sensors used in industrial cameras and industrial television cameras.

[Technical background of the invention]

In order to increase the resolution of this type of area sensor, it has already been proposed by the inventor of the present invention, and has been filed (Japanese Patent Application No. 57-92907) by the same applicant as the present application. In this previously proposed area sensor, as shown in FIG. 1, two groups of photosensitive pixels are arranged in a checkered pattern on a -conductive type semiconductor substrate. These pixels 2 generate and accumulate signal charges by charge conversion when irradiated with light, and are composed of impurity regions having a conductivity type opposite to that of the semiconductor substrate, and are usually called photodiodes.

Among the two groups of pixels, the first pixel 2 group has a first two-dimensional square grid arrangement, and the second pixel 2 group has the first two-dimensional square grid arrangement.
It has a second two-dimensional square lattice arrangement that is shifted in the vertical direction (column direction) by about half the vertical pixel pitch Pv compared to the second two-dimensional square lattice arrangement. Vertical transfer registers 3 made of CCDs are arranged in a zigzag pattern along each of the plurality of vertical pixel columns arranged in the vertical direction in the second group of pixels, and are arranged so as to thread between the vertical pixel columns. A group is established. Each of the vertical transfer registers 3 is driven by, for example, two-phase clocks to the number of stages necessary to read out the signal charges of all pixels in the vertical pixel column. Here, the first phase transfer electrode is represented by φ, and the second phase transfer electrode is represented by φ2. These transfer electrodes φ0. Below φ2, there are transfer portions φ, T, φ2T with narrow channel widths in the horizontal gaps between the diagonally closest pixels in the two-dimensional square grid arrangement, and transfer portions φ□7. It has charge storage parts φ, s, and φI with wide channel widths extending from the part located on the vertical side of φ2T to the gap between vertically adjacent pixels of the vertical pixel column, and has a narrow channel part of the transfer channel (transfer A potential well difference is provided between the portion φ1.φ1) and the wide channel portion (charge storage portion φ□8.φ28). Furthermore, horizontal transfer registers (not shown) each comprising a CCD are provided for reading out in time series the signal charges for each horizontal scanning line sequentially transferred from the three groups of vertical transfer registers.

A transfer control means is provided for reading out the area sensor in a pseudo interlaced manner. This transfer control means includes signal charges from the 1st (=X, 2...n) pixel in the vertical direction in the vertical pixel column of the first pixel 2□ group as one horizontal scan in the first field; Then, the signal charge of the 1st (=1.2...n) pixel in the vertical direction in the vertical pixel column of the second pixel 2□ group is read out, and this operation is performed i
= 1 to ni repeatedly, then 1 in the second field
As a horizontal scan, the signal charge from the (1+1) (=2.3...n)th pixel in the vertical direction in the vertical pixel column of the first group of pixels 21 and the vertical pixel column of the second group of pixels 22 The signal charges from the j (1, 2, . . . n-1)th pixel in the vertical direction are read out, and this operation is controlled to be repeated in the order of the i numbers from i=1 to Cn-1). That is, in one horizontal scan in the first field, a signal is first sent from the first pixel of the vertical pixel column of the first group of 20 pixels to the storage portion φ□8 below the transfer electrode φ1 located on the adjacent horizontal scanning direction side. Charge is transferred, and this operation is called field shift φ1. Next, the signal charges in the storage section φ18 under the transfer electrode φ□ are transferred to the storage section φ28 through the transfer section φ2T under the transfer electrode φ2 located on the vertical transfer direction side of the vertical transfer register 3 to which the transfer electrode φ1 belongs. This operation is called register transfer φ. At the same time, the transfer electrode φ2 located on the horizontal scanning direction side adjacent to the i-th pixel in the vertical pixel column of the 5 second pixel 23 group
The signal charges are transferred to the lower storage section φ2s, and this operation is called field shift φ2. Therefore, when the register transfer φ2 and field shift φ2 operations are completed, the transfer electrodes φ aligned on the same horizontal line
Signal charges for one horizontal scanning line are accumulated under the third group. Next, 1 transfer electrode φ3. Clock pulses are sequentially applied to φ, the signal charges are transferred in each vertical transfer register 3, the signal charges for one horizontal scanning line are transferred all at once to the horizontal transfer register, and each signal charge is transferred from this horizontal transfer register. Read out sequentially. This readout operation for one horizontal scanning line is repeated for n lines corresponding to t=1 to nlc.

On the other hand, when performing one horizontal scan in the second field, contrary to the above, first the field shift φ is performed from the first pixel in the vertical pixel column of the second group of 22 pixels.
During operation, multiple signal charges are transferred. Next, the signal charge in the storage section φ,8 under the transfer electrode φ2 is accumulated via the transfer 1 section φ□7 under the transfer electrode φ1 located on the vertical transfer direction side of the vertical transfer register to which the transfer electrode φ belongs. This operation is referred to as register transfer φ. At the same time, (1
+'l )-th pixel to the above-mentioned field shifter. The operation transfers the signal charge. Therefore, when the register transfer φ and field shift φ1 operations are completed, the transfer electrodes φ8 aligned on the same horizontal line
Signal charges for one horizontal scanning line are accumulated at the bottom of the group. Next, by the same read operation as in the first field described above, (n-1) corresponding to the numerical order of the i
Signal charges on the horizontal scanning lines of the book are sequentially read out. Then, one frame of image is obtained by combining the first field image and the second field image.

According to the CCD area sensor as described above, the transfer section φ
IT, φ1 is an accumulation section φ, whose area is limited by the maximum amount of signal charges, because it only passes signal charges and does not accumulate signal charges.

Different from φ, 8, the area may be made as small as possible in terms of transfer operation. In addition, the storage section φ, 8. φ28 can be configured in such a shape that a part thereof extends into the gap between vertically adjacent pixels in the vertical pixel column, and the horizontal pixel pitch PH of the area sensor is equal to the horizontal dimension of the pixels. It is determined by the width of the transfer section φIT or φ and T. Further, the pitch between the horizontal scanning lines is determined by the vertical spacing between the nearest pixels of two adjacent vertical pixel columns, and this spacing can be smaller than, for example, the vertical dimension of the pixels.

In addition, in the area sensor shown in FIG. 1, when reading out all pixels in one field scan instead of using the interlace method, the signal source from the first pixel in the vertical direction in each vertical pixel column is read out as one horizontal scan. read out,
This operation may be controlled to be repeated in the order of the numbers l from the beginning to the end. Also, the CCD Eliasen? disclosed in Japanese Patent Application Laid-Open No. 55-163951? The sensor reads half of the pixels in the first field scan, and reads out the remaining half of the pixels in the second field scan, and the configuration of the vertical transfer register is different from that of the area sensor shown in Figure 1. However, the pixel groups are arranged in a checkerboard pattern similar to that in FIG.

[Problems with background technology]

By the way, in the area sensor shown in FIG. 1, as mentioned above, the horizontal pixel pitch PH is determined by the horizontal dimension of the pixel and the narrow channel part of the vertical transfer register (transfer part φ, T
, φxT). For example 1
In an area sensor with a small chip size and a large number of pixels, such as 400 or 570 pixels, such as an area sensor used in a television camera that uses a 2-inch optical system, the pixel pitch in the horizontal direction is 17 μm.
, about 115 μm. On the other hand, since the width of the narrow channel section is usually 2 to 3 μm, the existence of this narrow channel section is achieved by increasing the horizontal integration of the area sensor and increasing the number of pixels in the horizontal direction. This is a major constraint in the actual situation.

In addition, in the area sensor shown in Fig. 1, the vertical transfer register is driven in two phases, but this two-phase driving force type drives the vertical transfer register in two different areas (the transfer section and the storage section) under the same transfer electrode.
Only the charge corresponding to the difference in potential wells can be transferred, and the other three
The amount of transferred charge is reduced compared to the phase drive force type and four-phase drive force type. Therefore, in an area sensor that adopts a two-phase driving force type, when the number of transfer stages of vertical transfer registers increases due to higher integration of pixels, the decrease in the amount of transferred charge causes deterioration of the saturation output characteristics of the area sensor. become.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned circumstances.The present invention has been made in view of the above-mentioned circumstances. The present invention provides a solid-state imaging device that is capable of selectively adopting a three-phase drive system or a four-phase drive power system instead of a two-phase drive system, and that is capable of increasing the amount of charge transferred by a vertical transfer register. be.

[Summary of the invention]

That is, the present invention provides a first photosensitive pixel group that is provided on a conductive semiconductor substrate and has a first square lattice arrangement, and a first photosensitive pixel group that is provided on a conductive type semiconductor substrate, and a first photosensitive pixel group that is perpendicular to the photosensitive pixel group by about half the vertical pixel pitch. a second square lattice arrangement with a deviation in the direction;
a group of photosensitive pixels, a vertical transfer register consisting of a charge-coupled device provided in a zigzag shape along each vertical pixel column arranged in the vertical direction in these photosensitive pixel groups, and a transferred1
In a solid-state imaging device including a horizontal transfer register that sequentially reads signal charges for horizontal scanning lines, the first photosensitive pixel group and the second photosensitive pixel group are arranged horizontally offset by the horizontal dimension of the pixels. The pixels closest to each other in the diagonal direction in a square grid arrangement have diagonal gaps between each other, and the vertical transfer register is vertically adjacent to the diagonal gaps and the vertical pixel column. It is characterized in that the pixels are arranged so as to pass through gaps between the pixels.

Therefore, the horizontal pixel pitch is determined almost by the horizontal pixel dimension without adding the width of the vertical transfer register, so it is possible to improve the horizontal integration, and by increasing the number of horizontal pixels, higher resolution can be achieved. The actual situation becomes possible.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. In the area sensor shown in FIG.
The groups are formed in a checkered pattern on a semiconductor substrate of one conductivity type. That is, among the plurality of vertical pixel columns arranged, the groups of pixels 201 forming odd-numbered vertical pixel column groups in the horizontal direction are arranged in a first two-dimensional square lattice shape.
The remaining pixels 203 forming the even-numbered vertical pixel column group are shifted by about half the vertical pixel pitch in the vertical direction from the odd-numbered vertical pixel column group, but in the horizontal direction, the pixels 203 are shifted from the odd-numbered vertical pixel column group by about half the vertical pixel pitch. They are formed in a second square lattice arrangement that is shifted in size. In this case, the planar shape of each pixel 20 is formed such that a diagonal gap exists between diagonally adjacent pixels within the plane in which each pixel 20 is arranged. Then, the CCD is arranged in a zigzag pattern along each vertical pixel column.
Two vertical transfer registers of two-phase drive type are provided, and the transfer electrodes of each stage (the first phase is indicated by φ8 and the second phase is indicated by φ) are arranged in the diagonal gap. It extends from the vertical pixel column to the gap between adjacent pixels in the vertical pixel row. In this case, the transfer electrode φ8. In the transfer channel below φ2, the area below the gap in the diagonal direction is a narrow channel transfer part, and the area below the gap in the vertical direction is a wide channel charge storage part.

Furthermore, a method for reading out the 20 groups of pixels by a desired scanning method (a pseudo-interlace method as described above with reference to FIG. 1, a method of reading out all pixels in one field scan, or a normal interlace method) is provided. A scan control means is provided, and a CC provided adjacent to this means and one end side of the group of vertical transfer registers 21.
Horizontal transfer registers such as D and a transfer lock supply system for supplying transfer locks to these registers are not shown.

In other words, the above CCD area sensor has almost the same configuration as the area sensor shown in FIG. 1, except that the transfer direction of the narrow channel section is in the diagonal direction. Since it is easily understood that the read operation is possible using the read method, detailed explanation thereof will be omitted.

According to the CCD area sensor, the horizontal pixel pitch PH is determined approximately by the horizontal pixel size without adding the width of the vertical transfer register 21. Therefore, it has 400 pixels or 570 pixels in the horizontal direction as described above, and the horizontal pixel pitch PR is 17 μm or 11 μm.
．． In an area sensor with many pixels of about 5 μm, it is possible to reduce the pixel pitch in the horizontal direction by an amount corresponding to the width of the narrow channel portion (2 to 3 μm), and the effect of this pitch reduction is significant. In other words, the degree of integration in the horizontal direction can be improved, and by increasing the number of pixels in the horizontal direction, it is possible to achieve higher resolution.

Note that the transfer electrode φ0. As shown in Fig. 3, the transfer electrodes (φ1'
, φ2') and (φ3', φ4'), five- and four-phase driving becomes possible.

FIG. 4 shows a CCD area sensor according to another embodiment of the present invention. This area sensor differs from the area sensor shown in FIG. 2 by changing the planar shape of each pixel 20 to the area shown in FIG. The pixels in the sensor are arranged in a diamond shape whose direction is turned approximately 45 degrees within the plane, and the signal charge transfer direction (field 9 shift direction) from each pixel 20 to the vertical transfer register is diagonal, and the vertical transfer register 21 is driven in four phases. As per the method, each stage transfer electrode φ1 of the 1st phase to the 4th phase is
In addition to determining the length and position of φ4, the width of this transfer electrode is made substantially constant, and the width of the transfer channel is made substantially constant. Furthermore, in the base rear sensor,
The field shift control area 22 (this is the area between the pixel 20 and the vertical transfer register 21) is diagonally oriented and has a configuration that does not directly affect the horizontal pixel pitch P11.

The read operation in the area sensor described above is almost the same as the read operation in the area sensor shown in FIG. 2, except that the vertical transfer register 21 is driven in four phases.

That is, the charge of one pixel group is transferred to the bottom of the transfer electrode in the field shift direction, the charge under this transfer electrode is transferred by two stages of transfer electrodes within the vertical transfer register, and then the charge of the other pixel group is transferred to the field shift direction. Transfer to the bottom of the transfer electrode in the shift direction.

As a result, charges for one horizontal scanning line are obtained under one row of transfer electrodes in a certain horizontal direction. Therefore, the area sensor described above has the advantage that the degree of integration in the horizontal direction can be improved like the area sensor shown in FIG. . In the area sensor shown in FIG. 4, substantially the same effect as in the above embodiment can be obtained even if the length and arrangement of the transfer electrodes are changed so that the vertical transfer register is driven in three phases.

〔Effect of the invention〕

~ As described above, according to the solid-state imaging device of the present invention, the horizontal pixel pitch is determined approximately by the horizontal dimension of the pixel), and high integration in the horizontal direction is possible. 3-phase drive, limited to 2-phase drive as the drive method of
Since the four-phase drive system can be selectively adopted, the amount of charge transferred by the vertical transfer register can be increased, which is extremely suitable for multi-pixel television cameras and the like.

[Brief explanation of the drawing]

FIG. 1 is a configuration explanatory diagram showing a conventional solid-state imaging device, FIG. 2 is a configuration explanatory diagram showing an embodiment of the solid-state imaging device according to the present invention, and FIG. 3 is a transfer electrode of the vertical transfer register in FIG. 2. FIG. 4 is a plan view showing a modified example of the present invention, and FIG. 4 is a configuration explanatory diagram showing another embodiment of the present invention. 20.2θ0, 20□...Photosensitive pixel, 21...Vertical transfer register, φ1 to φ4. φ1' to φ4'...transfer electrodes. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A first MIF) photosensitive pixel group provided on a semiconductor substrate of one conductivity type and having a first square lattice arrangement, and a second photosensitive pixel group vertically shifted by about half of the vertical pixel pitch with respect to the photosensitive pixel group. a vertical transfer register comprising a second photosensitive pixel group arranged in a square lattice pattern and charge-coupled devices arranged in a zigzag pattern along each vertical pixel column arranged in the vertical direction in the photosensitive pixel group; and a horizontal transfer register that sequentially reads signal charges for one horizontal scanning line transferred from each of these vertical transfer registers, the first photosensitive pixel group and the second photosensitive pixel group, are arranged horizontally shifted by the horizontal dimension of the pixels, and have diagonal gaps between the diagonally closest pixels in the square grid arrangement, and the vertical transfer register A solid-state imaging device characterized in that the solid-state imaging device is arranged so as to pass through a gap in the direction and a gap between vertically adjacent pixels of the vertical pixel column.