JPS59217327A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it feasible to obtain a reliable contact between a diffused layer and electrode or the like on one hand and a wiring layer on the other and form the wiring layer with a high reliability regarding even a minute contact hole by forming a metal wiring layer on the diffused layer and electrode layer through a polycrystalline silicon film. CONSTITUTION:A polycrystalline film 6 is deposited on the entire surface of a layer 4 including a diffused layer 3. An N type impurity is implanted into the polycrystalline silicon film 6, for instance, by an ion implantation method. Then, a heat treatment is carried out in an N2 atmosphere, whereby, at least, a part of the N type impurity existing in the polycrystalline silicon film 6 is diffused into the diffused layer 3 through a contact hole 5. In addition, a tungsten film 7 is formed, which is defined as a vapor phase growth, on the entire surface of the polycrystalline silicon 6 by employing, for example, a mixture gas of WF6 gas and H2 gas. The tungsten film 7 and polycrystalline silicon film 6 are formed into a desired pattern, thereby to form a first wiring layer. Thereafter, an insulating layer 8 is deposited on the entire surface of the tungsten film 7 and the surface thereof is flatened, thereby forming a contact hole by availing a conventional lithographic technique. A second wiring layer is formed of an A alloy film 9 on the region which includes a part of the insulating layer and the contact hole therein. With this constitution, the first wiring layer is formed of the tungsten film 7, there is therefore no occurrence of irregularities formed by hillocks on the surface thereof. Owing to this, it is made easier to level the surface of the insulating film 8, which fact contributes the high reliability of the second wiring layer.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device in which contact between a wiring layer made of a metal material and a diffusion layer, an electrode layer, etc. is improved. Regarding the manufacturing method.

[Technical Background of the Invention and Problems Therewith] Conventionally, electrical continuity between a diffusion layer formed on the surface of a semiconductor substrate and a wiring layer made of a metal material has been carried out as follows. That is, an insulating film is deposited on the substrate, and openings (contact holes) are formed by etching away parts of the insulating film that require electrical conduction, and a wiring layer is generally formed using an AI film as a wiring material. By doing so, electrical continuity with the diffusion layer was obtained through the contact hole.

However, the above wiring layer forming technology using the A1 film has the following problems. That is, after forming the A1 film on the diffusion layer through the contact hole,
When heat treatment (sinter treatment) is performed around 0 ['C], A
1 diffuses in the diffusion layer and eventually comes out of the diffusion layer (called a penetration phenomenon), making it impossible to obtain an ohmink contact. This penetration phenomenon can be significantly suppressed by adding a few percent of silicon to AI, but when the diffusion layer becomes shallow and becomes less than 0.2 [μm], penetration phenomenon can be seen even with silicon-containing A1. As a result, the yield of the contact portion is significantly reduced. Furthermore, if the width of the contact ball is less than 2.0 [μm], the A1 film will not fit into the contact hole sufficiently, and there is a risk that the A1 film will become thin or break on the side of the contact hole. As a result, the reliability of the wiring is significantly reduced.

Furthermore, if the surface of the insulating film formed on the diffusion layer is uneven, the thickness of the A1 film formed thereon will become thinner or breakage will occur on the side surfaces of the uneven parts, which will also reduce the reliability of the wiring. descend. Furthermore, when forming wiring layers in multiple layers of two or more to achieve high integration, if an A1 film is used as the first layer, hillocks will occur on the surface of the AI film, and these hillocks will cause
There is a problem in that unevenness on the surface of one film reduces the reliability of the second and upper wiring layers. Note that the above-mentioned problem is not limited to the contact between the wiring layer and the diffusion layer, but also applies to the contact between the wiring layer and the electrode layer.

[Purpose of the Invention] The purpose of the present invention is to manufacture a semiconductor device that can reliably make contact between a diffusion layer, an electrode layer, etc. and a wiring layer, and can form a wiring layer with high reliability even in a minute contact hole. The purpose is to provide a method.

[Summary of the Invention] The gist of the present invention is to form a metal wiring layer on a diffusion layer, an electrode layer, etc. via a polycrystalline silicon film.

That is, the present invention provides a method for manufacturing a semiconductor device by making contact between a diffusion layer, an electrode layer, etc. and a wiring layer, in which an insulating film is deposited on a semiconductor substrate on which a diffusion layer or a semiconductor electrode layer containing impurities is formed. After that, this insulating film is selectively etched to form a contact hole, and then a polycrystalline silicon group containing an impurity of the same conductivity type as the impurity is deposited on the entire surface, and then heat treatment is performed to remove the diffusion layer from the polycrystalline silicon film. Alternatively, the impurity is diffused into the electrode layer, and then a part of the surface of the polycrystalline silicon film is reacted with a metal halide to deposit a metal film on the surface, and then the metal film and the polycrystalline silicon film are deposited on the surface. This is a method of patterning.

[Effects of the Invention] According to the method of the present invention, after impurities are diffused from a polycrystalline silicon film into a diffusion layer, an electrode layer, etc., a metal having a low resistance value,
Typically, tungsten (W) is deposited by vapor phase growth @ to form the first layer metal wiring, so the phenomenon of penetration into the diffusion layer, which has been a problem in the past, is not observed at all. That is, since a metal such as tungsten hardly diffuses in silicon, the penetration phenomenon of the diffusion layer can be reliably prevented. Furthermore, since the metal film is deposited using a vapor phase growth method, a sintering step is not necessary. Furthermore, even if the contact hole is shifted from above the diffusion layer and the semiconductor substrate is exposed, impurities will be diffused from the polycrystalline silicon film through the contact hole, so contact failure between the wiring layer and the diffusion layer will not occur. do not have. Furthermore, since the metal film such as tungsten is deposited using the vapor phase growth method, the metal film can fully penetrate into even narrow contact holes, eliminating the risk of thinning or disconnection of the wiring layer on the side of the contact hole. The reliability of the system can be improved. Similarly, the metal film is deposited uniformly even on the uneven portions of the surface of the insulating film formed on the diffusion layer and the electrode layer, and the reliability of the wiring can also be improved.

In addition, since no warping occurs on the surface of a metal film such as tungsten, there is no unevenness due to hillocks, making it easier to form wiring in the second and subsequent layers, and is effective in improving the reliability of multilayer wiring.

[Embodiments of the invention] Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

FIGS. 1(a) to 1(f) are cross-sectional views showing the manufacturing process of a semiconductor device according to an embodiment of the present invention. First, Figure 1 (
As shown in a), a thick oxide film 2 is embedded in a part of the surface of a p-type silicon substrate 1, and an n
A diffusion layer 3 is formed by doping type impurities. Next, as shown in FIG. 1(b), a CVD oxide film 4 is deposited on the entire surface.
Contact hole 5 using normal glue sogerafy technique
Open. After that, as shown in Figure 1(C),
Polycrystalline silicon film 6 having a film thickness of about 000 [A]
is deposited, and an n-type impurity of about 1×10 [am] is implanted into this polycrystalline silicon film 6 by, for example, ion implantation. Now, instead of the above ion implantation,? Of course, a polycrystalline silicon film containing n-type impurities may be deposited in advance.

Next, heat treatment is performed at, for example, 1000 [° C.] in a N2 atmosphere. As a result, at least a portion of the n-type impurity in the polycrystalline silicon film 6 is diffused into the diffusion layer 3 via the contact hole 6.

Next, as shown in FIG. 1(d), the entire surface is coated with, for example, WF.
a. A tungsten film (metal film) 7 is grown in a vapor phase using a mixed gas of gas and H2 gas. At this time, a portion of the silicon on the surface of the polycrystalline silicon film 6 also reacts, so that the tungsten film 7 is deposited over the entire surface with very good uniformity. Further, since the tungsten film 7 is deposited by a vapor phase growth method, the tungsten film 7 fully penetrates into the narrow contact hole 5, and the film does not become thinner or break on the side surface of the contact hole 5. Moreover, since tungsten hardly diffuses in silicon, the so-called diffusion layer penetration phenomenon is not observed. Furthermore, since the film is deposited using a vapor phase growth method, subsequent sintering is not necessary. moreover,
Since the tungsten film 7 is deposited uniformly even if the surface of the insulating film 4 is uneven, the reliability of the wiring is significantly improved. Next, as shown in FIG. 1(e), the tungsten film 7 and the polycrystalline silicon film 6 are patterned into a desired pattern.
A third wiring layer is formed. Next, as shown in FIG.
A contact ball is formed using a normal lithography technique, and a second layer of wiring is formed thereon using an A1 alloy film 9.

Thus, according to the method of this embodiment, since the first wiring layer is formed of the tungsten film 7, unevenness due to hillocks does not occur on the surface. Therefore, the insulating film 8 can be easily flattened, and the reliability of the second layer wiring is significantly improved. According to experiments conducted by the inventors, when using the above-mentioned method to form the filler 1 to lines of a dynamic RAM using the first layer of wiring and forming the word line using the second layer of wiring, it was found that the wiring at the contact portion was It has been found that the reliability is significantly improved and, as a result, the yield of dynamic RAM is significantly improved.

FIG. 2 is a cross-sectional view showing a state in which the contact hole 5 is displaced from the diffusion layer 3 and the buried oxide film 2 in the isolation region is partially etched in the etching process shown in FIG. 1(d). .

In this case, if the Al film is deposited as in the conventional method, the Al film will be directly connected to the substrate 1, causing contact failure. However, as shown in FIG. 2, if the method of this embodiment is used, the type 0 impurity from the polycrystalline silicon film 6 is re-diffused into the substrate 1 through the contact hole 5, so the area where the substrate silicon was exposed Impurities are also diffused into 10. As a result, occurrence of contact failure can be prevented.

Note that the present invention is not limited to the embodiments described above. For example, the impurity doped into the polycrystalline silicon film is not limited to n-type, but may be of the same conductivity type as the impurity of the diffusion layer. Furthermore, the material for forming the wiring layer is not limited to tungsten, and molybdenum or other metal films can be used. Further, the present invention can be applied not only to contact between a wiring layer and a diffusion layer but also to a contact between a wiring layer and an electrode layer. In addition, various modifications can be made without departing from the gist of the present invention.

[Brief explanation of drawings]

FIGS. 1(a) to 1(f) are process cross-sectional views for explaining a method according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining the effects of the same embodiment. 1...p-type silicon substrate, 2...buried oxide film,
3... Diffusion layer, 4... CVD insulating film, 5... Contact hole, 6... Polycrystalline silicon film, 7... Tungsten jl (metal film), 8... Insulating film, 9・・・
・AI membrane. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 1 Figure 2

Claims (4)

[Claims] (1) A step of depositing an insulating film on a semiconductor substrate on which a diffusion layer or a semiconductor electrode layer containing impurities has been formed, a step of selectively etching the insulating film to form a contact hole, and then a step of depositing the impurity on the entire surface. a step of depositing a polycrystalline silicon film containing an impurity of the same conductivity type as the polycrystalline silicon film, a step of performing heat treatment to diffuse the impurity from the polycrystalline silicon film into the diffusion layer or the electrode layer, and a step of depositing the impurity of the polycrystalline silicon film. A semiconductor device comprising the steps of: reacting a part of the surface with a metal halide to deposit a metal film on the surface; and then buttering the metal film and polycrystalline silicon film. manufacturing method. (2) The method of manufacturing a semiconductor device according to claim 1, wherein the metal film forms a lower wiring layer of a two-layer wiring. (3) The lower wiring layer of the two-layer wiring is a dynamic RAM
3. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is used for a bit line, and the upper wiring layer is used for a word line. (4) WF as the metal halide. A method for manufacturing a semiconductor device according to claim 1, characterized in that the method uses: