JPS59216470A - Power source - Google Patents

Abstract

PURPOSE:To reduce the loss of a drive power by cutting off a P-N-P type transistor with a voltage across a capacitor during ON period of an N-P-N type transistor. CONSTITUTION:A parallel circuit of a resistor 10 and a capacitor 13 is connected to a base of a P-N-P type transistor 8 of one of transistors which form a push-pull circuit. The other end of a resistor 11 connected to the other terminal of the parallel circuit and the base of other N-P-N type transistor 9 and connected to the collector of a transistor 1. A reverse bias is applied to the base of the transistor 8 via a charging voltage across a capacitor 13 during the ON period of the transistor 9 in the normal switching operation state to cut off the P-N-P type transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a switching type power supply device such as a DC-DC converter.

Configuration of conventional example and its problems An example of a conventional flybank type D(,-DC converter using an n-channel MO3 field effect transistor is shown in Figs. 1 and 2. The one in Fig. 1 is The drive transistor 1 is designed to drive a field effect transistor with only one transistor, and the drive transistor 1, whose base is supplied with an output pulse from an oscillation circuit (not shown), sends the collector output to the field effect transistor 2. The field effect transistor 2 performs a switching operation by the drive pulse, and its output is transformed by a converter transformer 3 and output to the secondary side, and is converted to a DC voltage by a rectifying and smoothing circuit consisting of a diode 4 and a capacitor 6. is supplied to the load 6. In principle, the field effect transistor 2 has no gate inflow current and can be driven only by voltage, unlike a bipolar transistor, but in reality there is an input capacitance CgB between the gate and source of the field effect transistor 2. Furthermore, there is an input resistance Rg between the field effect transistor 2 and the gate, and together with the collector load resistance 7, when the field effect transistor 2 is turned on, (R70Rg) X Cgs
In order to switch the field effect transistor 2 at high speed, it is desirable to select an element with a small human capacitance Cgs and input resistance Rg, and to make the value of the resistor 7 small. Here, R7 indicates the value of the resistor 7.

However, if the value of the resistor 7 is reduced, the collector current of the transistor 1 increases when the transistor 1 is on and the field effect transistor 2 is off, increasing power loss, making it impossible to realize a highly efficient converter.

Figure 2 shows an example in which a push-pull circuit consisting of transistors 8 and 9 is used as a drive circuit, with PNPI-transistor 8 and N
PN l - Collector connection point of transistor 9 All connected to the gate of field effect transistor 2, diagonal 1 - transistor 8
, 9 are connected in common after passing through base resistors 10 and 11 (H), and this common contact is connected to the collector of transistor 1. In Fig. 2, transistor 8 is on and transistor 9 is off. When the field effect transistor 2 is turned on, the transistor 8 is turned off, and when the transistor 9 is turned on, the field effect transistor 2 is turned off.Here, the gate of the field effect transistor 2 is connected to the first
As shown in the figure, it is easy to apply a drive pulse with a time constant, and in order to turn on the field effect transistor 2 at high speed, the value of the resistor 10.12 can be made small. By the way, in FIG. 2, since the transistors 8 and 9 perform a push-pull operation, almost no current flows through the resistor 12, so even if the value of the resistor 12 is made small, the power loss due to the resistor 12 is small. Further, in order for the transistor 8 to turn off when the transistor 9 is on, the following relationship between the resistors 7 and 11 is required. Now, if the collector f of transistor 1 is Vc, then Vc ) B −VB+u
--(') (Here, B is input as #
tLr, 'j'BRt3 V': i l = forward voltage between the base and emitter of the pasta) However, since transistor 1 is off at this time, (here, R11 is the value of resistor 11, VBE 9 is the forward voltage between the base and emitter of transistor 9.)
From equations (1) and (2) above, VBE8''
If the above equation (3) is rearranged as VBE9""BK, it becomes (where B>2VBz). Further, field effect transistor 2f: In order to turn off the transistor 90 quickly, the base current of the transistor 90 may be increased, and it is desirable that R7+R11 be small. Therefore, from equation (4), it is not possible to increase the value R7 of the resistor 7, and although the power loss is considerably reduced compared to FIG. 1, this becomes a hindrance to achieving even higher efficiency.

Purpose of the Invention In view of the above-mentioned conventional drawbacks, the present invention provides a highly efficient power supply device by reducing the drive power loss of the field-effect transistor, and by causing the field-effect transistor to perform high-speed switching operation to reduce the loss in the switching transient state. The purpose is to obtain.

Structure of the Invention In the present invention, the collectors of the PNPI transistor and the NPN transistor are connected to each other, and the collector connection point is connected to the gate of the field effect transistor, while a resistor and a capacitor are connected in parallel to the base of the PNP transistor. The circuit is connected, and during the ON period of the NPN transistor in a steady switching operation state, the charge voltage across the capacitor applies a reverse bias to the base of the PNP transistor to completely cant off the PNP transistor, thereby reducing the drive power. It is possible to reduce the loss and also reduce the loss in the switching transient state of the field effect transistor.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to FIGS. 3 and 4. In FIG. 3, the same parts as in FIG. 2 are given the same numbers. In the device of Fig. 3, the resistance 1
The feature is that a capacitor 13 is connected in parallel to o.

By adding the capacitor 13 to the resistor 10 in this way, the relationship (3) between the resistor and the resistor 11 disappears, and R7+
Since the value R7 of the resistor 7 can be increased while R++ is kept constant, the collector current when the transistor 1 is turned on and the loss due to the resistor 7 can be completely reduced.

This will be explained in detail below. FIG. 4 shows a voltage waveform for explaining the operation in a steady switching state. During the on period of the field effect transistor 20, the collector of the transistor 1 is at ground potential, the transistor 8 is on, and the transistor 9 is off. The capacitor 13 is charged by the base current of the transistor 8, and the potential on the base side is B.
It becomes VBKB. On the other hand, during the off period of field effect transistor 2, the collector of transistor 1 is open, R+1(B - VaE9), and the potential of the collector is "= R7+ R+t
+VBK9, and transistor 9 is turned on. At this time, the potential of the base of the transistor 8 follows the potential of the collector of the transistor 1, and the potential of the base of the B-sister 8
Ha R11 (B-vBE9) + vBE9 only reverse Ba Ry
+R1+ Cut off in a biased manner. Here, if the time constant Rho x C1s of the resistor 1o and the capacitor 13 is set sufficiently larger than the off-period of the field-effect transistor 2, the transistor 8 will remain cut-off during this period. There is no need to set the value of resistor 7 smaller than that of resistor 11 as shown in equation (4). Note that the reverse bias of transistor 8 is rated at vxg
In order to keep it within o max, V〈υxno max must be fully satisfied. If this is further summarized, it becomes as follows, but since this is the direction in which the value of the resistor 7 is increased, there is no problem at all.

The effects will be described below assuming a DC-DC converter that covers the variable range of the input power supply voltage B from 6V to 18V.

In the conventional example shown in FIG. 2, from equation (4).

Here, when 8m2Lx=18v, vBE-o, and 7v are substituted into the above equation, R7<0,04 Rl +.

Now, for example, if R70R++'650 is set to Ω, 1'tN: 47 KΩ and R7=1,8 can be determined to be Ω. Here, the value RIO of resistor 10 = 50
If Ω is assumed, the loss in the push-pull circuit is almost determined by the value of the resistor 7, and when the power supply voltage 13==12V, it is calculated as follows.

(However, transistor 10 on duty δ = 0.5
shall be. ) On the other hand, in FIG. 3, in order to make the switching speed of the field effect transistor 2 equal to the on-time and off-time as in the above case, R7+Ru', 50 KΩ, R+o = 50
Let it be KΩ.

The value R7 of the resistor 7 is regulated by equation (6), and in equation (6) Z'BEOmaX = 7vl vBE9 "0.7V,
Substituting Bmax-18v, R7> 1.8 Rh
becomes. As a result, Ωr ” 7 ” at RH=10
It can be determined as 39 KΩ. The power loss in this case is similarly 13==12v.

Assuming the duty δ-0,6, it becomes. As is clear from comparing equations (7) and (8), when the input power supply voltage B is 12V, the switching speed of the field effect transistor 2 when on and off is kept equal, and 40-1.8- 38 [mw) o Power loss can be reduced and a highly efficient DC-DC converter can be obtained.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, a parallel circuit of a resistor and a capacitor is connected to the base of one of the PNP transistors constituting the pushcobble circuit, and the other end of the parallel circuit is connected to the base of the other NPN transistor. By connecting the other end of the resistor connected to the base of the transistor to the collector of the transistor, a small power supply with extremely low power loss can be obtained. Particularly effective.

[Brief explanation of drawings]

1 and 2 are circuit diagrams of a power supply device in a conventional example, FIG. 3 is a circuit diagram of a power supply device in an embodiment of the present invention, and FIG. 4 is a main part of the explanation of the operation in FIG. 3. It is a voltage waveform diagram. 1.8.9...Transistor, 2...
MO5 type field effect transistor, 3... converter transformer, 7. IQ, 11.12・River...Resistance, 1
3... Capacitor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2

Claims (1)

[Claims] The collector of the PNPI-transistor and the collector of the NPN transistor are connected to each other to form a push-pull circuit, the collector connection point is connected to the gate of the 1MO8 type field effect transistor, and the output end of the field effect transistor is connected to the primary winding of the converter transformer. Connect to the above PNP
) one end of a parallel circuit of a first resistor and a capacitor is connected to the base of the transistor, and the other end of a second resistor, one end of which is connected to the base of the NPN l-transistor, and the other end of the parallel circuit, A power supply device, characterized in that the power supply device is connected to a connection point between a collector of a first transistor and a third resistor, the base of which a pulse signal is applied.