JPH03876Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a device for driving the bases of transistors constituting an inverter that converts alternating current into direct current and converts this into alternating current of an arbitrary frequency.

Conventionally, a so-called transistor inverter, in which an inverter is constituted by a large capacity transistor (hereinafter referred to as a power transistor), has been often used because transistors are easier to control on and off than thyristors. Figure 1 shows this as an example. At the output end of a rectifier circuit 2 that rectifies and smoothes a commercial AC power supply 1, six power transistors Q, Q... are connected as series arms, two each, in a three-phase bridge configuration. A switching circuit 3 connected to the base drive circuit 6 is connected to the output terminal of the switching circuit 3, a load 4 such as a motor is connected to the output terminal of the switching circuit 3, and a pulse signal whose pulse width is modulated is transmitted from the output terminal of the control circuit 5 to the base drive circuit 6 as described above. The alternating current of any frequency is supplied to the load 4 by sending the current to the bases of the transistors Q, Q, . . . and controlling the transistors Q, Q, . . . on and off at appropriate times. The base drive circuit 6 connected to the bases of the transistors Q, Q, . . . is formed as illustrated in FIG. 2. That is, a light emitting diode LED ₁ and a resistor R ₁ are inserted in series between the output terminals of the control circuit 5, and the collector of a phototransistor PQ ₁ that is turned on by light emission from the light emitting diode LED ₁ is connected to a control power supply Vcc (not shown) (for example, +5V), connect the emitter to circuit ground (GND) via resistors R ₂ and R ₃ , connect the connection point of these resistors R ₂ and R ₃ to the base of transistor Q ₁ whose emitter is grounded, and connect this transistor Q Connect the collector of ₁ to the above control power supply Vcc through resistors _R5 and _R4 , and connect the collector of above resistor _R4 and
Connect the connection point of R ₅ to the base of a PNP transistor Q 2 whose emitter is connected to the control power supply Vcc and whose collector is connected to the control power supply V _EE (for example _-5V ), not shown, via a resistor R ₆ , transistor Q ₂
The collector of is connected to the base of a power transistor Q via a resistor _R7 , and the emitter of this transistor Q is connected to the circuit ground and the anode of a diode _D1 whose cathode is connected to the base.

The operation will be explained with reference to Figure 3.
The light emitting diode is activated by the pulse signal of the control circuit 5.
When a current i flows through LED ₁ (Fig. 3a), the light emitting diode LED ₁ emits light, and the phototransistor PQ ₁ that receives the light turns on, V _CC → collector emitter of PQ ₁ → R ₂ → Q ₁ base emitsuta →
Current flows through the GND path (partly the path from V _CC → PQ ₁ collector/emitter → R ₂ → R ₃ → GND), turning on transistor Q ₁ . This results in V _CC →Q ₂
Since current flows in the path from emitter to base of transistor Q → R ₅ → collector to emitter of Q ₁ → GND (partially the path from V _CC → R ₄ → R ₅ → collector to emitter of Q ₁ → GND), transistor Q ₂ turns on, V _CC →Q ₂
Drive output current i _B on the emitter-collector → R ₇ → base-emitter of Q → GND path (partially V _CC → emitter-collector of Q ₂ → R ₆ → V _EE )
flows and turns on the power transistor Q.

After that, when the current flowing through the light emitting diode LED ₁ becomes 0, the phototransistor PQ ₁ turns off with a slight delay (Fig. 3b), and the current flowing through the resistor R ₂ also becomes 0, but the transistor Q ₁ turns off. Due to the charge accumulated between the base and emitter of the transistor _Q1 when it is turned on, the voltage between the base and emitter of the transistor _Q1 , that is, the voltage between the terminals of the resistor _R3 does not immediately become 0V, but is accumulated with the resistor _R3 . Charge C _BE
It gradually decreases with a time constant determined by ₁ . For this reason,
The transistor Q ₁ does not turn off immediately even when the phototransistor PQ ₁ turns off and the current in the resistor R ₂ becomes 0, and turns off after an accumulation time of t _stg1 (the third
Figure c). When this transistor _Q1 is turned off, the resistance
The current flowing through R ₅ also becomes 0, but the transistor Q ₂
The distance between the base and emitter of the circuit does not become zero immediately due to the charge accumulated between the base and emitter when it is turned on, but gradually decreases with a time constant determined by the resistance _R4 and the accumulated charge _CBE2 . The rise of the base potential is delayed, and the transistor Q ₂ is turned off after the transistor Q ₁ is turned off and after a delay of the storage time t _stg2 of the transistor Q ₂ (FIG. 3d). Moreover, this transistor Q ₂ needs to supply a drive output current i _B sufficient to drive the power transistor Q, so a transistor with a larger current capacity than transistor Q ₁ is inevitably selected. Therefore, the accumulation time t _stg2 mentioned above also becomes quite large. As a result, the light emitting diode LED ₁
After the current i flowing through the transistor Q ₂ turns off,
The time until phototransistor PQ ₁ turns off is
If the accumulation time is t _stgp , then there is a delay time represented by the sum of t _stgp + t _stg1 + t _stg2 , and the value is about 30 _μs . Therefore, the off command for the power transistor Q is given by the above delay time (t _stgp + t _stg1 +
t _stg2 ) and the storage time t _stg1 (10~
Since the pulse signal of the control circuit 5 must be sent taking into account the delay time (20 _μs ), and the storage time of each transistor varies depending on the flowing current, the off command to the power transistor Q must be sent in less than 40 _μs , for example. In this case, it becomes difficult to obtain a stable off-operation of the power transistor Q, and this also limits the modulation width when controlling the power transistor Q by pulse width modulation, which reduces the so-called chopper frequency. I can't give you anything,
In addition to the problem of not being able to perform high-speed switching, the long delay time when the power transistor Q is turned off may cause a short-circuit accident due to the overlap of the on/off states of the two power transistors Q, which form a series arm. In order to prevent this, the so-called dead time must necessarily be set large, and on the other hand, the on/off accuracy of the power transistors Q and Q, which form the series arm, must be set in response to the on/off commands of the control circuit. (i.e. conduction/
Since the accuracy of the chopping time must be maintained, there is a problem in that it is necessary to further reduce the chopper frequency. Moreover,
For example, a decrease in the chopper frequency is caused by a sine wave.
In the case of a PWM inverter, the ripple caused by the chopper frequency included in the motor's stator winding current waveform increases, causing problems such as increased torque ripple, vibration, and noise of the motor, as well as a decrease in motor efficiency. In addition, since the control power supply has two positive and negative power supplies, the power consumption and power supply capacity are large, and a PNP type transistor is used for the drive output of the power transistor.
Less versatile than NPN transistors,
There are also restrictions on the selection, which makes the device expensive, resulting in a large and expensive device.

The present invention was developed in view of the above-mentioned points, and its purpose is to provide fast response speed,
The object of the present invention is to provide a device that consumes less power, is smaller, more compact, and lower in cost.

Embodiments of the present invention will be described below with reference to FIGS. 4 and 5. Incidentally, since the transistor inverter is constructed in the same manner as shown in FIG. 1 except for the base drive circuit 6, the same reference numerals will be used for explanation. In FIG. 4, reference numeral 7 denotes a base drive circuit connected to the bases of the power transistors Q, Q, . . . of the switching circuit 3 in place of the base drive circuit 6. In this case, a light emitting diode LED ₂ and a resistor R ₈ are inserted in series between the output terminals of the control circuit 5, and a resistor R ₉ is connected to the collector of a phototransistor PQ ₂ which is turned on by light emission from the light emitting diode LED ₂ . Connect the emitter to the control power supply V _CC (e.g. +5V) through the resistor R10 and R11, and connect the emitter to the circuit ground (DND) through the resistors _R10 and _R11 .
The emitter of the phototransistor PQ ₂ is connected to the control power supply V _CC , and the collector is connected to the resistor.
PNP type transistor connected to circuit ground via R ₁₂
Connect to the base of Q ₃ , connect the connection point between the above resistors R ₁₀ and R ₁₁ , and connect the collector to the control power supply through resistor R ₁₃ .
V _CC and the emitter is connected to the base of a transistor Q ₄ connected to circuit ground, and the collector of said transistor Q ₃ is connected to the base of a transistor Q ₅ whose collector is connected to the control power supply V _CC through a resistor R ₁₄ . The base of this transistor Q 5 is connected through a resistor R ₁₅ , the emitter of this transistor Q ₅ is connected through a resistor R ₁₆ to the collector of a transistor Q ₆ whose emitter is connected to the circuit ground, and the base of this transistor Q ₆ is connected to the above transistor Q. In the collector of ₄ , resistor R ₁₇ and capacitor
Connected through a parallel circuit with C ₁ , the emitter of the transistor Q ₅ is connected to the base of the power transistor Q through a parallel circuit with a diode D ₂ inserted in the opposite direction, a resistor R ₁₈ , and a capacitor C ₂ . The emitter of this transistor Q is connected to the circuit ground, and the drive output current i _B1 of the power transistor Q of the diode _D1 whose cathode is connected to the base is caused to flow.

Next, its operation will be explained with reference to FIGS. 5 and 1. When a current i flows through the light emitting diode LED ₂ due to the ON command (pulse signal) of the control circuit 5 (the fifth
(input in Figure 7), the light emitting diode LED ₂ emits light, and in response to this, the phototransistor PQ ₂ turns on.
V _CC → emitter base of Q ₃ → collector of PQ ₂
Emitter → R ₁₀ → Q ₄ base emitter → GND
(Some parts are V _CC → R ₉ → PQ ₂ collector/emitter →
Current flows through the path (R ₁₀ → R ₁₁ → GND), turning on transistors Q ₃ and Q ₄ . As a result, the base potential (point a) of the transistor Q ₃ becomes the base-emitter saturation voltage V _BE3 (SAT) of the transistor Q ₃ .
The potential drops from the control power supply V _CC by
Figure point a) Also, the collector potential (point d) is the control power supply
The potential rises to the difference between V _CC and the collector-emitter voltage V _CE3 of the transistor Q ₃ (V _CC - V _CE3 ) (point d in Figure 5), and the emitter potential of the phototransistor PQ ₂ (point b) increases. , transistor from control power supply V _CC
The voltage rises to a potential (V _CC −V _BE3 −V _CEP ) lower by the base-emitter voltage V _BE3 of Q ₃ and the collector-emitter voltage V _CEP of the transistor PQ ₂ (point b in Figure 5), and the transistor Q Collector potential of ₄ (point e)
drops to the collector-emitter saturation voltage _VCE4(SAT) (approximately OV) of the transistor _Q4 (point e in Figure 5),
Further, the base potential (point c) becomes a potential raised to the base-emitter saturation voltage V _{BE4 (SAT)} of the transistor _Q4 (point c in FIG. 5). Then, when the above transistor Q ₃ turns on, V _CC → emitter/collector of Q ₃ → R ₁₅ → base/emitter of Q ₅ → R ₁₈ C ₂
→Base emitter of Q →GND (partially V _CC →Q ₃
Since the base current flows through the transistor _Q5 through the emitter-collector-> _R12- >GND path (between d and f in FIG. 5), the transistor _Q5 is turned on.
By turning on this transistor Q ₅ , V _CC →R ₁₄ →
Drive output current (base current of Q) in the path of Q ₅ collector/emitter → R ₁₈ C ₂ → Q base/emitter → GND (partially V _CC → Q ₃ emitter/collector → R ₁₂ → GND) i _B1 flows (output in FIG. 5, FIG. 7), and the power transistor Q turns on.
At this time, a part of the drive output current i _B1 flows into the capacitor C ₂ , so the capacitor C ₂ is charged to the polarity shown, and the emitter potential (point f) of the transistor Q ₅ rises to the base of the power transistor Q. - The potential is the sum of the emitter saturation voltage V _{BE (SAT)} and the voltage V _R18 between the terminals of the resistor _R18 (V _{BE (SAT)} + V _R18 ) (point f in Figure 5). Also, since transistor Q _{4 and} transistor Q ₃ are on, transistor Q 6 has a collector-emitter saturation voltage of
The relationship between V _{CE4 (SAT)} and the base-emitter voltage V _BE 6 of the transistor Q ₆ is V _{CE4 (SAT)} < V _BE 6, so the base current does not flow (between e and h in Figure 5). in a state.

In this state, when the current i flowing through the light emitting diode LED ₂ of the base drive circuit 7 becomes 0 due to the off command from the control circuit 5 (input shown in FIG. 5 and 7), the light emitting diode LED ₂ turns off and the phototransistor PQ ₂
After the time required for the charge accumulated between its base and emitter to be released (i.e. the accumulation time t _spgt2 ),
Turn off (point b in Figure 5). As a result, the transistors Q ₃ and Q ₄ are turned off after the time required to release the charges accumulated between the base and emitter via the resistors R ₉ and R ₁₁ (i.e., the accumulation times t _stg3 and t _stg4 ). (Figure 5, points a and c). When the transistor Q ₃ is turned off, the current flowing through the resistor R ₁₂ is approximately 0.
Therefore, the _collector potential (d
point) becomes OV (point d in Figure 5). At this time, the emitter potential (point f) of the transistor Q ₅ rises to the potential of V _{BE (SAT)} + V _R18 when the transistor Q ₅ is turned on, so the potentials of the points d and f are Since the relationship d<f, the capacitor C ₂
changes its charge to C ₂ → emitter base of Q ₅ → R ₁₅ →
It is discharged along the path R ₁₂ → emitter/base of Q → C ₂ , and a reverse bias current IB ₂ with a steep fall flows between the base and emitter of transistor Q ₅ (the fifth
d-f), the charge accumulated between the base and emitter is instantly released, turning off the transistor _Q5 at high speed ( _Q5 in Figure 5). On the other hand, the transistor Q ₄ is also turned off at the same time as the transistor Q ₃ , so that the transistor Q ₆ has V _CC →R ₁₃
→R ₁₇ C ₁ → Base current I _B1 flows in the path from the base emitter of Q ₆ to GND (between e and h in FIG. 5), and the transistor Q ₆ is turned on (Q ₆ in FIG. 5). As a result, capacitor C ₂ discharges the charge charged with the polarity shown in the diagram through the path of C ₂ → R ₁₆ → collector-emitter of Q ₆ → emitter-base of Q → C ₂ , and connects the base-emitter of power transistor Q. A reverse bias current i _B2 with a steep rise is passed (output in Figure 5, 7).
In order to instantaneously discharge the charge accumulated between the base and emitter, the power transistor Q is turned off at high speed. At this time, the collector potential (point e) of the transistor Q ₄ is set to V _R between the control power supply V _CC and the terminal of the resistor R ₁₃ by turning on the transistor Q ₆ .
₁₃ (V _CC -V _R13 ), and the capacitor C ₁ is charged with the polarity shown by a portion of the base current I _B1 of the transistor Q ₆ . this capacitor
The charge charged in C ₁ is released when the next transistor Q ₆ is turned off (i.e., when the power transistor Q is turned on)
, when transistor Q ₄ is turned on (that is, the collector potential (point e) of transistor Q ₄ is approximately
OV), discharge occurs along the path C ₁ → collector/emitter of Q ₄ → emitter/base of Q ₆ → emitter/base of Q ₁ → reverse bias current with a steep fall between the base and emitter of transistor Q ₆ . I _B2 (Fig. 5 e
-h) to instantly release the charge accumulated between the base and emitter, and the transistor _Q6
It is used to turn off the power at high speed.

In this way, the transistor Q ₅ for on-control of the power transistor Q is turned on by the electric charge of the capacitor C ₂ charged during the DC current.
By applying a reverse bias between the base and emitter of _Q5 , a steeply falling reverse bias current is applied, and the base and emitter are reverse biased.
Instantly releases the charge accumulated between the emitters,
The transistor _Q6 for off-control of the power transistor Q applies a reverse bias between the base and emitter of the transistor _Q6 by the electric charge of the capacitor _C1 charged when it is turned on, thereby generating a reverse bias current with a steep fall. By instantly discharging the charge accumulated between the sink base and emitter, the above transistor
Since Q ₅ and Q ₆ are each turned off at high speed, the time that transistor Q ₆ is on when transistor Q ₅ is turned on from off,
Conversely, the time that transistor Q5 is on when transistor _Q6 turns on from off, that is, _the time that transistor _Q5 turns on and off in a complementary manner.
By greatly reducing the overlap time t _L during the on/off switching operation of Q ₆ and turning on both transistors Q ₅ and Q ₆ , the collector of V _CC →R ₁₄ →Q ₅ It greatly reduces the flow of large current in the emitter → R ₁₆ → collector emitter → GND path of Q ₆ , prevents transistors Q ₅ and Q ₆ from reaching the saturation region, and prevents rising and falling edges. By passing a steep current through the power transistor Q, on/off control of the power transistor Q can be achieved at high speed and with stable operation.

According to the present invention, when the power transistor Q is turned on, the capacitor _C2 is charged through the transistor _Q5 to raise the emitter potential of the transistor _Q5 , and the transistor _Q5 is turned off by simultaneously turning off the transistors _Q3 and _Q4 . The base potential of the capacitor C2 is set to approximately OV, and the charge of the capacitor _C2 causes a steeply falling reverse bias current to flow between the base and emitter, turning off the transistor _Q5 at high speed, and supplying a voltage to the transistor _Q6 via the capacitor _C1. The transistor _Q6 is turned on at high speed by flowing a base current with a steep rise, and the charge of the capacitor _C2 causes a reverse bias current with a steep fall to flow between the base and emitter of the power transistor Q. Therefore, there is no case where the accumulation time of each transistor is added up and the response of the base current of the power transistor Q is significantly delayed, unlike in the conventional case. can be turned off at a speed of 1/3 to 1/4 compared to conventional methods. This can further improve the accuracy of conduction and disconnection during pulse width modulation of the power transistor Q of the transistor inverter, and expand the pulse width modulation range, making it possible to increase the chopper frequency. , high-speed switching has become easier, and especially with sine wave PWM inverters, the motor's stator winding current waveform can be more closely approximated to a sine wave, greatly reducing motor torque ripple, vibration, and noise. This has the great effect of making it possible to form a transistor inverter that can greatly improve motor efficiency compared to conventional ones. Moreover, the transistors _Q5 and _Q6 , which turn on and off in a complementary manner, are configured to both flow a steeply falling reverse bias current through the capacitors _C2 and _C1 , so that the switching operation of the transistors _Q5 and _Q6 is The overlapping time can be made extremely narrow, and large currents can be
The time flowing through both _Q5 and _Q6 can be greatly reduced, and the heat loss of the resistor can be greatly reduced, resulting in lower power consumption. Also, transistor
Since the reverse bias of _Q5 is performed using the charge of the capacitor _C2 provided for reverse biasing of the power transistor Q, it is possible to configure the transistor _Q5 without providing a so-called speed-up capacitor. , and the circuit can be simplified. In addition, both transistors Q ₅ and Q ₆ can be constructed of highly versatile NPN type transistors, and the control power supply is also a single power supply system, which reduces power supply capacity and power consumption. This makes it possible to make the IC smaller and more compact, making it easier to create a so-called hybrid IC.

[Brief explanation of the drawing]

Fig. 1 is a block diagram illustrating a conventional transistor inverter, Fig. 2 is a circuit diagram of the base drive circuit of Fig. 1, Fig. 3 is a time chart explaining the operation of Fig. 2, and Fig. 4 is a diagram of the main circuit. FIG. 5 is a circuit diagram showing an embodiment of the invention, and FIG. 5 is a time chart explaining the operation of FIG. 1: Commercial AC power supply, 2: Rectifier circuit, 3: Switching circuit, 4: Load, 5: Control circuit, 6, 7:
Base drive circuit, Q: power transistor,
PQ ₁ , PQ ₂ : Phototransistor, Q ₁ , Q ₄ , Q ₅ ,
Q ₆ : Transistor, Q ₂ , Q ₃ : PNP transistor, C ₁ , C ₂ : Capacitor.

Claims (1)

[Scope of utility model registration request] A switching circuit in which multiple power transistors are connected in a bridge configuration is connected to a commercial AC power source via a rectifier circuit, and the base of the multiple power transistors responds to on/off commands from the control circuit via a light emitting diode. In the transistor inverter connected to the drive circuit, the base drive circuit includes a phototransistor PQ ₂ that responds to commands from the control circuit via a light emitting diode.
, the collector is connected to the control power supply Vcc through a resistor _R9 , the emitter is connected to the circuit ground through resistors _R10 and _R11 , and the base is connected to the collector of the phototransistor _PQ2 , Collector resists
PNP transistor Q ₃ connected to circuit ground via R ₁₂
A transistor with an _{emitter of}
A resistor R ₁₃ is connected to the collector of Q ₄ , and a resistor R ₁₆ is connected to the collector of the transistor Q ₆ whose base is connected to the collector of the above transistor Q ₄ through a parallel circuit of resistor R ₁₇ and capacitor C _1.
The emitter is connected through and the base is resistor R ₁₅
A resistor connected to the collector of transistor Q ₅ connected to the collector of transistor Q ₃ above through
_R14 , and the emitter of the transistor _Q5 is connected to the base of the power transistor Q through a parallel circuit of a resistor _R18 and a capacitor _C2 , and the capacitor _C2 connects the power transistor Q and the transistor _Q5. A base drive device for a transistor inverter, characterized in that a reverse bias is simultaneously applied to the transistor inverter.