JPS5921104A - Digital control oscillator - Google Patents

Abstract

PURPOSE:To obtain an oscillating output of high accuracy, by calculating and storing a product obtained by multiplying a digital signal sampled with a prescribed sampling frequency by the 1st digital coefficient, the 2nd digital coefficient and the calculated result obtained earlier by a sampling period respectively. CONSTITUTION:A digital signal V(nT) sampled with a prescribed sampling frequency FS is supplied to an input terminal 1 and multiplied by the 1st digital coefficient C1 through a multiplier 2. A data selector 3 selects data with a selection pulse t1, and the code is checked by a decoder 6. Then the addition or subtraction is selected by an FF7. An adder 4 performs an addition with a sampling period earlier output y(nT) supplied from a D-FF5, and then C2 is selected and added. In this case, if the adder 4 has an overflow, this overflow is detected by the decoder 6. The output of addition is inverted to deliver the correct value in the form of a triangular wave. At the same time, a subtraction is carried out via the FF7. These actions are repeated to obtain an oscillating output of a triangular wave. Both oscillating frequency and control sensitivity can be controlled by changing the coefficients C1 and C2.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital control type oscillator that generates an oscillation output of a predetermined waveform by digital control, and is capable of generating an oscillation output with high precision with a relatively simple configuration. The aim is to provide an oscillator.

Conventional configurations and their problems In general, voltage-controlled oscillators (VCOs) are widely used in analog circuits such as PLL demodulation circuits, but sine wave oscillators have complex circuit configurations and problems with variable frequency range and linearity. Since this also requires advanced technology, triangular or sawtooth wave oscillators with simple circuit configurations are often used.

On the other hand, even with the Tizicle type ■CO, R can be used as a sine wave oscillator.
There are so-called quadrature-type vCOs that use OM table filters, and that use two first-order low-pass filters using large-scale multipliers connected in series, but none of them. However, the configuration is complicated and not practical. However, even if the vCO used in the PLL circuit is not an exact sine wave, even if it contains some high frequency components, it will not have a major effect on the operation. There is a characteristic that ．． 81♀
1 target.・．．・・・．・ Is the present invention based on input information? It provides an optimal 7" digitally controlled oscillator for the surface path for demodulating 2pLb signal.
In particular, it is an object of the present invention to provide a device that has a relatively simple configuration and can generate an oscillation output with high accuracy.

Structure of the invention. ．． In the present invention, fL is sampled at a predetermined sampling frequency F+ without being switched. The input is a digital signal.

Then, add the first dicicle coefficient 01 to that input,
The calculation means calculates three digital signals: the product, the second digital coefficient 02, and the calculation result y((..n-1)T> of one sampling period before).

The result of the calculation. It is characterized in that it is output as a Y(nT)t-output signal and is also stored for use in calculations during the next sampling.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to all the drawings.

．． 1 First, Figure 1 shows the basic configuration of the PI,L demodulation circuit.
LO Here, PD is a phase detector, L, PF are low, cis?
Fisilek Giant and vCO are voltage controlled oscillators.

v'CO is essentially a frequency modulator, which generates an oscillating output with a frequency proportional to the amplitude of the control signal -i4. It is something. That is, in vGO, there is the following relationship between the voltage V of the control signal and the angular frequency W of the oscillation output: (W7W[l),=OV. Here, WO is the center frequency of vCO,
C is a constant. If the phase of the oscillation output is ψ, then dψ/
From dt==W, it becomes. Therefore, if expressed as ψ(a? time discrete value ψ(nT)) where t2nT(n is an integer and 5T is the sampling period length), it becomes If Y(nT)'k is calculated, the oscillation output of vGO has been calculated.

FIG. 2 shows a configuration for calculating equation (2).

Here, v(nT) is the input signal to vOO, a delay device that delays ψ(n'l')'t by T times one sampling period,
COS is a cosine transformer. However, the VC in Figure 2
At O, the oscillation output y(nT)'ff: To obtain. A cosine transformation is necessary, and this transformation is complex.

Therefore, in the main launch month B, the oscillation output. y(nT)ffi It is configured as a triangular waveform instead of a sine function waveform and does not require complicated calculations. FIG. 3 shows the configuration of an embodiment of the present invention.

In FIG. 3, 1 is an input terminal for a digital signal V (n.T) sampled at a predetermined sampling frequency Fg; 2 is a multiplier that multiplies the human power V (n.T) by a first digital coefficient C1; 3 is. Data select, 4 is adder, 5 is D type flip-flop (memory, used as delay device),
6 is a decoder, 7 is a free) Hepfu Oyp, 8 and 9 are E
The X-OR gate, 1o is the output terminal of the oscillation output, '/(nT). Here, to simplify the circuit configuration,
With one adder 4, addition is performed twice within the sampling period. The input to the decoder 6 is indicated by a dotted line n, where the sign of each signal is checked.

The entire situation of triangular wave generation by this circuit is shown in FIG. The digital value handled here is represented by two's complement (2'C), and its maximum value is considered by normalizing ±IK. Now, in Fig. 4, let the input dissipicle signal v(nT) be a direct current, and nT=
Suppose we start the calculation at Q. When i'l=1, V(
'nT) Then add n:t).

According to this method, the adder 4 adds the output y(n'r) of the D-Flinob Fronop 5 one sampling period before. n2o
Noto@cy(n'r.)==ofattato:ltpa,
It becomes like n=i in FIG. Next, C2 (0.4 in the figure)
) Data select 3 is selected and added. At this time, if adder 4 overflows, decoder lc. ! :
! ll is detected, inputs EXffOR gate 9K"1'', inverts the addition output, and outputs the correct value as a triangular wave (state of n = 2). At the same time, EXffOR gate 9K"1'' is input by FF7.
Input "1" to the R gate 8 so that subtraction is performed instead of addition from the next operation.Continuing this, a triangular wave is obtained as the oscillation output 3/(nT) as shown by the dotted line in Figure 4. It will be done.

In this oscillator, the oscillation frequency F is F=FsX(C2+V(nT)XO1)', where Fs is the sampling frequency. '/4. The upper limit of the oscillation frequency is determined by /2 or lower, and the lower limit is determined by the effective data length of the digital value. Ru.

The function as a vCO is to give the center frequency FO of the VCO by the first digit coefficient 02,
, the coefficient 01 gives the control sensitivity of the VCO.

That is, Fo=FsXCz/4.

Effects of the Invention As described above, according to the present invention, the following effects can be obtained.

(1) The amplitude of the input signal and the output frequency are completely linear.

(2) It is easy to change the center frequency of the VCO and the limiting sensitivity by simply changing the digital coefficients 01, C, and 2i.

(3) Frequency stability depends on the quanok frequency. ．．
It is stable and stable.

((d) Complex calculations are unnecessary, and the circuit is strikingly simple.

[Brief explanation of drawings]

Figure 1 is a block diagram of a general PLL circuit, Figure 2 is a block diagram of a conventional digitally controlled oscillator, Figure 31g is a block diagram of a digitally controlled oscillator according to an embodiment of the present invention, and Figure 4 is its block diagram. FIG. 3 is a waveform diagram for explaining the operation. 1... Input terminal, 2... Multiplier, 3.
...Data selector, 4...Adder, 6
......D-flip-flop, 6...decoder, 7...flip-flop, . 8,9・
...EX-OR gate, 1o...Output terminal. =32

Claims (1)

[Claims] (1) Take as input a digital signal sampled at a predetermined number of sampling cycles, multiply the input by a first digital coefficient,
The three digital signals of the product, the second digital coefficient 02, and the calculation result from one sampling period before are calculated by the calculation means, and the calculation result is output, and the calculation result is used for the calculation at the next sampling time. A digitally controlled oscillator characterized by being memorized for use. 2) An adder/subtractor is provided as an arithmetic means, and the addition/subtraction of the adder/subtractor is controlled by a logic circuit so that a sawtooth wave or triangular wave is generated by the overflow output of the adder/subtractor or the output of a comparator to which the addition/subtraction output is applied. The digitally controlled oscillator according to claim 1, wherein the digitally controlled oscillator is characterized in that the digitally controlled oscillator is configured to have the following characteristics.