JPH0218608B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a sine wave generating circuit that can operate stably. Conventionally, phase-stable sine wave generation circuits used in signal generators and the like have been configured to extract a desired signal from the output of a source oscillator via a filter circuit that removes harmonics. However, many filter circuits of this type use LC filters. However, as shown in Figure 1, near the cut-off frequency of ₀ of the LC filter, the phase characteristics change rapidly, so the LC
There is a drawback that stable characteristics cannot be obtained due to variations in characteristics of circuit elements constituting the filter, changes in temperature, or changes over time. The present invention eliminates the above-mentioned drawbacks and will be described below along with an embodiment thereof. Figure 2 is a circuit diagram showing the configuration of a sine wave generating circuit.
FIGS. 4 and 5 are waveform diagrams for explaining the operation, and FIG. 3 is a diagram showing the relationship between the amplitude and phase of the filter. In FIG. 2, 1 is a staircase wave generation circuit section, and 2 is a filter circuit section, each of which is composed of the following circuit components. That is, 3 is the clock pulse input terminal, 4 is the clock input terminal CK,
A counter having output terminals Q ₀ to Q ₃ , 5 and 6 are first and second output terminals, and a exclusive OR circuit.
7 and 8 are D flip-flops each having a clock input terminal CK, a control terminal D, and an output terminal Q; 10 is an operational amplifier; R ₁ to R ₅ are each a resistor;
_C1 to _C3 are each capacitors. In this embodiment, a power source (not shown) that generates both positive and negative voltages is used. In Figure 5, A is the clock pulse applied to terminal 3, B, C, D, and H are the outputs of the output terminals Q ₀ , Q ₁ , Q ₂ , and Q ₃ of the counter 4, respectively, and H and G are the exclusive pulses, respectively. Outputs of the OR circuits 5 and 6, H is the output of the terminal Q of the D flip-flop, R is the output of the terminal of the D flip-flop 8, and N is the output of the operational amplifier 10. Next, the operation of this embodiment will be explained. In this embodiment, the staircase wave generation circuit section 1 uses a signal source with as few harmonic components as possible by digital means, and the filter circuit section 2 is responsible for removing high-order harmonics of the staircase waveform from the signal source. This realizes an oscillation circuit with low harmonic content.
More specifically, the staircase wave generation circuit section 1 uses a staircase waveform that does not include even and odd order components up to the 5th order, while the filter circuit section 2 mainly uses the 7th order component. Make sure to remove harmonic components. Fourier analysis was performed on the staircase waveform as a staircase waveform satisfying the above conditions, and the amplitude ratio and time interval of each step of the staircase wave were determined as follows. That is, as shown in Fig. 4, in a staircase wave that is symmetrical in positive and negative directions with respect to the 0 level and has amplitudes of e ₁ and e ₂ and time intervals of t ₁ and t ₂ , e ₁ :e ₂ =1:√2. , also t ₁ :
With the choice of t ₂ =1:2, the embodiment shown in FIG. 2 is able to generate such a staircase wave. Next, the relationship between e ₁ and e ₂ and t ₁ and t ₂ will be explained based on the Fourier series. When the waveform shown in Figure 6 is expanded into a Fourier, Figure 6 is an even function, so f(t) = a ₀ + _∞ 〓 ⁿ⁼¹ a _o cosnωt a ₀ = 2/T{C∫ ^T/8 ₀ dt＋B∫ ^T/4 _T/8 dt＋A∫ ^3/8T _T/4 dt} = 1/4 (A + B + C) a _o = 4/T∫ ^T/2 ₀ (t) cos nωtdt = T/4 {∫ ^T/8 ₀ Ccos nωtdt＋∫ ^T/4 _T/8 Bcos nωtdt +∫ ^3/8T _T/4 Acos nωtdt} Here, since T=2π/ω, a _o =2/nπ{A(sin3nπ/4−sinnπ/2) +B(sinnπ/2-sinnπ/4)+Csinnπ/4} Therefore, the fundamental wave component is a ₁ =1/π{(√2-2)(A-B)+√2C} Also, the harmonic component is: a ₂ =-1/π(A+B-C) a ₃ =1/3π{(√2+2)(A-B)+√2C} a ₄ =0 a ₅ =-1/5π{(√2+2)(A -B)+√2C) a ₆ =2/3π(A+B-C) a ₇ =1/7π{(2-√2)(A-B)-√2C} a ₈ =0 a ₉ =1/9π {(√2-2)(A-B)+√2C} a ₁₀ =-1/5π(A+B-C) 〓 〓 Here, B=(1+√2)A C=(2+√2)A ( Therefore, in Figure 4, if we make the relationship l ₁ :l ₂ =1:√2) becomes. Therefore, becomes. Therefore, the amplitude of the composite signal is

[Formula] and Then, the amplitude of the reference wave component is

[Formula] becomes. When this signal is passed through a low-pass filter, the fundamental wave component is attenuated by approximately 20 dB.

[Formula] becomes. At this time, the odd-numbered harmonics x _o of the 7th order and above are attenuated by 1/n due to the waveform synthesis effect, and to 1/10n due to the filter effect.

[Formula] becomes, and the fundamental wave of the filter output is attenuated by 40log n. This is, for example, 34 dB for the 7th order, and
38dB, 42dB at the 11th order. Therefore, a signal extremely close to a sine wave can be obtained at the filter output. Note that the relationship (t ₁ :t ₂ =1:2) is natural since it is an even function. By inputting the clock signal applied to input terminal 3 to clock terminal CK of counter 4,
Output terminals _Q0 to _Q3 output the respective clock signals divided into 1/2 to 1/16. The outputs of the output terminals Q ₂ and Q ₃ of the counter 4 are input to the exclusive OR circuit 5, and the first exclusive OR circuit 5
The output of the counter 4 and the output of the output terminal Q1 of the counter ₄ are input to a second exclusive OR circuit 6, and these first and second exclusive
The outputs of OR circuits 5 and 6 are connected to the first and second D
It is input to control terminals D of flip-flops 7 and 8. At the same time, latching is performed in synchronization with the clock signal from the input terminal 1, and the output of the terminal Q of the first D flip-flop 7 is connected to the resistor _R1 , and the output of the terminal of the second flip-flop 8 is connected to the resistor _R2. By synthesizing via the 0 voltage level, a staircase waveform signal having positive and negative symmetry with respect to the 0 voltage level is obtained.
Note that the values of the resistors R ₁ and R ₂ may be determined by considering the ratio of e ₁ and e ₂ in FIG. 4. Next, the step waveform signal is input to the Miller integration circuit formed by the operational amplifier 10, the resistors R ₁ and R ₂ , and the capacitor C ₁ to remove harmonics by the integration action _. The first consisting of capacitor C ₂
The harmonic components are further removed by both the CR filter (integrator) and the second filter (integrator) formed by the resistor _R4 and the capacitor _C3 . In this case, as shown in FIG. 3, for example, the cutoff frequency of the first and second filters is
₁ and ₂ are respectively chosen as ₁ = 1/10 ₀ and ₂ = 10・₀ , and there is a phase delay of 0.57° in the first filter and 89.43° in the second filter, and the total for both is
A phase delay of 90° is obtained. The phases of the first and second filters at frequency ₀ are around 0° and 90°, respectively, and are in the region where the amount of phase changes little with respect to changes in frequency, so the phase characteristics of the filter circuit are as follows: Operates stably. Further, the phase-delayed (-90°) outputs from the first and second filters are fed back to one terminal of the operational amplifier via a resistor _R5 . The phase lead of the Miller integrator is
Since the angle is 90°, the total feedback is 0° (in-phase). According to the above configuration, the staircase wave generation circuit 1 can be made to have fewer harmonic components of the 6th order and below, and each of the first and second filters operates in a phase-stable region with a combined cutoff frequency _{of 0} . do. Moreover, by feeding back the outputs of the first and second filters via the resistor _R5 to the input 9 of the operational amplifier 10, the filter circuit 2 can be operated stably, and according to actual measurements, the overall It is a sine wave with high harmonic attenuation and stability, with each harmonic component up to the 7th order being -60 dB or less, and the phase change during temperature change (0°C to 100°C) being less than ±0.5°. A generation circuit can be realized. In addition, in the above example
Although we have shown an example of a two-stage CR filter,
It goes without saying that each stage of the CR filter may be composed of a combination of three or more filters whose phases are in the stable region. As explained above, according to the present invention, by operating a staircase waveform in combination with a Miller integrating circuit and a plurality of CR filter circuits each operating in a region where the phase characteristics are stable, stable and high performance can be achieved. A sine wave generating circuit can be realized, and its industrial value is great.

[Brief explanation of drawings]

Figure 1 is a phase characteristic diagram of a conventional LC filter.
Fig. 2 is a block diagram of a sine wave generating circuit according to an embodiment of the present invention, and Figs. 3a and 3b show its RC.
Amplitude characteristic diagram and phase characteristic diagram of filter, 4th
5 is a signal waveform diagram of the main part, and FIG. 6 is a general stepped waveform diagram. 7, 8...Flip-flop, 10...Operation amplifier, _C1 , _C2 , _C3 ...Capacitor, _R3 , _R4 , _R5
……resistance.

Claims (1)

[Claims] 1 Input the staircase wave generation circuit section with the time interval set to 1:2 and the amplitude 1:√2, and the output signal of this staircase wave generation circuit section, advance the phase by 90 degrees, and remove high-order harmonics. a first filter which inputs the output signal of this Miller integrator circuit and delays the phase by 0.57° with a frequency 10 times the frequency of this output signal as a cutoff frequency; and an output signal of this first filter. and set the cutoff frequency to 1/10 of the frequency of this output signal.
Equipped with a second filter that delays the phase by 89.43°,
The total phase delay of the first filter and the second filter is set to 90 degrees, and by combining with the 90 degrees phase lead of the Miller integration circuit, the staircase wave generation circuit operates in a stable frequency range as a whole. A sine wave generating circuit characterized in that the first and second filters eliminate harmonic components of the seventh order and higher, while the first and second filters remove harmonic components of the seventh order and higher.