JPS59207739A - Light d latch circuit - Google Patents

Abstract

PURPOSE:To enable to store a data light signal as binary output quantity of light by putting a data light signal and a clock light signal respectively in a light branching circuit and inputting the output of a light bistable element through a light inverter, a light AND circuit etc. CONSTITUTION:A data light signal 200 from an incident end 100 having light quantity of an H level 2P1, an L level 0 is made incident to a light branching circuit 102, and divided into two light signals of the H level P1, the L level 0 and is made incident to a light AND circuit 110 and a light inverter IV107 respectively. A clock light signal 202 of H level 2P1, L level 0 from an incident end 103 is made incident to a light branching circuit 105 and divided into two light signals of H level P1, L level 0, and is made incident to the circuit 110 and a light AND circuit 113. The incident light is converted to a light signal 201 of 0, Pb and is made incident to the circuit 113, and its output light 204 is made incident to a light IV115. Output light 203, 205 of the circuit 110, IV115 is made incident to a light bistable element 118, and the output light 206 of the element 118 is maintained at light quantity of P1, P0, by bias light with light quantity Pb of an output light 205.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an optical D latch circuit for storing optical signals.

Conventionally, current mode logic, which uses a current switch as a basic block, has been known as a device that performs logical operations on electrical signals at high speed, and in recent years, Gυ-FE
Research is progressing on ultra-high-speed logical operation devices using T and di-Sefson coupling elements.

However, high-speed digital information processing of a large amount of two-dimensional data such as image information using electrical signals has limitations in terms of calculation speed, power consumption, etc.

Therefore, it is desired to realize an optical logic operation device that can digitally process optical signals as they are light, which is compatible with high-speed, two-dimensional parallel information processing. Optical information storage devices that can read and write data are essential.

SUMMARY OF THE INVENTION An object of the present invention is to provide an optical D latch circuit that can store a data optical signal as a binary output light amount using a clock optical signal.

According to the present invention, the first optical branch circuit has an input end led to the data optical signal input terminal, the second optical branch circuit has the input end led to the clock optical signal input terminal, and the first optical branch circuit a first optical inverter whose input end is guided to one output end of the optical branch circuit, and the other output end of the first optical branch circuit and one output end of the second optical branch circuit. a first optical AND circuit whose input end is guided to the output end of the first optical inverter, and a second optical AND circuit whose input end is guided to the output end of the first optical inverter and the other output end of the second optical branch circuit; optical AND circuit,
a second optical inverter element whose input end is guided to the output end of the second optical AND circuit; the output end of the first optical AND circuit and the output end of the second optical inverter element are connected to the input end; , and an optical bistable element whose output end is guided to the optical signal output terminal.

FIG. 1 is a diagram showing an embodiment of the present invention.

According to FIG. 1, the embodiment of the present invention includes an optical waveguide 101 into which a data optical signal is incident on one end face 100, and an optical branching circuit 102 whose input end is in contact with the other end face of the optical waveguide 101.
an optical waveguide 104 into which a clock optical signal is incident on one end face 103; an optical branching circuit 105 whose input end is in contact with the other end face of the optical waveguide 104; and one end face at one output end of the optical branching circuit 102. an optical waveguide 106 whose input end is in contact with the other end face of the optical waveguide 106 , an optical waveguide 108 whose one end face is in contact with the other output end of the optical branch circuit 102 , and one of the optical branch circuits 105 . An optical AND circuit 110 whose input end is in contact with the other end of the optical waveguide 109 and the other end of the optical waveguide 108 and an output end of the optical inverter 107, and one end of which is in contact with the output end of the optical inverter 107. optical waveguide 11 that is in contact with
1, an optical waveguide 112 whose one end surface is in contact with the other output end of the optical branch circuit 105, and an optical AND circuit 113 whose input end is in contact with the other end surface of the optical waveguide 111 and the other end surface of the optical waveguide 112, An optical waveguide 114 has one end surface in contact with the output end of the Yamaguchi path 113, an optical inverter 115 has an input end in contact with the other end surface of the optical waveguide 114, and an optical guide has one end surface in contact with the output end of the optical AND circuit 110. an optical bistable element 118 whose input end is in contact with the other end of the optical waveguide 116 and the other end of the optical waveguide 117; It includes an optical waveguide 120 whose one end surface is in contact with the output end of the stable element 118 and which guides the output light of the optical bistable element 118 to the other end surface 119 .

FIG. 2 is a diagram showing a time chart for explaining in detail the present invention shown in FIG. 1.

In FIG. 2, an optical signal waveform 200 represents a data optical signal incident on the end surface 100, and an optical signal waveform 202 represents the data optical signal incident on the end surface 100.
3, the optical signal waveform 201 is the output optical signal of the optical inverter 107, and the original signal waveform 203 is
is the output optical signal of the optical AND circuit 110, and the optical signal waveform 20
4 is the output optical signal of the optical AND circuit 113, optical signal waveform 2
05 indicates the output optical signal of the optical inverter 115, and an optical signal waveform 206 indicates the output light of the optical bistable element 118.

According to FIG. 2, in the embodiment of the present invention shown in FIG. H level Pt by the circuit 102
, after being divided into two optical signals having a light intensity of L level 0, they are transmitted through optical waveguides 108 and 106, respectively, to an optical AN.
It is guided to the input end of the D circuit 110 and the input end of the optical inverter 107. On the other hand, a clock optical signal 202 having an H level of 2Pl and an L level of 0 is applied to the input end 103, and this clock optical signal 202 is applied to the optical branch circuit 10.
5 has a light amount of H level P1 and L level 0.
After being divided into two optical signals, they are guided to the input end of optical AND circuit 110 and the input end of optical AND circuit 1120 through optical waveguides 109 and 112, respectively. The optical signal applied to the optical inverter 107 in this manner is converted by the optical inverter 107 into an optical signal 201 whose output light amount is O and Pi) when the incident light amount is Pl and O, respectively.

At the output ends of the optical AND circuits 110 and 113, when the H logic level light amount of the optical signal applied to the input end is Pl, and the L logic level light amount is O, the H logic level light amount is Pl and the L logic level light amount is 0. AND light signals 203 and 20
4 is obtained. Output optical signal 204 of optical AND circuit 113
Further, the optical inverter 115 generates an optical signal 205 in which the output light amount is 0 and Pb when the incident light amount is Pl and 0, respectively.
After being converted into an optical bistable element 118, it is added to the input end of the optical bistable element 118. The optical bistable element 118 has a limited light amount P when bias light of a light amount pb is applied by the optical inverter 115.
An optical signal having one of the values Os P 1 is emitted. When the optical bistable element 118 maintains the output signal light quantity PO, when the light quantity of the output optical signal 203 of the optical n... circuit 10 reaches Pl, the output light quantity of the optical bistable element 118 becomes Pl. The bias light amount Pb is controlled by the inverter 115.
The limited amount of emitted light P1 to which P1 is added is held. On the other hand, when the output optical signal 205 of the optical inverter 115 and the light amount become 0 while the optical bistable element 118 maintains the output light amount P1, the output light of the optical bistable element 118 changes to the light amount PQ, and thereafter the optical inverter 115 biases the light amount. As long as Pb is added, the output light amount po is maintained. In this way, the output end of the optical bistable element 118 receives the data optical signal 2.
An output optical signal 206 in which 00 is latched by the clock optical signal 202 is obtained.

The optical bistable element 118 exhibits a bistable characteristic as shown in FIG. 3, in which the output light amount pout with respect to the incident light amount Pin. That is, when the incident light amount Pin is increased from 0, the output light amount Pou1 increases rapidly at Pa,
Conversely, when Pin is decreased from Pt, the output light amount po
ut exhibits a hysteresis characteristic that rapidly decreases in PC, and has two stable points of output light amount Pout=Po and Pl when bias light of light amount Pb is applied to the input end.

FIG. 4+al l (bl is a diagram showing an example of an optical bistable element that can be used in the present invention.

Figure 4 (al is an optical bistable element using a directional coupling type optical switch, and by feeding back a part of the output light of the optical switch to the applied voltage of the optical switch, the human emitted light as shown in Figure 3 is generated. characteristics can be obtained.

In FIG. 4(a), 10 is a directional coupling type optical switch;
11 is a semi-transparent mirror, 12 is a photodetector, and 13 is a voltage amplifier. Details of the operating principle can be found in the literature I'REE Journal Opquantum Electronics, Volume 14 of QLla.
llUm EIecfrolics, VOI, QJ
-14) Described on pages 577 to 580. Fig. 4 (bl indicates a bistable semiconductor laser. By providing a saturable absorption portion, for example, a portion into which no current is injected, in the - section of the semiconductor laser cavity, bistable characteristics can be imparted to the injected current vs. optical output characteristic. At this time, by appropriately selecting the injection current i, the human emission light characteristics shown in FIG.
ics Letter) Volume 17, page 741 and Showa 5
Proceedings of the 7th National Conference of the Optical and Radio Division of the Institute of Electronics and Communication Engineers (
Part 2) No. 272 states this.

FIG. 5 shows optical inverters 107 and 1 in this embodiment.
15 is shown as an example. According to FIG. 5, the optical inverters 107 and 115 shown in FIG. It is composed of a semiconductor laser 501 into which coherent input light 505 is incident in a direction that crosses light 504 . When the input light 505 is not incident, the population inversion inside the semiconductor laser 501 is uniform, and the semiconductor laser 501 emits the output light 504 in the direction where the stimulated emission due to the resonance of the Fabry-Perot cavity is maximum. When coherent input light 505 enters the plane of the junction in a direction that crosses output light 504 and the intensity Pin of this input light 505 is greater than the intensity Pout of output light 504, photons due to population inversion within semiconductor laser 501 The stimulated emission is stronger in the direction of the input light 505 than in the direction of the output light 504.

As a result, the population inversion that contributes to the emission of light in the direction of the output light 504 is reduced, and the emission of the output light 5040 is stopped.

FIG. 6 is a diagram showing the relationship between Pin and Pout in FIG. 5 for explaining the operation of the optical inverter. 6th
In the figure, when Pin is 00, pb is output, and when a light value Ph greater than the threshold light amount Pth is input (10), Pout becomes 0. Therefore, the state where Pin is the light amount Ph is the input logic level "H"s, and the state where the Pin is the light amount Ph is the input logic level @L", Pout
is the light amount Pb, output logic level "H", Pou
An inverter in which the input logic level and the output logic level are inverted is realized by associating the state in which t falls at a light amount of 0 with the output logic level "'L".

Regarding the phenomenon of oscillation stop due to the injection light of the semiconductor laser in Fig. 5, please refer to the document Soviet Physics Semiconductors (5ovHe Cao Physics-8emH
Volume 3, No. 3, September 1969, 3
It is explained in detail on page 14.

FIG. 7 shows optical AND circuits 110 and 1 in this embodiment.
This shows an example of No. 13. In Figure 7, optical AND
The circuits 110 and 113 are realized by a semiconductor laser 701 having a saturable absorption part in the resonator, the output light 702 output from the active layer is the output, and the input light 703, 704 injected into the active layer from the outside. and 705 are inputs. By setting the operating point of a semiconductor having a saturable absorber (11) in the resonator, the total light amount Pi, which is the sum of the light amounts of input light 703, 704, and 705, can be calculated by setting the operating point.
A differential gain characteristic can be obtained in the characteristic between n and the light amount Pout of the output light. The details of the semiconductor laser having such differential gain characteristics are described in the document Technical Research Report of the Institute of Electronics and Communication Engineers, page 7 of ED81-10.

FIG. 8 is a diagram for explaining the operation of a semiconductor laser having differential gain characteristics used in the optical AND circuits 110 and 113, and the input light 703, 704 in FIG.
．． 705 light! LPin3. Total light t by adding Pin4+Pin5 Pin; Pin3+Pin4+Pi
It shows the relationship between n5 and the amount of output light Pou↑.

That is, when the total light tPin of the input light is increased from 0, the light intensity Pout of the output light rapidly increases from almost 0 to the value of pout=P1 at Pin=Pt and 11, and then the total light intensity of the input light is increased to Pin=Pt. , h, the light amount Pout of the output light takes a constant value of approximately pout=P1, and exhibits a differential gain characteristic around P+h. At this time, the light amount of input light 703.704.705 is Pin3+
Pin4+(12) When Pin5 is input logic level 1L'', Pin3==1'
1n3L+Pin4=Pin4L+ PEn4=Pin
4N, and when the input logic level is "H", Pin3=Pi
Assuming that n3Hp PEn4=Pin4N(, and when the output logic level of the output light 702 is "L", the light of the output light,
11 Po u l = Q, and the output logic level w H
In #, the output light is set to light amount Pout, =P1. light AND
niP(n31+ Pin3H+ Pin4L+ Pin
Set 4Hs Pin5LtPin5H. By doing so, all input logic levels 703, 704, 705 are Pi'n3H+ of input logic level II H11+.
Only when PIn4H+ Pin5H, total light amount of input light Pin= Pin3+ Pin4+ Pin5>P
+h, the amount of output light at this time is Pout=P1, and the output logic level is H'', realizing the operation of an AND logic circuit.

As described above, it is an object of the present invention to provide an optical D latch circuit that can store a data optical signal as a binary output light amount using a clock optical signal.

In the embodiment of the present invention shown in FIG. 1, the output ends of the optical waveguides 10B and 109 are the input ends of the optical AND circuit 110, and the output ends of the optical waveguides 111 and 112 are the input ends of the optical AND circuit 110.
The input end of the D circuit 113 and the optical waveguides 116 and 117
Although the example is shown in which the output ends of the optical bistable element 118 are in direct contact with the input ends of the optical bistable element 118, by using three optical paths, the output lights of the optical waveguides 108 and 109, and the output lights of the optical waveguides 111 and j112 are output light, optical waveguides 116 and 11
After combining the output lights of 7, an optical AND circuit 110
, 113 and the incident end of the optical bistable element 118, a similar effect can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a time chart for explaining the operation of the embodiment of FIG. 1,
3 is a diagram showing the characteristics of the optical bistable device 11B shown in FIG. 1, FIG. 4 is a diagram showing a specific example of the optical bistable device 118 shown in FIG. 1, and FIG. 5 is the diagram shown in FIG. 1. FIG. 6 is a diagram showing the characteristics of the optical inverters 107 and 115 (14) shown in FIG. FIG. 8 is a diagram showing the characteristics of the optical AND circuits 110 and 113 shown in FIG. 1. In the figure, 102 and 105 are optical branch circuits, 107
and 115 are optical inverters, 110 and 113 are optical AND circuits, and 11B is an optical bistable element, respectively. (15) Figure 2 231- Figure 3 Pi? L 4th figure 1-1 O (α2 (b) 5th paper 5 figure 1'l:?L

Claims (1)

[Claims] a first optical branch circuit whose input end is guided to a data optical signal input terminal; a second optical branch circuit whose input end is guided to a data optical signal input terminal; and the first optical branch circuit. A first optical inverter having an input end led to one output end of the circuit, the other output end of the first optical branch circuit, and an input end led to one output end of the second optical branch circuit. and a second optical AND circuit whose input end is guided to the output end of the first optical inverter and the other output end of the second optical branch circuit. and the second light A
The output end of the Yamaguchi path and the output end of the second optical inverter element are in contact with the input end of the second optical inverter whose input end is guided to the output end of the ND circuit and the first light, and the output end of the second optical inverter element contacts the input end. It is composed of an optical bistable element whose output end is guided to the output terminal.