JPS5920334U - microcomputer - Google Patents

microcomputer

Info

Publication number
JPS5920334U
JPS5920334U JP11465782U JP11465782U JPS5920334U JP S5920334 U JPS5920334 U JP S5920334U JP 11465782 U JP11465782 U JP 11465782U JP 11465782 U JP11465782 U JP 11465782U JP S5920334 U JPS5920334 U JP S5920334U
Authority
JP
Japan
Prior art keywords
microcomputer
determining
input
port
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11465782U
Other languages
Japanese (ja)
Inventor
高井　昶
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP11465782U priority Critical patent/JPS5920334U/en
Publication of JPS5920334U publication Critical patent/JPS5920334U/en
Pending legal-status Critical Current

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  • Microcomputers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はマイクロコンピュータの出力ポートの制御ブロ
ック図を示す。第２図は本考案の一実施例を示す。第３
図は端子接続の一例を示す。 なお第１図に於て、ＰＭ・・・・・・プログラムメモリ
、　　□ＩＤ・・・・・・インストラクションデコーダ
、ＢＬ・・・・・・パスライン、ＰＤＯ〜ＰＤｌ・・・
・・・アドレスデコーダ、ＰＯ〜Ｐ１・・・・・・ポー
ト。FIG. 1 shows a control block diagram of the output port of the microcomputer. FIG. 2 shows an embodiment of the present invention. Third
The figure shows an example of terminal connection. In Fig. 1, PM...Program memory, □ID...Instruction decoder, BL...Pass line, PDO~PDl...
...Address decoder, PO~P1...port.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プログラムメモリと入出力部が同一チップ上にあるマイ
クロコンピュータに於て、前記メモリ内容を決定する手
段と同一手段で、入出力ポートのアドレスが決定される
ポートアドレスデコーダを有する事を特徴とするマイク
ロコンピュータ。A microcomputer in which a program memory and an input/output section are on the same chip, the microcomputer having a port address decoder for determining the address of an input/output port by the same means as the means for determining the memory contents. Computer.
JP11465782U 1982-07-28 1982-07-28 microcomputer Pending JPS5920334U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11465782U JPS5920334U (en) 1982-07-28 1982-07-28 microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11465782U JPS5920334U (en) 1982-07-28 1982-07-28 microcomputer

Publications (1)

Publication Number Publication Date
JPS5920334U true JPS5920334U (en) 1984-02-07

Family

ID=30264958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11465782U Pending JPS5920334U (en) 1982-07-28 1982-07-28 microcomputer

Country Status (1)

Country Link
JP (1) JPS5920334U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57100758A (en) * 1980-12-16 1982-06-23 Nec Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57100758A (en) * 1980-12-16 1982-06-23 Nec Corp Semiconductor device

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