JPS59201126A - Common bus control system - Google Patents

Abstract

PURPOSE:To avoid the breakdown of a system and to improve the reliability by closing a corresponding gate circuit when a monitor circuit detects a fault and cutting off a faulty peripheral device from a common bus. CONSTITUTION:A computer 1 is connected to peripheral devices 4 (4a, 4b, 4c and 4d) and gate circuits 3 (3a, 3b, 3c and 3d) via a common bus 2. A monitor circuit which detects faults is included to the circuits 3a-3d respectively. Each monitor circuit consists of a parity monitor circuit 5 which monitors the data on the bus as well as the parity of addresses and an interruption signal line monitor circuit 6. When the circuit 5 detects a parity error or an interruption signal line is continuously active for a period longer than the prescribed value, it is decided that the bus or the peripheral device is fault. Then the gate is closed. Thus a normal function is secured for the bus 2, and a faulty peripheral device is cut off from the bus 2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a common bus control system for a computer system in which a computer and a large number of peripheral devices are connected via a common bus.

In conventional computer systems that directly control peripheral devices of this type, if a failure occurs in one peripheral device, the failure may extend to the common bus, and in such a case, the system will go down.

SUMMARY OF THE INVENTION An object of the present invention is to provide a common bus control method for a computer system that does not cause a system down even if a failure occurs in some of the peripheral devices.

In order to achieve the above object, the common bus control method according to the present invention includes a gate circuit inserted at each common bus connection point of peripheral devices connected to a common bus of a computer, and a monitoring circuit for detecting a failure of each peripheral device. The system is configured such that when the monitoring circuit detects a fault, it closes the corresponding gate circuit and disconnects the peripheral device in which the fault has occurred from the common bus.

According to the above configuration, the reliability of the entire system is improved, and the object of the present invention can be completely achieved.

Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 is a system block diagram showing an embodiment of the common bus control method according to the present invention.

1 is a computer, and 2 is a common bus. Peripheral device 4a
Gate circuits 3a to 3d are inserted at the connection points of the terminals 3a to 4d with the common bus 2.

Monitoring circuits for detecting faults are gate circuits 3a to 3d.
It is included in

Figure 2 is a circuit diagram showing details of the gate circuit 3. The monitoring circuit includes a parity monitoring circuit 5 that monitors the parity of data and addresses on the bus, and an interrupt signal line monitoring circuit 6 that monitors the interrupt signal line. When the parity monitoring circuit 5 detects a parity error, or when the interrupt signal line remains an active IC for more than a specified time, it is determined that the bus or peripheral device is abnormal and the gate 3 is closed. The above operations enable the bus 2 to operate normally 9, and the peripheral device in which the fault has occurred is disconnected.

As described in detail above, according to the present invention, by disconnecting only the peripheral device in which a failure has occurred from the system, it is possible to prevent the system from going down and improve its reliability.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the common bus control system according to the present invention, and FIG. 2 is a block diagram showing the configuration of a gate circuit. J... Computer that controls the system 2... Common bus 3.3a-3d... Gate circuits 4.4a-4
d...Peripheral equipment 5...Parity monitoring circuit 6...Interrupt signal line monitoring circuit Patent applicant NEC Corporation

Claims (1)

[Claims] A gate circuit is inserted into each common bus connection point of peripheral devices connected to the common bus of the computer, and a monitoring circuit is provided to detect a failure in each peripheral device, and when the monitoring circuit detects a failure, the corresponding gate is inserted. A common bus control method characterized by a configuration in which the circuit is closed and a peripheral device in which a failure occurs is disconnected from the common bus.