JPS59198511A - Pcm recording system - Google Patents

Pcm recording system

Info

Publication number
JPS59198511A
JPS59198511A JP7432483A JP7432483A JPS59198511A JP S59198511 A JPS59198511 A JP S59198511A JP 7432483 A JP7432483 A JP 7432483A JP 7432483 A JP7432483 A JP 7432483A JP S59198511 A JPS59198511 A JP S59198511A
Authority
JP
Japan
Prior art keywords
data
track
recorded
recording
crcc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7432483A
Other languages
Japanese (ja)
Inventor
Mitsuhisa Nohara
光久 野原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP7432483A priority Critical patent/JPS59198511A/en
Publication of JPS59198511A publication Critical patent/JPS59198511A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1806Pulse code modulation systems for audio signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE:To attain ease of code error by giving a time difference to a data recorded on each track and an offset to a distance and to attain effectively average value interpolation if the compensation is not possible. CONSTITUTION:After an input signal is converted into a digital signal by an A/ D converter 1 at first, its output is fed to an operating device 2 for data to form a CRCC data and an operating device 3 for compensation track adding a transmitted data at each bit, dividing the result by four and forming the data. Signals are recorded on a tape with minimized time loss by using a multiplex head where a sound recording head for each track is arranged with a tilt. The recorded order is as R1 L1 R2 L2 R3 L3 R4 L4 11, 12 and the data is re corded sequentially from the transmitted order. Further, if it is impossible for the code correction, the mean value interpolation is attained from the data before and after the corresponding data.

Description

【発明の詳細な説明】 本発明はPCMレコーダに関し、特に固定ヘット°、多
重トラックによる記録の際の誤シ補償手段を有するPC
Mレコーダに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM recorder, and more particularly to a PCM recorder having a means for compensating for errors during recording using a fixed head and multiple tracks.
Regarding M recorder.

カセットテープを用いるPCMレコーダは第1図に示す
工程でテープに記録される。先ずLチャンネル、Rチャ
ンネルの夫々の信号を時分割サンプリングし、これを合
成する。次にこの信号を順次A/D変換してデジタル化
された信号り、〜L4及びR1−R4は一担メモリーに
記憶され、演算器によって符号誤如補償がなされて夫々
のトラックに送られる。PCM信号は大量の情報を含ん
でおシ、これを順次テープに記録するには上記のように
1チヤンネルのデジタル化した信号を第2図に示すよう
に数トラツクに分割して(図では4トラツク)単位時間
当)の情報量を多くしてしる。ところが、この種のPC
Mレコーダでは記録媒体である磁気テープのホコリやキ
ズ、或いはレコーダの回転ムラなどによシ符号誤シ(主
にドロップアウト)が多い。そこでこれを検出、訂正す
るためにCRCC(Cyclic Redtlndan
cyCheck Code)と垂直パリティ−をデータ
に付加する方法がある。第4図はこの検出、訂正手段を
施した各トラックのデータを示し、まず垂直パリティ−
のは各ピッ)N0列の1fの総数がどの列も奇数または
偶数となるように垂直パリティ−のを付加する(図では
偶数共リテイー)。またCRCCは各トラツタの1つの
データの値を4で割った剰余数をCRCCのデータとし
ている。
In a PCM recorder using a cassette tape, recording is performed on the tape in the steps shown in FIG. First, the L channel and R channel signals are time-divisionally sampled and then combined. Next, this signal is sequentially A/D converted and the digitized signals, .about.L4 and R1-R4, are stored in a single memory, compensated for code errors by an arithmetic unit, and sent to respective tracks. The PCM signal contains a large amount of information, and in order to record it sequentially on tape, the digitized signal of one channel is divided into several tracks as shown in Figure 2 (in the figure, 4 tracks are used). Track) increases the amount of information per unit time). However, this type of PC
In M recorders, there are many code errors (mainly dropouts) due to dust or scratches on the magnetic tape, which is the recording medium, or uneven rotation of the recorder. Therefore, in order to detect and correct this, CRCC (Cyclic Redundan
There is a method of adding cyCheck Code) and vertical parity to the data. Figure 4 shows the data of each track subjected to this detection and correction means.
Vertical parity is added to each pixel so that the total number of 1f in the N0 column is either an odd number or an even number (in the figure, even numbers are equal). Further, CRCC uses the remainder obtained by dividing one data value of each tractor by 4 as CRCC data.

このようにデータに冗長度をもたせるときによシ、ある
ピットがドロップアウトした場合、CRCCと垂直パリ
ティから誤ま多部分を検出、訂正することができる。
When providing data with redundancy in this way, if a certain pit drops out, the erroneous part can be detected and corrected from the CRCC and vertical parity.

しかしながらドロップアウトが複数になるとCRCCと
垂直パリティのとからでは訂正ノ(ターンが複数個存在
することになシ、検算を行なっても、どれが正しいのか
判別できなくなるときがある。特に問題となるのは同一
ビット番号列において複数のドロップアウトが生じた場
合ト、数トラツクに渡シ多量のドロップアウトを連続し
て生じる場合であり、例えば第3図におu テ、L t
 トRtのトラックの各2ビツト目がドロップアウトし
た場合にはCRCCと垂直)くリテイCとからでは符号
誤9を検出することはできない。
However, when there are multiple dropouts, CRCC and vertical parity cannot be corrected (even if there are multiple turns, it may not be possible to determine which one is correct even if the calculation is performed. This is a particular problem). This is the case when multiple dropouts occur in the same bit number string, and the case where a large number of dropouts occur consecutively over several tracks. For example, as shown in Fig. 3,
If each second bit of the track Rt drops out, the code error 9 cannot be detected from the CRCC (perpendicular to the CRCC).

本発明は上記のような符号誤シの問題点を解消するため
に成されたものであ)、テープへのデータの記録方法を
工夫することにより、符号誤シ補償を容易にするととも
に、もしそれが不可能な場合には平均値補間を有効的に
行なうに第4図は本発明による10トラツク、14ビツ
トデータに上記録方式の実施例を示しており1上方のト
ラックから下方に向ってR1,L。
The present invention has been made to solve the problem of code errors as described above.) By devising a method of recording data on tape, it is possible to easily compensate for code errors and If this is not possible, average value interpolation can be effectively performed. Figure 4 shows an embodiment of the upper recording method for 10 tracks and 14 bit data according to the present invention. R1,L.

5RssLs*Rz*L2eR4mL+tct、c2の
順に記録されているが、そのとき各トラックは時間的、
距離的なずれ?もたせているf、また各トラックは4ビ
ツトのCRCCを持っている。この実際に記録されるR
1〜L4の各データの長さは、トラック幅と比べて極め
て短かいので% R1〜L4までの1ブロツクが非常に
細長くなる。従って、単発的に生じる数ビットのドロッ
プアウトが、同じビット番号列に集中しないようにする
ために、第4図のように各データ間のずれを十分に広く
とシ、テープ走向に対して大きく傾斜させる必要がある
It is recorded in the order of 5RssLs*Rz*L2eR4mL+tct, c2, but at that time each track is temporally
Distance difference? Each track has a 4-bit CRCC. This actually recorded R
Since the length of each data item 1 to L4 is extremely short compared to the track width, one block from %R1 to L4 is extremely long and narrow. Therefore, in order to prevent dropouts of several bits that occur sporadically from concentrating on the same bit number string, it is necessary to make the gap between each data sufficiently wide as shown in Figure 4, and to It needs to be tilted.

尚、垂直パリティの、7C2は2ビツト2トラツク(各
ビット番号列の11)の総数の4の剰余数を記録)、C
RCCを4ビツト (13か15の剰余数を記録)とし
ておく、また各チャンネルのデータをなるべく離した状
態で記録する。
In addition, 7C2 of the vertical parity records the remainder number of 4 of the total number of 2-bit 2-tracks (11 of each bit number string), C
Set the RCC to 4 bits (record the remainder of 13 or 15), and record the data of each channel as far apart as possible.

第5図は本発明による記録形式を得るための記録装置を
示し%まず入力信号をA/D変換器1によってデジタル
信号に変換した後、その出力をCRCCデータを作るた
めのデータ用演算器2と、送られてきたデータを各ピッ
トごとに加算して、その結果を4で割ル、データを作る
補償トラック用演算器3とに送出し、データ用演算器2
からCRCCを含むR1〜L4のデータか、また補償ト
ラック用演算器3からは垂直パリティの1.Cλが出力
され、各トラックの録音ヘッドが傾斜して配置された多
重ヘッドによシ極力時間ロスを少なくしてテープ上に記
録を行なっていく。記録される順はR1→L 1−gR
t−+L 2−pRs−>L 5−)R4→L 4→t
E t 、 C2であル、つま夛1ブロックのデータが
すべてそろってから演算、記録するのではなく、送られ
てきたデータから順次記録を行なっていく。
FIG. 5 shows a recording device for obtaining a recording format according to the present invention. First, an input signal is converted into a digital signal by an A/D converter 1, and then the output is converted to a data calculator 2 for creating CRCC data. Then, the sent data is added for each pit, the result is divided by 4, and sent to the compensation track calculation unit 3 that creates data, and then sent to the data calculation unit 2.
From R1 to L4 data including CRCC, and vertical parity 1. from compensation track computing unit 3. C.lambda. is output, and recording is performed on the tape with the recording head of each track being arranged at an angle to minimize time loss. The recording order is R1→L 1-gR
t-+L 2-pRs->L 5-) R4→L 4→t
In E t and C2, calculations and recording are not performed after all data of one block have been collected, but recording is performed sequentially from the data sent.

尚、上記の実施例では各データの配置は斜めに一列に並
べていたが、第6図に示すようにlブロックを2列の傾
斜にして、1列にはR1゜Ll  # Rla Lts
 の、t1他の1列にはRs−Ls−R4y L 4−
 (I’zをそれぞれ記録して各チャンネルの近接デー
タをよル有効に分散させるようにしてもよい。
In the above embodiment, each piece of data was arranged diagonally in a row, but as shown in FIG.
In the other column t1, Rs-Ls-R4y L 4-
(I'z may be recorded respectively to more effectively distribute the proximity data of each channel.

本発明においてはデータをRs= Lle Rs−Ls
R,、L□R,、L、のように各チャンネルの近接デー
タを相互に離して記録してbるので、多量のドロップア
ウトを生じ、符号訂正が不可能になり念場合、各前後の
データより平均値補間全行なうことができる。例えば前
後のデータt Rl、R3とすればその平均値R2はR
t ”= (Rt+Rs)/2となシ、誤シを生じたデ
ータを前後のデータR1,R,の平均値R,に置き換え
ることができ、平均値補間が有効的に用いることができ
るため、誤り補償をこの平均値補間のみで行なっても、
大きな誤差雑音は生じない。従って、例えば第7図に示
すように一般のPCMカセットレコーダlOに符号補償
回路11と3次、5次子測補償回路(線形予測によるデ
ータ推定)l2とを付加してPCMカセットレコーダl
Oに平均値補間による誤りを補償するようにしたシステ
ムも実現できる。
In the present invention, the data is Rs=Lle Rs-Ls
Since adjacent data of each channel is recorded apart from each other like R,,L□R,,L,, a large amount of dropouts occur and code correction becomes impossible. Average value interpolation can be performed entirely from the data. For example, if the data before and after t Rl, R3, the average value R2 is R
t''= (Rt+Rs)/2, the data that caused the error can be replaced with the average value R of the previous and subsequent data R1, R, and average value interpolation can be used effectively. Even if error compensation is performed only by this average value interpolation,
No large error noise occurs. Therefore, for example, as shown in FIG. 7, a code compensation circuit 11 and a 3rd and 5th order interpolation compensation circuit (data estimation by linear prediction) 12 are added to a general PCM cassette recorder 10 to create a PCM cassette recorder 10.
It is also possible to realize a system in which errors due to average value interpolation are compensated for in O.

以上のとお多本発明によれば、任意の時間に同時にドロ
・ツブアウトが生じた場合でも、同一ビット番号列には
このドロップアウトが生じないために誤υ検出、訂正の
できる確率が大幅に高くなる。
As described above, according to the present invention, even if dropouts and dropouts occur at the same time at arbitrary times, this dropout does not occur in the same bit number string, so the probability of error υ detection and correction is greatly increased. Become.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般のPCM録音の概略を示す図。 第2図は従来の多重トラックによるPCM録音の記録状
態を示す図、第3図はPCM録音における垂直パリツテ
イとCRCCとを付加した場合の各データの実施例を示
す図、第4図は本発明によるP CM録音の記録状態の
実施例を示す図、v5図は本発明による記録−状態を得
るための記録袋D′の実施例を示す図、第6図は本発明
による記録状態の他の実施例を示す図、第7図は本発明
の適用例の構成を示す図である。 1・・・・・・A / D変換器 2・・・・・・データ用演斜、器 3・・・・・・補償トラック用演算器 特許出願人 パイオニア株式会社 ]、 手続補正書輸発) 昭和58年 特  許 願第74324号2、発明の名
称 PCM記録方式 3、補正をする者 事件との関係  特許出願人 住所 〒153  東京都目黒区目黒1丁目4番1号名
称(501)ノ\イオニア株式会社 4、補正の対象 明細書の「発明の詳細な説明」の欄 1、明細書の2ペ一ジ13行 「4図0.」を「3図3.」に補正します。 以上 71
FIG. 1 is a diagram showing an outline of general PCM recording. Fig. 2 is a diagram showing the recording state of conventional multi-track PCM recording, Fig. 3 is a diagram showing an example of each data when vertical parity and CRCC are added in PCM recording, and Fig. 4 is a diagram showing the present invention. FIG. 6 is a diagram showing an embodiment of the recording state of PCM recording according to the present invention. FIG. FIG. 7 is a diagram showing a configuration of an application example of the present invention. 1...A/D converter 2...Data compensator, device 3...Compensation track computing unit Patent applicant Pioneer Corporation] Procedural amendment export ) 1981 Patent Application No. 74324 2, Name of invention PCM recording method 3, Relationship with the case of the person making the amendment Patent applicant address 1-4-1 Meguro, Meguro-ku, Tokyo 153 Name (501) No. \Ionia Co., Ltd. 4. In column 1 of the "Detailed Description of the Invention" of the specification to be amended, page 2 of the specification, line 13, "4 Figure 0." will be amended to "3 Figure 3." Above 71

Claims (1)

【特許請求の範囲】[Claims] 複数のPCM信号を時間軸伸長して、複数トラックに記
録するPCM記録方式であって、前記各トラックに記録
されるデータに時間差及び距離にずれをもたせるように
したことを特徴とするPCM記録方式。
A PCM recording method that expands the time axis of a plurality of PCM signals and records them on a plurality of tracks, the PCM recording method being characterized in that the data recorded on each of the tracks has a time difference and a shift in distance. .
JP7432483A 1983-04-26 1983-04-26 Pcm recording system Pending JPS59198511A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7432483A JPS59198511A (en) 1983-04-26 1983-04-26 Pcm recording system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7432483A JPS59198511A (en) 1983-04-26 1983-04-26 Pcm recording system

Publications (1)

Publication Number Publication Date
JPS59198511A true JPS59198511A (en) 1984-11-10

Family

ID=13543814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7432483A Pending JPS59198511A (en) 1983-04-26 1983-04-26 Pcm recording system

Country Status (1)

Country Link
JP (1) JPS59198511A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61145768A (en) * 1984-12-18 1986-07-03 ヴイリ シユトウーダー アーゲー、フアブリツク フユア エレクトロニツシエ アパラツテ Method and apparatus for recording and reproducing coded digital signal
JPH0322226A (en) * 1989-06-19 1991-01-30 Canon Inc Optical system adjustor for optical recording and reproducing device
JPH0572466A (en) * 1991-09-18 1993-03-26 Mitsubishi Electric Corp Optical device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5845613A (en) * 1981-09-11 1983-03-16 Hitachi Ltd Pulse code modulation recorder
JPS5965906A (en) * 1982-10-08 1984-04-14 Hitachi Ltd Multi-channel recording and reproducing device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5845613A (en) * 1981-09-11 1983-03-16 Hitachi Ltd Pulse code modulation recorder
JPS5965906A (en) * 1982-10-08 1984-04-14 Hitachi Ltd Multi-channel recording and reproducing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61145768A (en) * 1984-12-18 1986-07-03 ヴイリ シユトウーダー アーゲー、フアブリツク フユア エレクトロニツシエ アパラツテ Method and apparatus for recording and reproducing coded digital signal
JPH0322226A (en) * 1989-06-19 1991-01-30 Canon Inc Optical system adjustor for optical recording and reproducing device
JPH0572466A (en) * 1991-09-18 1993-03-26 Mitsubishi Electric Corp Optical device

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