JPS5919455A - ビタビ復号器の最適パス判定回路 - Google Patents
ビタビ復号器の最適パス判定回路Info
- Publication number
- JPS5919455A JPS5919455A JP12845382A JP12845382A JPS5919455A JP S5919455 A JPS5919455 A JP S5919455A JP 12845382 A JP12845382 A JP 12845382A JP 12845382 A JP12845382 A JP 12845382A JP S5919455 A JPS5919455 A JP S5919455A
- Authority
- JP
- Japan
- Prior art keywords
- metric
- path
- circuit
- memory
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims description 8
- 235000015927 pasta Nutrition 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 11
- 230000014509 gene expression Effects 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 230000004044 response Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
Landscapes
- Error Detection And Correction (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12845382A JPS5919455A (ja) | 1982-07-23 | 1982-07-23 | ビタビ復号器の最適パス判定回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12845382A JPS5919455A (ja) | 1982-07-23 | 1982-07-23 | ビタビ復号器の最適パス判定回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5919455A true JPS5919455A (ja) | 1984-01-31 |
| JPS638652B2 JPS638652B2 (enExample) | 1988-02-24 |
Family
ID=14985081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12845382A Granted JPS5919455A (ja) | 1982-07-23 | 1982-07-23 | ビタビ復号器の最適パス判定回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5919455A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987006081A1 (fr) * | 1986-04-03 | 1987-10-08 | Kabushiki Kaisha Toshiba | Procede de commande d'une memoire de parcours dans un decodeur de viterbi |
| WO1994000915A1 (fr) * | 1992-06-22 | 1994-01-06 | Oki Electric Industry Co., Ltd. | Compteur d'erreurs sur les bits et son mode operatoire, et dispositif d'identification de signaux et son mode operatoire |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5542440A (en) * | 1978-09-20 | 1980-03-25 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Decoding device for convolutional code |
-
1982
- 1982-07-23 JP JP12845382A patent/JPS5919455A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5542440A (en) * | 1978-09-20 | 1980-03-25 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Decoding device for convolutional code |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987006081A1 (fr) * | 1986-04-03 | 1987-10-08 | Kabushiki Kaisha Toshiba | Procede de commande d'une memoire de parcours dans un decodeur de viterbi |
| US4905317A (en) * | 1986-04-03 | 1990-02-27 | Kabushiki Kaisha Toshiba | Path memory control method in Viterbi decoder |
| WO1994000915A1 (fr) * | 1992-06-22 | 1994-01-06 | Oki Electric Industry Co., Ltd. | Compteur d'erreurs sur les bits et son mode operatoire, et dispositif d'identification de signaux et son mode operatoire |
| US5581577A (en) * | 1992-06-22 | 1996-12-03 | Oki Electric Industry Co., Ltd. | Device for and method of counting bit errors and device for and method of identifying signals |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS638652B2 (enExample) | 1988-02-24 |
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