JPS59188929A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To make a semiconductor integrated circuit device to be provided with the necessary test function simply and moreover only by allotting small area by a method wherein function testing signal generating parts are formed of photoelectric converting elements provided toegether with the inside circuit of the IC device. CONSTITUTION:Photoelectric converting elements PS are provided together with the inside circuit 12 of an IC device 10 to be connected to electric source terminals Vcc, Vbb through resistors R to construct test signal generating parts T. A signal is sent from a node between the element PS and the resistor R to make the holding condition of a circuit F/F consisting of CMOS transistors of two groups to be set forcibly to any one side. Such test signal generating parts T are provided at the respective parts of the inside circuit 12, testing points T1,...Tn of a large number are arranged, a beam of light L is irradiated to an arbitrary point Tx monitoring by making probes 24 to come in contact with terminal pads 14, and a test of function can be executed. At this construction, the necessary test function can be provided simply and moreover only by allotting small area without depending upon terminal pads having large occupying area and a complicated time-division system.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor integrated circuit device, particularly one having a test function.

[Background technology]

In general, as a semiconductor integrated circuit device becomes more highly integrated, larger in scale, or more complex, the need for functional testing of the internal circuit becomes stronger. For example, large-scale logic LSIs require a function to test all or major functions of their internal logic. Further, when the internal circuit includes a holding circuit such as a flip 70 tube, a function for forcibly setting or resetting the holding circuit to perform a test is often required.

For this reason, in conventional semiconductor integrated circuit devices of this type,
In addition to the normal functional terminals, some had terminals specifically for testing. but.

Providing additional terminals for testing purposes in addition to normal functional terminals increases the area occupied by the terminal pads, which significantly impedes the efficient construction of semiconductor integrated circuit devices. Moreover, the need for test functions increases as semiconductor integrated circuit devices become larger or more complex, and such large-scale or highly complex semiconductor integrated circuit devices require a large number of functional terminals. In many cases. In this case, there is almost no room to provide additional test terminals in addition to the functional terminals, and as a result, the higher the need for the test function, the more difficult it becomes to provide the test function.

Although it is conceivable to share the test function terminal with the normal function terminal in a time-sharing manner, this method has the drawback that the time-sharing management becomes complicated and troublesome.

[Purpose of the invention]

This invention was made against the above background.
The objective is to provide the necessary test functions by simply allocating a small area, without requiring test terminal pads that occupy a large area or complicated time sharing. An object of the present invention is to provide a semiconductor integrated circuit device.

The above and other objects and novel features of the present invention will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in a region where an internal circuit of a semiconductor integrated circuit device is formed, a photoelectric conversion element that is sensitive to light applied from the outside is formed together with the internal circuit.

Furthermore, the photoelectric conversion element constitutes a test signal generation section for performing a functional test of the internal circuit. The objective is to be able to provide the necessary test functions simply by allocating area.

〔Example〕

Hereinafter, typical embodiments of the present invention will be described with reference to the drawings.

In one drawing, parts that are the same or correspond to each other are indicated by the same reference numerals.

FIG. 1, FIG. 2, and FIG. 3 show an embodiment of a semiconductor integrated circuit device according to the present invention.

First, in FIG. 1 and FIG. 3, a semiconductor integrated circuit device 10 according to this embodiment has a relatively large-scale logic circuit including a holding circuit F/F such as a FRISOB FROMB formed as an internal circuit 12.

This internal circuit 12 is also connected to a terminal pad 14 for external connection via an input/output buffer 16. This terminal pad 14 constitutes a functional terminal for operating the internal circuit 12 in normal actual use, and does not have a function as a test terminal.

As shown in FIG. 2, in the region where the internal circuit 12 is formed, a photoelectric conversion element PS that is sensitive to light applied from the outside is formed. This photoelectric conversion element PS is
For example, it can be easily constructed by forming a PN junction on the semiconductor substrate of the semiconductor integrated circuit device 100. This photoelectric conversion element PS is connected to Vc through a resistor R, for example.
c, by connecting to Vbb, the photoelectric conversion element P
A circuit that generates a logic signal according to the photosensitive state of S is constructed. This circuit is designed to function as a test signal generating section T. That is, the signal generated from the test signal generating section T is used as a test signal for performing a functional test on the internal circuit 120, as shown in FIG. 1 or FIG.

The signal is applied to each part of the internal circuit 12.

For example, in the part shown in FIG. 2, two sets of C-MOS transistors Ql are connected from the connection point of the photoelectric conversion element PS and the resistor R.
A test signal is applied to forcibly set (or set) the holding state of the holding circuit F/F consisting of -Q2, Q3 and Q4 to either one.

Further, the test signal generating section T is formed close to each circuit section to be tested which receives the test signal generated therefrom. Further, the test signal generating section T does not necessarily have to be independent or configured, but may be configured in a state where it is incorporated in a circuit section under test that receives the injection of the test signal from the test signal generating section T. .

Specifically, a part of the circuit under test is connected to the photoelectric conversion element p.
It may be composed of s.

By providing the test signal generating section T as described above in each section of the internal circuit 12 of the semiconductor integrated circuit device 10, the semiconductor integrated circuit device 10 has a large number of test points Tl as shown in FIG.

T2. T3...Tn are arranged for each test signal generating section T.

Therefore, as shown in FIG. 4, for example, a laser oscillator 2
0 and the optical deflector 22 at the above test point) Tl~
Using a device that selectively irradiates the light beam L targeting Tn, the terminal pad 14 of the semiconductor integrated circuit device 10 is
While monitoring the temperature by applying the terminal glove 24 to the
By irradiating the light beam L to the test points Tx, the entire internal circuit 12 can be tested by applying test signals necessary for functional testing to each test point (Tl to Tn) without using terminal pads for testing. Or you can test the functionality of the main parts.

Here, the photoelectric conversion element PS, which is the main part of the test signal generating section T, can be formed with a small area, and the photoelectric conversion element PS can be provided close to the circuit under test, or as a part of it. By incorporating the test signal into the circuit, it is possible to not only eliminate the need for a terminal pad for externally applying a test signal, but also almost eliminate the need for wiring for transmitting the test signal. As a result, even in a semiconductor integrated circuit device having a large-scale or complicated internal circuit for which there is no margin in the terminal band, the area size of the semiconductor substrate can be avoided.

Alternatively, the necessary test functions can be easily provided without the need for troublesome and complicated time sharing. During actual use, for example, by being housed in a package, there is no need to worry about the effects of external light.

〔effect〕

As described above, in the semiconductor integrated circuit device according to the present invention, necessary test functions can be achieved by simply allocating a small area, without using test terminal pads that occupy a large area or using troublesome and complicated time division. You can prepare.

Although the invention made by the present inventor has been specifically explained above based on examples, it goes without saying that this invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Nor. For example, the test signal generating sections T using the photoelectric conversion elements PS may be provided in a dispersed manner, but they may also be arranged in a concentrated manner in a vacant portion of the semiconductor substrate.

[Application field]

The above explanation will mainly focus on the invention made by the present inventor, which is the field of application in which it is applied, which is the dog-scale logic LSI.
Although explained, it is not limited to
For example, it can be applied to memory LSI.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a semiconductor integrated circuit device according to the present invention. FIG. 82 is a circuit diagram showing a part of FIG. 1. FIG. 3 is a diagram showing the semiconductor integrated circuit device as seen from the surface. FIG. 4 is a side view showing an example of a state in which a semiconductor integrated circuit device according to an embodiment of the present invention is subjected to a functional test. 10...Semiconductor integrated circuit device, 12...Internal circuit, 1
4...Terminal pad, 14...I/O vanofa, 20...
・Laser oscillator, 22... Optical deflector, 24... Terminal probe, F/F... Holding circuit (circuit under test)
, T...test signal generation section, PS...photoelectric conversion element, R/resistance, Tl~Tn, Tx...test point,
L...Light beam. Figure 1 Figure 3

Claims (1)

[Claims] 1. In a region where an internal circuit of a semiconductor integrated circuit device is formed, a photoelectric conversion element that is sensitive to light activity applied from the outside is formed along with the internal circuit, and further, a photoelectric conversion element that is sensitive to light activity applied from the outside is formed. A semiconductor integrated circuit device comprising a test signal generating section for performing a functional test of the internal circuit. 2. The device according to claim 1, characterized in that the test signal generating section is formed close to each circuit section to be tested that receives the injection of the test signal generated therefrom. Semiconductor integrated circuit device. 3. In the apparatus according to claim 1 or 2, the test signal generating section is configured to be incorporated in a part of the circuit under test that receives the test signal generated therefrom. Features of semiconductor integrated circuit devices.