JPS5918758Y2 - External circuit connection device for multifunctional integrated circuits - Google Patents

External circuit connection device for multifunctional integrated circuits

Info

Publication number
JPS5918758Y2
JPS5918758Y2 JP7783275U JP7783275U JPS5918758Y2 JP S5918758 Y2 JPS5918758 Y2 JP S5918758Y2 JP 7783275 U JP7783275 U JP 7783275U JP 7783275 U JP7783275 U JP 7783275U JP S5918758 Y2 JPS5918758 Y2 JP S5918758Y2
Authority
JP
Japan
Prior art keywords
circuit
detection circuit
detection
integrated circuit
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7783275U
Other languages
Japanese (ja)
Other versions
JPS51156714U (en
Inventor
武雄 酒井
卓雄 毛利
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP7783275U priority Critical patent/JPS5918758Y2/en
Publication of JPS51156714U publication Critical patent/JPS51156714U/ja
Application granted granted Critical
Publication of JPS5918758Y2 publication Critical patent/JPS5918758Y2/en
Expired legal-status Critical Current

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  • Circuits Of Receivers In General (AREA)
  • Superheterodyne Receivers (AREA)

Description

【考案の詳細な説明】 現在、それぞれ独立に作られた部品を使用して構成して
いた回路を高度に集積化することにより、回路全体ある
いは複数の機能部分を単一の集積回路に置き換えること
が行われている。
[Detailed explanation of the invention] By highly integrating circuits that are currently constructed using independently manufactured parts, it is possible to replace the entire circuit or multiple functional parts with a single integrated circuit. is being carried out.

したがって、その回路に内蔵される機能が増せば増すほ
どその集積回路は単一化することが可能となる。
Therefore, the more functions built into the circuit, the more the integrated circuit can be unified.

しかしこのような多機能で、しかも高い集積度を有する
回路においてはチューナの集積回路があり、完成度が高
い反面その自由度が低下する欠点がある。
However, among such multi-functional and highly integrated circuits, there is a tuner integrated circuit, which has a high degree of completeness but has the disadvantage that its degree of freedom is reduced.

すなわち、その集積回路に内蔵された中間周波増幅回路
や検波回路等の機能のある一部分が目標とする仕様を満
足しない場合にはたとえ他の部分の仕様が満足し得たと
しても、その集積回路全体の採用は断念せざるを得なか
った。
In other words, if a certain part of the integrated circuit, such as an intermediate frequency amplification circuit or a detection circuit, does not meet the target specifications, the integrated circuit We had no choice but to abandon the entire recruitment process.

特に検波回路でのS/N比や歪率の特性劣化は、FMチ
ューナでは致命的であり、かかる事態が生じたときは他
の集積回路に採用するか、或は主信号系と制御系とを各
々独立に構成する手段が講じられていた。
In particular, characteristic deterioration of the S/N ratio and distortion rate in the detection circuit is fatal for FM tuners, and when such a situation occurs, it is necessary to adopt it in another integrated circuit, or to change the main signal system and control system. Measures were taken to configure each independently.

この考案は、このようなチューナ集積回路においてチュ
ーナの性能を決定する検波回路が目標とする仕様を満足
できない場合に、その部分の動作を外部回路で代行させ
、その集積回路の使用を可能にしようとするもので、以
下図によってこの考案の一実施例について説明する。
This idea is to enable the use of such an integrated circuit by having an external circuit take over the operation of that part when the detection circuit that determines the performance of the tuner cannot meet the target specifications in such a tuner integrated circuit. An embodiment of this invention will be described below with reference to the drawings.

すなわちこの実施例ではFMチューナの中間周波増幅回
路、検波回路、信号制御回路および指示回路を集積化し
たものを示している。
That is, this embodiment shows an FM tuner in which an intermediate frequency amplification circuit, a detection circuit, a signal control circuit, and an instruction circuit are integrated.

第1図において1,2は中間周波数増幅回路、3は検波
回路、4は信号レベル検出回路、5はミューティング回
路、6は同調指示回路である。
In FIG. 1, 1 and 2 are intermediate frequency amplifier circuits, 3 is a detection circuit, 4 is a signal level detection circuit, 5 is a muting circuit, and 6 is a tuning instruction circuit.

この集積回路において今、検波回路3のS/N比あるい
は歪率が目標を満足しないとする。
Assume that in this integrated circuit, the S/N ratio or distortion rate of the detection circuit 3 does not satisfy the target.

すなわち、この検波回路以外の回路の仕様は満足できる
場合には、第2図に示すように検波回路3の入力側より
信号を取り出し、これをS/N比あるいは歪率の満足し
うる別個に構成した外部検波回路7の入力として主信号
たとえばオーディオ信号として使用し、−古巣積回路化
された上記検波回路3は、たとえばミューティングある
いは同調指示回路のとくに高いS/N比や歪率を要求さ
れない回路部分の制御信号に使用する。
That is, if the specifications of the circuits other than this detection circuit are satisfied, as shown in Fig. 2, the signal is taken out from the input side of the detection circuit 3, and it is separated into a signal with a satisfactory S/N ratio or distortion factor. The main signal, for example, an audio signal, is used as an input to the configured external detection circuit 7, and the detection circuit 3, which is configured as an old product circuit, requires a particularly high S/N ratio and distortion rate, for example, as a muting or tuning instruction circuit. Used for control signals for circuit parts that are not used.

第3図は第1図および第2図に示すブロック図を具体化
したもので、第1図および第2図の各部に相当するもの
は同一の符号をもって示している。
FIG. 3 is a concrete example of the block diagram shown in FIGS. 1 and 2, and parts corresponding to those in FIGS. 1 and 2 are designated by the same reference numerals.

なお、図中一点鎖線で囲んだ部分は集積化されている。In addition, the part surrounded by the dashed-dotted line in the figure is integrated.

この図において31は検波回路3の一部をなすものであ
る。
In this figure, numeral 31 constitutes a part of the detection circuit 3.

そしてLlは集積回路Aの端子8および9間に接続した
インダクタンスコイルで、これは可能な限り、集積回路
A内へ収容したいものであるが、その形状からして止む
を得ずその外部に設けられる。
Ll is an inductance coil connected between terminals 8 and 9 of integrated circuit A. Although it is desirable to accommodate this within integrated circuit A as much as possible, due to its shape, it is unavoidable to install it outside of it. It will be done.

また端子9と10間にはインダクタンスコイルL2とコ
ンデンサC2の並列回路が接続されている。
Further, a parallel circuit of an inductance coil L2 and a capacitor C2 is connected between terminals 9 and 10.

さらに端子10および7間にはセンターメータM1が接
続され、かつこのメータの一端はコイルL2とC2との
並列回路の一端に接続されている。
Furthermore, a center meter M1 is connected between terminals 10 and 7, and one end of this meter is connected to one end of a parallel circuit of coils L2 and C2.

Rはセンターメータの保護抵抗である。R is the protection resistance of the center meter.

7は外部検波回路で、これはコンデンサC1を介してコ
イルL1の一端(集積回路Aの端子8)に接続されてい
る。
7 is an external detection circuit, which is connected to one end of the coil L1 (terminal 8 of the integrated circuit A) via a capacitor C1.

すなわち、中間周波増幅回路1.2から検波回路3へ供
給される信号の一部が端子8に重畳されているので、こ
の信号を外部検波回路8の入力とすることにより、この
検波回路から主信号出力を取り出すものである。
That is, since a part of the signal supplied from the intermediate frequency amplification circuit 1.2 to the detection circuit 3 is superimposed on the terminal 8, by inputting this signal to the external detection circuit 8, the main signal is output from this detection circuit. This is to extract the signal output.

この考案は上述のようにチューナ集積回路において目標
とする仕様が満足できない検波回路の機能をその外部に
接続した同一機能のがつまり良好な仕様を有する回路で
代行させているので、その集積回路を有効に利用するこ
とができる。
As mentioned above, this idea replaces the function of the detection circuit in the tuner integrated circuit that does not meet the target specifications with an externally connected circuit that has the same function but has good specifications. It can be used effectively.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示すブロック図、第2図
は要部のブロック図、第3図は具体例を示す回路図であ
る。
FIG. 1 is a block diagram showing an embodiment of this invention, FIG. 2 is a block diagram of the main part, and FIG. 3 is a circuit diagram showing a specific example.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくとも中間周波増幅回路、検波回路及びミューティ
ング回路、同調指示回路を構成する集積回路の中間周波
増幅回路出力端子より外部検波回路を接続し、集積回路
内の検波回路の特性が満足されないときには前記外部検
波回路より主信号の検波出力を得るとともに、集積回路
内の検波回路による信号を前記ミューティング回路や同
調指示回路の制御信号に利用するようにしたことを特徴
とするチューナ集積回路の外部回路接続装置。
An external detection circuit is connected to the intermediate frequency amplifier circuit output terminal of the integrated circuit constituting at least the intermediate frequency amplifier circuit, the detection circuit, the muting circuit, and the tuning instruction circuit, and when the characteristics of the detection circuit in the integrated circuit are not satisfied, the external detection circuit is connected. External circuit connection of a tuner integrated circuit, characterized in that a detection output of a main signal is obtained from a detection circuit, and a signal from the detection circuit in the integrated circuit is used as a control signal for the muting circuit or tuning instruction circuit. Device.
JP7783275U 1975-06-09 1975-06-09 External circuit connection device for multifunctional integrated circuits Expired JPS5918758Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7783275U JPS5918758Y2 (en) 1975-06-09 1975-06-09 External circuit connection device for multifunctional integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7783275U JPS5918758Y2 (en) 1975-06-09 1975-06-09 External circuit connection device for multifunctional integrated circuits

Publications (2)

Publication Number Publication Date
JPS51156714U JPS51156714U (en) 1976-12-14
JPS5918758Y2 true JPS5918758Y2 (en) 1984-05-30

Family

ID=28554126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7783275U Expired JPS5918758Y2 (en) 1975-06-09 1975-06-09 External circuit connection device for multifunctional integrated circuits

Country Status (1)

Country Link
JP (1) JPS5918758Y2 (en)

Also Published As

Publication number Publication date
JPS51156714U (en) 1976-12-14

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