JPS5918647A - Manufacturing device of semiconductor device - Google Patents

Manufacturing device of semiconductor device

Info

Publication number
JPS5918647A
JPS5918647A JP57127925A JP12792582A JPS5918647A JP S5918647 A JPS5918647 A JP S5918647A JP 57127925 A JP57127925 A JP 57127925A JP 12792582 A JP12792582 A JP 12792582A JP S5918647 A JPS5918647 A JP S5918647A
Authority
JP
Japan
Prior art keywords
lead
leads
outer lead
junction board
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57127925A
Other languages
Japanese (ja)
Other versions
JPS6364900B2 (en
Inventor
Tsutomu Taoka
勉 田岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57127925A priority Critical patent/JPS5918647A/en
Publication of JPS5918647A publication Critical patent/JPS5918647A/en
Publication of JPS6364900B2 publication Critical patent/JPS6364900B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79—Apparatus for Tape Automated Bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain a highly reliable and economical semiconductor device through improvement of the internal and external leads alignment accuracy by providing the functions to move the junction board and confirm the position. CONSTITUTION:A film carrier 1a which carries the film supplied from a reel 10 is positioned at the cutting part 11 by a hole 19 and pin 9' and is formed on the board 30. After providing an element surface 8 and a stepped part, an internal lead 1 is cut. It is then carried on the junction board with an arm 12 and is vacuumed. The junction board is capable of moving forward and backward, right and left, up and down and in the rotating direction. The end of internal lead 1 stops at the position where is higher than external lead 14 supplied from the reel 13 by about 20-100mum and the positions of leads 1 and 14 can be confirmed. After a tool 22 of junction mechanism 15 is moved by a pulse motor, the junction board moves downward. When the leads 1 and 14 are placed in contact, the junction board stops. Next, the tool 22 moves downward the leads are heated and pressured and joined. Continuously, the junction board 20 moves downward, the mechanism 23 sends the external lead 14, and the lead is then cut and accommodated 19. With such structure, a highly reliable apparatus for fine working can be manufacturd economically.

Description

【発明の詳細な説明】 本発明は、いわゆるフィルムキャリア方式による半導体
装置の製造装置において、インナリードボンディングの
後の工程から７ウターリードボンデイングまでを行う装
置（以下アウターリードポンダという）ＶＣ関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a VC device (hereinafter referred to as an outer lead bonder) that performs steps after inner lead bonding to seventh outer lead bonding in a so-called film carrier method semiconductor device manufacturing apparatus. be.

フィルムキャリア方式による半導体装１？１°、の製造
方法の概略は次のようである。すなわら、半導体素子電
極に対応したリードな工、チングにより形成し、この形
成され几インナーリードにＡ　ｕ　、　ｆｆｎメ、キ’
を施し、インナーリードボンディング全島圧着等の方法
で行い、しかる後フィルムキャリアからインナーリード
を切断分離し、さらに場合によってはリードの成形を行
った後、アウターリード（ベースリボンその他のパブケ
ージ）にアウターリードボンディングを行い、半導体装
１メヲ製造する。The outline of the method for manufacturing a semiconductor device 1° to 1° using the film carrier method is as follows. That is, the lead is formed by machining or cutting a lead corresponding to the semiconductor element electrode, and A u , ffn , key is attached to the formed inner lead.
After that, the inner lead is cut and separated from the film carrier, and in some cases, after the lead is formed, the outer lead is bonded to the outer lead (base ribbon or other pub cage). Bonding is performed and one size semiconductor device is manufactured.

従来のアウターリードポンダは第１図に示すような構造
をしている。台６の下部に案内された、半導体素子２を
ボンディングしたインナーリード１を、ステージ５と台
６の接触部をカッターとして用い、半導体素子２及びリ
ード１をフィルムキャリア１ａから切断分離し、ステー
ジ５がそのままアクタ−リード３の位置まで上昇し、イ
ンナーリードをアウターリードに抑えつけた状態でボン
ディングツール４が下降し、アウターリードボンディン
グを行っていた。このような装置では、インナーリード
とアウターリードの位置合せは、あらかじめ設定された
位置で決められ、位置ずれを起こしやすく、また精度を
得ることも難しかつたりまた、インナーリードの切断も
リード切れを起こしやすく、また切れたリードがステー
ジ５上に残夛、次のアウターリードボンディングに不良
を起こしやすかった。また、ボンディングツール４がア
ウターリード３を介してインナーリードｌ！／ｃ接触し
ているので、ボンディングツール４の熱がアウタリード
３へ拡散するために熱効率が下がり、ボンディング不良
を起こしやすいという欠点を有していた。A conventional outer lead ponder has a structure as shown in FIG. The inner lead 1 guided to the lower part of the stage 6 and bonded with the semiconductor element 2 is cut and separated from the film carrier 1a by using the contact portion between the stage 5 and the stage 6 as a cutter, and then the semiconductor element 2 and the lead 1 are cut and separated from the film carrier 1a. rose to the position of the actor lead 3, and with the inner lead pressed against the outer lead, the bonding tool 4 descended to perform outer lead bonding. In such devices, the alignment of the inner lead and outer lead is determined at a preset position, which makes it easy for misalignment to occur, and it is difficult to achieve accuracy. This was easy to cause, and the broken leads were likely to remain on stage 5, causing defects in the next outer lead bonding. Also, the bonding tool 4 connects the inner lead l! via the outer lead 3! /c contact, the heat of the bonding tool 4 diffuses to the outer lead 3, resulting in lower thermal efficiency and a disadvantage in that bonding failures are more likely to occur.

本発明の目的は、上記の欠点をなくシ、正確で安定した
アウターリードボンディングかできる手本発明の製造装
置は、インナーリードにボンティングされた半導体素子
をフィルムキャリアから切断分離する機構と、ＰＭ紀切
断分離されたインナーリード付きの半導体素子をアウタ
ーリードボンディング用ステージに運搬載置する機構と
一アウターリードと前記アクタ−リードボンディング用
ステージに載置された半導体素子のインナーリードとの
位置合せを行うための前記アウターリードボンディング
用ステージを前後左右、上下および回転方向に移動させ
る移動機構と、前記インナーリードとアウターリードと
をボンディングする機構とを備えた構成を有する。An object of the present invention is to eliminate the above-mentioned drawbacks and to provide accurate and stable outer lead bonding. A mechanism for transporting and placing a semiconductor element with an inner lead which has been cut and separated on an outer lead bonding stage; and (1) Aligning the outer lead with the inner lead of the semiconductor element placed on the actor lead bonding stage. The present invention has a configuration including a moving mechanism for moving the outer lead bonding stage in front and back, left and right, up and down, and rotational directions, and a mechanism for bonding the inner lead and the outer lead.

つぎＶｃＸ発明ｔｌ−実施例により説明する０第２図は
本発明の一笑施例の側面図である。図において、１ａは
フィルムキャリアで、このフィルムキャリアＶｉ第３図
の平面図に示すように、送り出しおよび位置決めのため
のスズロケット穴９を両側に有し、半導体素子２の電極
にボンディングされ次インナーリードｌがフィルムの長
さに沿りて規則的に配置されている。このようなインナ
ーリードにボンディングされた半導体素子２を有するフ
ィルムキャリア１ａは、第２図のリール１０に巻かれて
おって切断１１１４１１１に供給される。成型切断部１
１Ｖｃおいては、第４図の断面図に示すように、スゲロ
ケ、゛ト穴９と、これに挿入するビン９′によシ位置決
めされ、成形台３０に合せてリード成型が行なわれる。Next, the VcX invention will be explained by way of an embodiment. FIG. 2 is a side view of an embodiment of the present invention. In the figure, reference numeral 1a denotes a film carrier, which has tin rocket holes 9 on both sides for feeding and positioning, as shown in the plan view of FIG. Leads l are regularly arranged along the length of the film. A film carrier 1a having a semiconductor element 2 bonded to such an inner lead is wound on a reel 10 shown in FIG. 2 and is supplied to a cutting machine 1114111. Molded cutting part 1
At 1Vc, as shown in the sectional view of FIG. 4, the lead is molded in accordance with the molding table 30 by positioning it by the slotting hole 9 and the bottle 9' inserted therein.

この成型は、半導体素子面８と平行に、かつ、フィルム
キャリア面７と半導体素子面８と約５０〜２００μｍ段
差がつくように成型される・この成型後、半導体素子２
Ｖｃボンデイングされているインナーリード１はフィル
ムキャリア１ａから、ｍ５図の斜視図で示すように、切
断分離される。つぎに、第２図における１８０°。This molding is carried out parallel to the semiconductor element surface 8 and so that there is a step difference of about 50 to 200 μm between the film carrier surface 7 and the semiconductor element surface 8. After this molding, the semiconductor element 2
The Vc-bonded inner lead 1 is cut and separated from the film carrier 1a as shown in the perspective view of Figure M5. Next, 180° in Figure 2.

回転するアーム１２によりて、その先端の吸着部１８に
切断分離されたインナーリード付きの半導体素子は吸着
され、アーム１２の１８００の回転により牛導累子の底
面を下に第６図の斜視図で示すように、ステージ部１７
のステージ２０上に移動載置され、真空吸着によって固
定される。その状態はさらに第７図の断面図によって詳
しく示されており、第７図において、ステージ２０は、
前後、左右、上下１回転方向に移動が可能で、その範囲
は前後左右で１ｉｆｔ！２〜５朋程度、高さは１０朋程
度、回転角は±３０程度あれば十分である。半導体素子
２′ｆｔ載置したステージ２０は、インナーリード１の
端部が、第２図のアウターリードリール１３からくり出
されているアウターリード１４よジも２０〜１００μｍ
ａＫ高くなる位置で停止し、第２図で示す認識装＃１６
によって、インナーリード１とアウターリード１４の位
置を求め、ボンディング構体１５のボンディングツール
２２の圧着すル位置へステージ２０ｆｔパルスモータに
よって移動させる。勿論、位置合せ全目視、手動で行っ
てもかまわない。さらにこの状態で、アウタリードエ４
とインナーリードｌとが接触するまでステージ２０は下
降し、停止する。ステージ２０には、真空吸着用孔２１
があり、半導体素子２が吸着固定されており、ステージ
２０は、インナーリード１とアクタ−リード１４が接触
した状態で停止している。By the rotating arm 12, the cut and separated semiconductor element with inner leads is attracted to the suction part 18 at the tip thereof, and by rotating the arm 12 by 1800 degrees, the bottom surface of the conductor is turned downward as shown in the perspective view of FIG. As shown in the stage part 17
It is moved and placed on the stage 20 of , and is fixed by vacuum suction. This state is further illustrated in detail by the cross-sectional view in FIG. 7, in which the stage 20 is
It can move forward and backward, left and right, up and down once, and the range is 1ft in all directions! It is sufficient if the height is about 2 to 5 mm, the height is about 10 mm, and the rotation angle is about ±30 mm. The stage 20 on which the semiconductor element 2'ft is mounted has a width of 20 to 100 μm such that the ends of the inner leads 1 are extended from the outer leads 14 which are protruded from the outer lead reel 13 shown in FIG.
Stop at the position where aK is high, and move the recognition device #16 shown in Figure 2.
The positions of the inner lead 1 and the outer lead 14 are determined by the following steps, and the stage is moved to the position where the bonding tool 22 of the bonding structure 15 is crimped by the 20ft pulse motor. Of course, the positioning may be performed completely visually or manually. Furthermore, in this state, outer door 4
The stage 20 descends until it comes into contact with the inner lead L and stops. The stage 20 has holes 21 for vacuum suction.
The semiconductor element 2 is fixed by suction, and the stage 20 is stopped with the inner lead 1 and the actor lead 14 in contact with each other.

次にボンディングツール２２が下降して、アウターリー
ドボンディングを行う。この時の温度は４５０°０１秒
間程度で数気圧のｆ、Ｅカを加える〇この後ステージは
下降し、第２図で示す送９磯打り２３によりてアウター
リード１４け送られ、カッター２４で任意の長さに切断
した後収納部１９へ入れられる。Next, the bonding tool 22 descends to perform outer lead bonding. At this time, the temperature is about 450 degrees. Several atmospheres of f and E are applied for 1 second. After this, the stage is lowered, and the outer lead is fed 14 times by the feed 9 iso-uchi 23 shown in Fig. 2, and the cutter 24 After cutting it to a desired length, it is placed in the storage section 19.

このように、本発明によれば、インナーリードとアウタ
ーリードの位置合せか、ステージの移動及び位置昭認の
機構を有するために正確になｐ。As described above, according to the present invention, since the positioning of the inner lead and the outer lead is provided, or the stage movement and position confirmation mechanism is provided, accurate positioning can be achieved.

半導体装置の微細加工化に対応でき、また、インナーリ
ード、アウターリードがボンディング不良を引き起こす
ような外カケ加えることなく、位置合せ、アウターリー
ドボンディングを行うことが可能になる。したがりて、
よりィぽ軸性、経済性の高い半導体装置を製造すること
ができる。It is possible to respond to the miniaturization of semiconductor devices, and to perform alignment and outer lead bonding without adding external chips to the inner leads and outer leads that would cause bonding defects. Therefore,
It is possible to manufacture a semiconductor device with more flexibility and economic efficiency.

なお、本発明は、Ｔ、ＡＢ方式で３層方式、２Ｊｕ方式
、−ｔ＊方式、バンプ付き方式ならば利用することがで
きる。It should be noted that the present invention can be used in T, AB, three-layer, 2Ju, -t*, and bumped systems.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のアウターリードボンダの断面図、第２図
は本発明の一実施例の概略全示す側面図、第３図は本発
明の実施例に係るフィルムキャリアの平面図、第４図は
リード成型部の断面図、第５図はフィルムキャリアから
半導体素子全切断した状態の斜視図、第６図は本発明の
実施例に係るステージ部の斜視図、第７図は不発明の実
施例に係るボンディング部の断面図である。 １・・・・・・インナー！ｊ−）’、ｌａ・・・・・・
フィルムキャリア、２・・・・・・半導体素子、３・・
・・・・アウターリード、１０・・・・・・フィルムキ
ャリアリール、１１・・・・・・インナーリード成型切
断機構部、１２・・・・・・移ｎＵ＋アーム、１３・・
・・・・アウターリードリール、１４・・・・・・アウ
ターリード、１５・・・・・・ボンティング構体、１６
・・・・・・認識機構、１７・・・・・・ステージ部、
１８・・・・・・アーム吸着部、１９・・・・・・アウ
ターリード収納部、２０・・・・・・ステージ、２１・
・・・・・真空吸着用孔、２２・・・・・・ボンディン
グツール、２３・・・・・・アウターリード送υ機構、
２４・・・・・・カッター。FIG. 1 is a sectional view of a conventional outer lead bonder, FIG. 2 is a schematic side view of an embodiment of the present invention, FIG. 3 is a plan view of a film carrier according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view of a conventional outer lead bonder. 5 is a sectional view of the lead molding section, FIG. 5 is a perspective view of the semiconductor element completely cut off from the film carrier, FIG. 6 is a perspective view of the stage section according to an embodiment of the present invention, and FIG. 7 is an embodiment of the invention. FIG. 3 is a cross-sectional view of a bonding part according to an example. 1... Inner! j-)', la...
Film carrier, 2... Semiconductor element, 3...
...Outer lead, 10...Film carrier reel, 11...Inner lead molding and cutting mechanism section, 12...Transfer nU+ arm, 13...
...Outer lead reel, 14...Outer lead, 15...Bonting structure, 16
...Recognition mechanism, 17... Stage section,
18... Arm adsorption section, 19... Outer lead storage section, 20... Stage, 21...
...Vacuum suction hole, 22...Bonding tool, 23...Outer lead feeding mechanism,
24...Cutter.

Claims (1)

【特許請求の範囲】[Claims] インナーリードにボンディングされた半導体素子をフィ
ルムキャリアから切断分離する機構と、前記切断分離さ
れたインナーリード付きの半導体素子をアウターリード
ボンディング用ステージに運搬載置する機構と、アウタ
ーリードと前記アウターリードポンティング用ステージ
に載置された半導体素子のインナーリードとの位僅合せ
を行うための前記アウターリードボンディング用ステー
ジ全前後左右、上下および回転方向に移動させる移動機
構と、前記インナーリードとアウターリードとをボンデ
ィングするボンディング機構とを備えたことを特徴とす
る半導体装置の製造装置。A mechanism for cutting and separating the semiconductor element bonded to the inner lead from the film carrier, a mechanism for transporting and placing the cut and separated semiconductor element with the inner lead on an outer lead bonding stage, and a mechanism for moving the outer lead and the outer lead pump. a moving mechanism for moving the entire outer lead bonding stage back and forth, left and right, up and down, and in rotational directions for aligning the inner leads of the semiconductor element placed on the bonding stage; A bonding mechanism for bonding a semiconductor device.
JP57127925A 1982-07-22 1982-07-22 Manufacturing device of semiconductor device Granted JPS5918647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57127925A JPS5918647A (en) 1982-07-22 1982-07-22 Manufacturing device of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57127925A JPS5918647A (en) 1982-07-22 1982-07-22 Manufacturing device of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5918647A true JPS5918647A (en) 1984-01-31
JPS6364900B2 JPS6364900B2 (en) 1988-12-14

Family

ID=14972020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57127925A Granted JPS5918647A (en) 1982-07-22 1982-07-22 Manufacturing device of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5918647A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62106339A (en) * 1985-11-05 1987-05-16 Toray Ind Inc Method for measuring light transmission loss of optical fiber with high accuracy

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62106339A (en) * 1985-11-05 1987-05-16 Toray Ind Inc Method for measuring light transmission loss of optical fiber with high accuracy
JPH0528776B2 (en) * 1985-11-05 1993-04-27 Toray Industries

Also Published As

Publication number Publication date
JPS6364900B2 (en) 1988-12-14

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