JPS59180562U - Waveform synthesis circuit - Google Patents
Waveform synthesis circuitInfo
- Publication number
- JPS59180562U JPS59180562U JP7517183U JP7517183U JPS59180562U JP S59180562 U JPS59180562 U JP S59180562U JP 7517183 U JP7517183 U JP 7517183U JP 7517183 U JP7517183 U JP 7517183U JP S59180562 U JPS59180562 U JP S59180562U
- Authority
- JP
- Japan
- Prior art keywords
- synthesis circuit
- waveform synthesis
- secondary winding
- transistor
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Details Of Television Scanning (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
ト 第１図〜第４図は従来の回路の説明のための図
、・ 第５図は従来の回路の接続図、第６図は本考案
の１ −例の接続図、第７図はその説明のための波形図
３ である。 ７
ミ １は水平パルスの入力端子、２はトランス、５
シ は垂直周期のパラボラ電圧の入力端子、９は出力
＝ 端子、１１はダイオード、１２はトランジスタ、
１４は負荷抵抗である。Figures 1 to 4 are explanatory diagrams of conventional circuits, Figure 5 is a connection diagram of a conventional circuit, Figure 6 is a connection diagram of the first example of the present invention, and Figure 7 is its connection diagram. FIG. 3 is a waveform diagram for explanation. 7 Mi 1 is horizontal pulse input terminal, 2 is transformer, 5
shi is an input terminal for vertical period parabolic voltage, 9 is an output terminal, 11 is a diode, 12 is a transistor,
14 is a load resistance.
Claims (1)
の２次巻線の一端がダイオード、トランジスタのコレク
タ・エミッタ、負荷抵抗の直列巨路を介して上記２次巻
線の他端に接続され、上部トランジスタのベースに低周
波の第２の信号が伊給され、上記負荷抵抗の両端間に上
記第１及び芽２の信号の合成波形が得られるようにした
波形合成回路。The high-frequency first signal is transferred to the secondary winding of the transformer, and one end of this secondary winding is connected to the other end of the secondary winding via a series path consisting of a diode, the collector-emitter of a transistor, and a load resistor. A waveform synthesis circuit is connected to the base of the upper transistor, and a low frequency second signal is supplied to the base of the upper transistor, so that a synthesized waveform of the first and second signals is obtained between both ends of the load resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7517183U JPS59180562U (en) | 1983-05-19 | 1983-05-19 | Waveform synthesis circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7517183U JPS59180562U (en) | 1983-05-19 | 1983-05-19 | Waveform synthesis circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59180562U true JPS59180562U (en) | 1984-12-03 |
Family
ID=30205245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7517183U Pending JPS59180562U (en) | 1983-05-19 | 1983-05-19 | Waveform synthesis circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59180562U (en) |
-
1983
- 1983-05-19 JP JP7517183U patent/JPS59180562U/en active Pending
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