JPS59180561U - Image distortion correction circuit - Google Patents

Image distortion correction circuit

Info

Publication number
JPS59180561U
JPS59180561U JP7517083U JP7517083U JPS59180561U JP S59180561 U JPS59180561 U JP S59180561U JP 7517083 U JP7517083 U JP 7517083U JP 7517083 U JP7517083 U JP 7517083U JP S59180561 U JPS59180561 U JP S59180561U
Authority
JP
Japan
Prior art keywords
image distortion
distortion correction
correction circuit
transistor
drives
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7517083U
Other languages
Japanese (ja)
Other versions
JPS6324699Y2 (en
Inventor
慎一郎 宮崎
山田 久文
塩見 隆之
住谷 宏之
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP7517083U priority Critical patent/JPS59180561U/en
Publication of JPS59180561U publication Critical patent/JPS59180561U/en
Application granted granted Critical
Publication of JPS6324699Y2 publication Critical patent/JPS6324699Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Video Image Reproduction Devices For Color Tv Systems (AREA)
  • Details Of Television Scanning (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1〜第3図は夫々高圧変動にわける画像歪の説明のた
めの図、第4図は従来の画像歪補正回路の例を示す接続
図、第5図はその説明のための図、第6図は本考案の原
理図、第7図は本考案の一実施例を示す接続図、第8図
は本考案の他の実施例を示す接続図である。 IR,IGpびIBは夫々ドライブ回路、4は受像管、
5は検出用抵抗、6は検出用トランジスタζ9は減算器
、11は積分器、12は差動増幅器、100は高圧回路
、200は水平出力回路で ”ある。
1 to 3 are diagrams for explaining image distortion caused by high voltage fluctuations, FIG. 4 is a connection diagram showing an example of a conventional image distortion correction circuit, and FIG. 5 is a diagram for explaining the same. 6 is a diagram showing the principle of the present invention, FIG. 7 is a connection diagram showing one embodiment of the invention, and FIG. 8 is a connection diagram showing another embodiment of the invention. IR, IGp and IB are drive circuits, 4 is a picture tube,
5 is a detection resistor, 6 is a detection transistor, ζ9 is a subtracter, 11 is an integrator, 12 is a differential amplifier, 100 is a high voltage circuit, and 200 is a horizontal output circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 受像管をドライブするトランジスタを流れる電流とこの
トランジスタを駆動する信号との差を検出する回路を有
し、この検出信号に基づいて高圧または水平偏向電流を
制御するようにした画像歪補正回路。
An image distortion correction circuit that includes a circuit that detects the difference between a current flowing through a transistor that drives a picture tube and a signal that drives this transistor, and controls a high voltage or horizontal deflection current based on this detection signal.
JP7517083U 1983-05-19 1983-05-19 Image distortion correction circuit Granted JPS59180561U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7517083U JPS59180561U (en) 1983-05-19 1983-05-19 Image distortion correction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7517083U JPS59180561U (en) 1983-05-19 1983-05-19 Image distortion correction circuit

Publications (2)

Publication Number Publication Date
JPS59180561U true JPS59180561U (en) 1984-12-03
JPS6324699Y2 JPS6324699Y2 (en) 1988-07-06

Family

ID=30205244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7517083U Granted JPS59180561U (en) 1983-05-19 1983-05-19 Image distortion correction circuit

Country Status (1)

Country Link
JP (1) JPS59180561U (en)

Also Published As

Publication number Publication date
JPS6324699Y2 (en) 1988-07-06

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