JPS59178795U - Process operating status display mechanism - Google Patents
Process operating status display mechanismInfo
- Publication number
- JPS59178795U JPS59178795U JP7026983U JP7026983U JPS59178795U JP S59178795 U JPS59178795 U JP S59178795U JP 7026983 U JP7026983 U JP 7026983U JP 7026983 U JP7026983 U JP 7026983U JP S59178795 U JPS59178795 U JP S59178795U
- Authority
- JP
- Japan
- Prior art keywords
- operating state
- display
- buffer memory
- display mechanism
- status display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Indicating Measured Values (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Testing Or Calibration Of Command Recording Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、この考案を適用したプロセスの動作状態表示
機構のブロック図である。
１・・・・・・処理装置、２・・・・・・バス２．３・
・・・・・補助記憶装置、３ａ・・・・・・第１の記憶
領域、３ｂ・・・・・・第２の記［領域、４− ６・・
・インターフェイス回路、５・・・キーボード、７・・
・ディスプレイ、７ａ・・・表示状態例、８１，８２．
８３・・・動作状態監視装置、９１、 ９２． ９３．
９９・・・機器具、９１ａ、９２ａ。
９３ａ、９９ａ・・・ケーブル、１０・・・プロセス、
１１゜１２．１３・・・ＤＭＡインターフェイス、１４
・・・演算処理装置、１５・・・メモリ。FIG. 1 is a block diagram of a process operation status display mechanism to which this invention is applied. 1... Processing device, 2... Bus 2.3.
...Auxiliary storage device, 3a...First storage area, 3b...Second storage area, 4-6...
・Interface circuit, 5...Keyboard, 7...
-Display, 7a...Example of display state, 81, 82.
83... Operating state monitoring device, 91, 92. 93.
99...Equipment, 91a, 92a. 93a, 99a...cable, 10...process,
11゜12.13...DMA interface, 14
...Arithmetic processing unit, 15...Memory.
Claims (1)
第２のバッファメモリとを備え、プロセスの各機器具か
らの動作状態を示す信号に応じて、これら各機器具に対
応する情報とその動作状態を示す情報とを動作状態情報
として前記第１のバッファメモリに記憶し、前記キーボ
ードから入力された前記プロセスの動作状態の表示要求
信号又は異常状態検出器からの信号に応じて、前記処理
装置は、前記第１のバッファメモリの前記動作状態情報
を前記第２のバッファメモリに転送し、前記第２のバッ
ファメモリに転送された動作状態情報に基づき、前記デ
ィスプレイに前記各機器具について、その動作状態を表
示することを特徴とするプロセスの動作状態表示機構。It is equipped with a display, a keyboard, a processing device, and first and second buffer memories, and in response to signals indicating the operating state from each device in the process, information corresponding to each device and its operating state is provided. The processing device stores information indicating the process as operating state information in the first buffer memory, and in response to a display request signal of the operating state of the process input from the keyboard or a signal from the abnormal state detector. , transfer the operating state information of the first buffer memory to the second buffer memory, and display the operation of each appliance on the display based on the operating state information transferred to the second buffer memory. A process operation status display mechanism characterized by displaying the status.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7026983U JPS59178795U (en) | 1983-05-11 | 1983-05-11 | Process operating status display mechanism |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7026983U JPS59178795U (en) | 1983-05-11 | 1983-05-11 | Process operating status display mechanism |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59178795U true JPS59178795U (en) | 1984-11-29 |
Family
ID=30200424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7026983U Pending JPS59178795U (en) | 1983-05-11 | 1983-05-11 | Process operating status display mechanism |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59178795U (en) |
-
1983
- 1983-05-11 JP JP7026983U patent/JPS59178795U/en active Pending
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