JPS5917712A - Base current correcting circuit - Google Patents

Abstract

PURPOSE:To suppress the input bias current without degrading characteristics, by flowing a current to an NPN transistor (TR) by the collector of a lateral PNP TR in a base current correcting circuit incorporated in an operational amplifier. CONSTITUTION:Collectors 24a and 24b of a multi-collector lateral PNP TR 24 which has the emitter connected to a constant current source 22 are connected to respective bases of the first and the second NPN TRs 21 and 23. When the first and the second NPN TRs 21 and 23 have the integrated circuit structure, respective grounded emitter current amplification factors are matched well, and therefore, a current I of the constant current source 22 which is set to the same value as the collector current I of the TR21 becomes the collector current of the second NPN TR 23 approximately if each of said current amplification factor is high sufficiently. Consequently, a current is not flowed to an input terminal T1.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a base current correction circuit used as an input section of an operational amplifier or a post-stage amplifier.

As is well known, the input impedance of an operational amplifier is a finite value, and therefore the input bias current is required to be as small as possible.

FIG. 1 shows the configuration of a conventional operational amplifier incorporating a base current correction circuit for reducing the input bias current.

In the figure, (1) and (2) are first and second ONPN transistors whose emitters are connected to each other;
(3) is an eighth NPN transistor whose base is connected to one of the pair of input terminals Ts, T1, and whose emitter is connected to the base of the first transistor (1). (4) is a fourth NPN transistor whose base is connected to the other input terminal TI, and whose emitter is connected to the base of the second transistor (2). (5), (61 is a pair of PNP transistors whose bases are connected to each other to form a mirror circuit), and one transistor (5) is configured as a diode with its base and collector short-circuited. There is.

(8) is a constant current source connected to the emitter of the first transistor (1). (9) is an NPN output transistor, and α0 is a resistor connected to the emitter of the output transistor (9).
) is connected in parallel to both ends of the power supply Qll, and the connection point between the resistor and the transistor (9) is connected to the output terminal T.

In this circuit, the emitter current of transistors (3i, (41) is
/hF E, input terminal TI, and input bias current of T are respectively transistor +3>, (4)
It becomes small as 1/hpg of each emitter current. but,
This conventional device has the drawback that the entator currents of the transistors (31, (4)) are small, resulting in poor overall frequency characteristics.

This invention was made in order to eliminate the drawbacks of the above-mentioned conventional transistors. It is an object of the present invention to provide a base current correction circuit that can suppress the input bias current without causing deterioration of frequency characteristics by connecting the base current correction circuit to the base current correction circuit.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows an example of a base current correction circuit according to the present invention.

In the same figure, (company) is the first NPN) transistor whose base is connected to the input terminal TI, and (branch) is the first NPN transistor.
) is a constant current source that generates a current I equal to the collector current I of the transistor Qυ; @ is a second ONPN) transistor whose collector is connected to the constant current source (2); (to) is a multi-divided collector type lateral PNP transistor, the emitter of which is connected to the connection point between the constant current source (support) and the collector of the second NPN transistor A. Above P
NP) first collector (24a) of transistor (2)
is the base of the first NPN transistor, and the second
collectors (24b) of the transistors are respectively connected to the bases of the second NPN transistors (24b).

In the above configuration, if the first and second NPN) transistors Qυ, ruts are made of an integrated circuit structure, their respective common emitter current amplification factors) IPII! The alignment is very good. Therefore, the explanation will be given assuming that the current amplification factors 11FR of both transistors (21) and n are the same.

If the collector current of the first NPN transistor (21) is defined as 1/hFF, its base current is 1/hFF. The current of the constant current source (sub) set to the same current value as the collector current of the transistor (211) is the current amplification factor of each current amplification factor of the first and second NPN). If hFE is large enough, the second O
NPN) becomes the collector current of the transistor (23).

Therefore, the base current of the second NPN) ging resistor example is equal to I/hFE, which is equal to the base current of one collector (2) of the multi-divided collector bichiral PNP transistor (2)
4b) becomes the collector current.

Each collector (2 circuits PNP) transistor example above
4m) and (24b) are equal, then the first N
The collector (24) of the above lateral PNP transistor (branch) connected to the base of the PN transistor
Since the collector current flowing through a) is also l/'Q FB, which is equal to the base current of the first NPN transistor (2), no current flows through the input terminal TI.

FIG. 8 shows an operational amplifier using the circuit of FIG. 2 as an input section.

In the same figure, 4 is the first NPN) transistor <21)
8th ONPN transistor whose collector is connected to the emitter of
A fourth transistor is a fifth NPN transistor whose emitter is connected to the first NPN transistor, and whose base is connected to the input terminal T. Lateral PNP) is connected to the first collector (24il) of the example transistor. The area ratio of the first collector (24itL (24as)) and the second collector (24b) in the lateral PNP transistor (to) is set to 1:8.

Also, the second ONPN transistor (2) and the eighth NPN)
The emitter area ratio of transistor four is set to 1:2.

(support), @ is a PNP ) transistor that constitutes a mirror circuit, ■ is an NPN output transistor, glue is a resistor, (Ω
is the power supply.

In the operational amplifier with the above configuration, since the emitter area ratio of the transistor r23°4 is 1=2, the collector current of the transistor (5) is 2I with respect to the collector current IK in the transistor, and the base current of the transistor (2) The sum of the base current of transistor (25) is 81/hpE
It becomes. On the other hand, -) chiral PNP transistor (
Since the area ratio of the first collector (24a1), (24a*) and the second collector (24b) of the support is 1:8,
The current flowing through the collectors (24ax) and (24ax) connected to the bases of the transistors is I/
hFR.

Under normal operating conditions of the operational amplifier, the input terminals T1 and T1
are set to the same potential, so the transistor (21)
, (77) are equal and the base current is l/h FB, which is equal to the collector current of the lateral PNP transistor (to), so the input terminals TI and Tl have inputs. No current flows.

FIG. 4 shows an example in which the present invention is applied to a downstream amplifier of a P-channel MO5 type transistor input operational amplifier.

In the same figure, (the second is the first NPN transistor,
is a constant current source, (43 is the second PNP) transistor, (
The emitter of this transistor (44) is connected to the constant current source (41), and the first collector (44a) is a multi-divided collector type lateral PNP transistor (44).
) is the base of the first NPN transistor υ, and the second collector (44b) is the base of the second ONPN transistor (43
are connected to the base of each.

(a is MO8 whose gate is connected to one input terminal T1
type transistor, the gate is the other input terminal T! (47) is the MO5 type transistor connected to
8 form)? This is a constant current source for the transistors (45) and (46).

t4al, (mark 4 is NPN that constitutes the mirror circuit
) transistor, ■ is 2-chiral PNP) transistor (44
), (51) is a constant current source connected to the base of the transistor (9), t41) is the first NPN transistor, and
It is connected to o.

(branch) is the power source.

In this circuit, the first stage bias current 11 is:

If you try to use MO8 type transistor (419, (&9) with a relatively small gate-source voltage,
Output current I! You can't let it flow too much.

In this circuit, NPN) transistors <481, (4
In order to also correct the base current of S, it is most suitable to set the current I flowing through the second NPN transistor (431) to I=1!-1.

As described above, this invention allows current to flow through the first and second NPN transistors by the collector of the multi-divided collector type 2-teal PNP resistor, so that the input bias can be maintained in a state with good frequency characteristics. A pace current correction circuit that can reduce current can be provided.

[Brief explanation of drawings]

FIG. 1 is an electric circuit diagram showing an operational amplifier incorporating a conventional base current correction circuit, FIG. 2 is an electric circuit diagram showing an example of a pace current correction circuit according to the present invention, and FIGS. 8 and 4 are respectively FIG. 3 is an electrical circuit diagram showing a specific different application example of the present invention. C21), (41)...first NPN) transistor, ■, (mouth...constant current source, (2), (43)...
・・2nd ONPN) Onejista, (Foundation), (441
...Multi-divided collector type lateral PNP) transistor, (24a) + (24as) + (24a), (44λ)...first collector, (24b), (
44b)...Second collector. Note that the same reference numerals in Figure 1 indicate the same or corresponding parts. Agent Makoto Kuzuno (1 other person) Figure 1 Figure 3 Figure 4

Claims (1)

[Claims] (1) a first NPN transistor to which an input signal is applied to its base; , 2nd ONPN
) a multi-divided collector type lateral PNP transistor having an emitter connected to the collector of the transistor; A base current correction circuit having a second collector connected to the base of a second NPN transistor.