JPS59172986A - Control system of rotary electric machine - Google Patents

Abstract

PURPOSE:To improve the speed controlling resolution without losing the stability of initial response of a speed control system by switching a pulse counting mode. CONSTITUTION:The amplitudes of the absolute value 1epsilonv1 of a speed deviation and a constant epsilonVO is compared by a comparator 7. If 1epsilonv1>=epsilonVO at the prescribed sampling time point, an addition value register 3 is cleared at the next sampling time point. If 1epsilonv1<epsilonVO, the sum of the latch 12 and the content of the register 3 is used for T/V conversion. Accordingly, a pulse counting mode is switched so that the pulse counting time is shortened in the range that the speed deviation is larger than the reference speed deviation and it is lengthened in the range that it is shorter than the latter.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a digital positioning control system for controlling a rotating electric machine, in which a feedback pulse is used for speed feedback detection and calculation in a speed control system, which is a minor loop of the digital positioning control system. This invention relates to a control method for rotating electric machines with an improved counting method.

[Prior art]

Generally, in a digital positioning control system, velocity feed bank information is obtained by counting pulse trains corresponding to position information for a certain period of time. The resolution of the digital velocity information in this case is determined by the number of pulses counted within the time period.

On the other hand, the requirements for accuracy in positioning control have become increasingly strict, and it has become essential to have a detector or detection method that can stably and accurately measure up to a low speed range. To date, attempts have been made to improve the hardware, such as increasing the clock pulse frequency and improving the electrical and mechanical accuracy of the detector itself. Various problems have arisen in terms of measurement technology.

In particular, the upper limit of the clock frequency is determined by the counting ability of the IC, and if an attempt is made to stabilize the digital control system by shortening the sampling time, the pulse counting time will also be shortened. Therefore, the resolution of speed calculation does not improve.

On the other hand, if the pulse counting time is lengthened in order to increase the resolution of speed calculation, the sampling time will be lengthened.

As described above, it is difficult with conventional methods to simultaneously satisfy the demand for shortening the sampling time in a digital control system and the demand for improving detection resolution.

In particular, in the conventional counting method in which pulse counting is performed for a substantially constant period of time regardless of the response status of the speed system, either the positioning accuracy or the positioning response speed is inevitably limited for this reason.

This will be explained in detail based on the drawings.

FIG. 1 is a block diagram showing the configuration of a digital positioning control system, which attempts to position an actuator (21) to be controlled using a position command Pr. In the figure, (22) is a speed detector, (23) is a position detector, (24) is a pulse counter, (25) is a positioning control system, (26) is a frequency divider, and (27) is a counter latch.

The positioning control system (25) includes a position deviation counter (28)
It is composed of a 5-cycle/speed converter (29) and a speed control system (30).

The speed detector (22) is of a position detection type and detects an average speed from positional displacement within a certain time.

Figures 2 and 3 show the speed detection principle when a resolver is used as a speed detector, and two excitation windings (31),
(32) are given AC signals cos2 rc f(+, 5in2 πfo) with a phase difference of 90 degrees, and the rotor (33) is υ(-dφ/dt) (
From the output winding (34) when rotating at a speed of
An output of EO5in2yr (fo + Δr (1) t is taken out. Here, if the number of poles of the resolver is P,
Δfo-1/P/120.

FIG. 3 shows a conventional pulse counting calculation method for speed detection. As shown in this figure, the clock pulse is counted for a period corresponding to the period T of the resolver output signal, that is, the period in which the gate of the counter latch (27) is opened, and the count value is transferred to the next period/speed converter (29). ), but since the excitation frequency fo of the resolver is usually sufficiently larger than the electrical angular velocity Δfo, the count is almost a constant time, especially in the low speed range for positioning, which is the object of the present invention. Note that the CPU interrupt signal in FIG. 1 is used as a sampling signal for the speed control system (30), and its period is n/f □.

In such a conventional counting method, the counter latch (27)
Since both the time interval and the counting time are T, the resolution of the velocity feedback is constrained by the clock pulse frequency.

[Purpose of the invention]

The purpose of the present invention is to solve the problems caused by the conventional pulse counting method, and to change the pulse counting mode according to the magnitude relationship between the speed deviation amount at each sampling point and its reference value. By switching, the control response characteristics are improved.

That is, when the speed command changes rapidly over time in a step-like manner, the actuator must follow the command beyond the resolution of speed and position detection, and the accuracy of speed feedback is not important at that point. Rather, the problem is global stability (initial transient response characteristics), which must be controlled to shorten the sampling time and immediately reduce the speed deviation. Therefore, in a range where a large speed deviation εV occurs, the conventional counting method in which the counter latch, CPU interrupt time, and pulse counting time are equal is used.

The response converges and the detector (
In areas where the resolution of the detection system (detection system) is a problem, the pulse counting time may be increased assuming that there are no significant speed fluctuations during pulse counting. Perform counting.

As a result, the resolution of speed detection is improved, the amplitude of the limit cycle is reduced, and the positioning characteristics are improved in terms of speed stabilization.

In the present invention, a counting method as shown in FIG. 4 is used instead of the conventional pulse counting method shown in FIG.

In this Figure 4, the counter latch time interval remains unchanged at T, but the counting time is N times T (N is an integer greater than or equal to 2).
becomes. This is applied from the point when the speed of the actuator (1) has sufficiently converged around the commanded speed, and since the argument time is N times greater, the accuracy of the speed feedback is equivalently N times greater, and therefore the resolution is N times higher. 1. Here, since the time interval of the counter latch remains unchanged, the stability of the response is not impaired.

〔Example〕

Such a pulse counting method is realized by the hardware configuration shown in FIG. This is a configuration to equivalently increase the counting time by N times (N is an integer of 2 or more), and the register group (2) consists of N-1 registers (1 of 2) to (2
N-1). In the figure (11 is an accumulator, (3) is a register for addition value, (4) is a period/speed converter, (5) is a position deviation counter, (6) is a speed deviation counter, (7) is a speed ufA difference absolute Value comparator, (8) is the drive circuit, (9) is the rotating electric machine, 00) is the speed detector, (
11) is a position detector, (12) is a counter latch, (1
3) is a pulse counter, and (14) is a speed control system.

The contents of register group (2) are transferred and shifted between registers at each sampling time. In the initial state, the contents of all registers are zero. Inside the control system (14), the speed deviation amount is constantly monitored by a counter (6) at each sampling point. Absolute value of the speed deviation 1εv 1
and a constant ενo (>0) determined by considering the response characteristics.
The comparator (7) examines the magnitude relationship between the two. If 1εV 1≧εvo at a certain sampling point, the addition value register (3) is cleared at the next sampling point. The sum of the contents of the addition value register (3) and accumulator Tl) is T/? for speed calculation. /Used for conversion.

Here, the sampling time determined by the counter latch (12) (or CPU interrupt signal) is T-T*
(k=o, 1, 2...). At the first sampling time T=To, the accumulator fl
) is used as is for T/zt conversion.

T=0-T before entering the next sampling point.

The pulse count value between is stored in register (1 of 2), and the sum of the contents of all registers (1 of 2) to (N-1 of 2) (in this case, the value of register (1 of 2)) is It is stored in the additional value register (3). (at T=T1) εv 1≧
If εvo, the value from T-To to T1 is Iεvl<
If it is εvo, the contents of the addition value register (3) are added to it and used for the T/υ conversion. The latter case corresponds to equivalently doubling the pulse counting time.

By the Nth sampling time T = TN-1, the register group (2) is filled with pulse counts from past sampling times, and the addition value register (3) is filled with T = 0 to T, -2. Contains the total pulse count value between. T
= TN-, if jεv 1≧εvo, the pulse count values between T = 'r, , -, , ~'r, -1 are used for T/zt conversion, and if 1εvl<εvo, T
= Values between O and T, -1 are used for T/l/conversion.

After the Nth sampling, the oldest count value is discarded due to the transfer shift in register group (2). Therefore, if 1εv 1≧εν0, the count value over a period with the same sampling time is used for the T/1/conversion, and if 1εv 1<εvO, the count value over a period N times the sampling time is used for T/1/conversion.

Here, since the timing of the counter latch and CPU interrupt is not changed, the sampling time of the speed feed bank remains unchanged, and the pulse time is equivalently multiplied by N. Therefore, after the response converges to some extent at Iεv 1<εvo, ,
A method as shown in FIG. 4 becomes possible.

With the above-mentioned hardware configuration, the velocity response is sufficiently converged, and the minimum resolution for velocity detection is improved to 1/N in areas where positioning accuracy is a problem.

In the embodiment described above, the pulse counting time is switched in two ways, but it is switched in various ways (three or more) depending on the response form.

Furthermore, a method of switching the pulse counting time by monitoring the elapsed time instead of the speed deviation may also be considered as an applied variation.

Figure 6 shows the switching of pulse counts and response improvement for N-2. The curve A is the step response according to the present invention, and the curve B is the step response according to the conventional method. When N = 2, on the premise that the variation in average speed is minute, it is equivalent to measuring the same average speed with a detector with twice the resolution, so the amplitude of the response after settling is at most 2 minutes. 1. When N=3, it becomes one-third. Generally, when N=H, it becomes 1/N. That is, reducing the amplitude not only improves the characteristics of the speed control system, but also improves the characteristics of the positioning control system because this amplitude is integrated over time and appears as position fluctuation in the positioning control system.

〔Effect of the invention〕

As described above, the pulse counting method of the present invention is a digital position control method that estimates and feeds the speed of a rotating electrical machine by counting pulse trains generated by a position detection type detector, and the pulse counting method is a digital position control method that estimates and feeds the speed of a rotating electric machine by counting pulse trains generated by a position detection type detector. The pulse counting is performed so that the pulse counting time is shortened in an area where the speed deviation is larger than the reference speed deviation, and the pulse counting time is lengthened in an area where the speed deviation is smaller than the reference speed deviation. Since the mode can be switched, speed control resolution can be increased without compromising the stability of the initial response of the speed control system, and the characteristics of high-precision positioning, where controllability near zero speed is a problem, can be improved. This has the effect of making it possible to

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the conventional control method, Figure 2 is an explanatory diagram showing the detection principle of a resolver as a position detector, Figure 3 is a waveform diagram showing the conventional pulse counting method, and Figure 4 is FIG. 5 is a waveform diagram showing the pulse counting method according to the present invention, FIG. 5 is a block diagram showing the configuration of the control system of the present invention, and FIG. 6 is a speed change curve showing the step response of the present invention and the conventional method. (1): Accumulator (2): Register group (3)
: Addition value register (4): Period/speed converter 1 (5): Position deviation counter (6): Speed deviation counter (7): Speed deviation absolute value comparator (81: Drive circuit (9); Actuator 0
0): Speed detector (11): Position detector (
12): Counter rasochi (13): Pulse counter (14): Speed control system patent applicant Yaskawa Electric Co., Ltd. Agent Masu Tehori (and 2 others) 3 2 Reverse''-ridge t 1r JP-A-59-172986 ( 6) 〉

Claims (1)

[Claims] 1. In a digital position control method that estimates and feeds the speed of a rotating electrical machine by counting the pulse trains generated by a position detection type detector, the speed deviation between the speed command and the actual speed is counted. , the pulse counting mode is switched so that the pulse counting time is shortened in an area where the speed deviation is larger than a reference speed deviation, and the pulse counting time is lengthened in an area where the speed deviation is smaller than the reference speed deviation. Control method for rotating electric machines.