JPH0119597Y2 - - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a speed and phase control circuit for a rotating body suitable for application to a servo circuit such as a drum motor or a capstan motor.

FIG. 1 shows a conventional example of a control circuit that digitally controls the rotational speed and rotational phase of a drum motor.

In the figure, 10 is a rotation speed control circuit, 20
indicates the rotation phase control circuit. drum motor 16
A speed signal (pulse signal shown in FIG. 2A) _PFG proportional to the rotational speed of the drum motor 16 is obtained from a frequency generator FG provided in connection with the drum motor 16. A rotational phase signal PPG related to the rotational phase of the drum motor 16 as shown in FIG. 2B is obtained from the phase signal generator _PG .

In this example, the frequency of the rotational speed signal PFG obtained by one rotation of _{the FG} is 180Hz, and
PG indicates the case where the rotation speed of the rotating drum is 30Hz.

In the rotational speed control circuit 10, the rotational speed signal
The clock pulse CK supplied to the AND gate 11 is gated at the P _FG , and this gated clock output is supplied to the counter 12 to calculate the clock pulses present within the width _Wv of 1/2 period of the rotational speed signal P _FG . The number is measured.

The output of the counter 12 is supplied to a PWM generator 13, and the pulse width of the clock pulse PWM-CK is PWM-modulated according to the output of the counter 12.
The PWM output is smoothed by a low-pass filter 14 and then sent to a motor drive circuit 15 to drive a drum motor 16.
is supplied as a rotation speed control signal (voltage).

The rotational speed signal _PFG has a pulse width depending on the rotational speed of the rotating drum, that is, the rotational speed of the drum motor 16.
Since W _v changes, the drum motor 1 is adjusted so that the number of clock pulses within the pulse width W _v becomes the specified number of pulses.
6, the rotational speed of the rotating drum can be kept constant.

Note that if the rotational speed of the drum motor 16 deviates significantly from the reference speed, the output of the counter 12 will overflow.

When overflowing, it is necessary to hold the PWM output just before overflowing to that value. For this purpose, the counter 12 is provided with an overflow detection circuit 17 and an overflow processing circuit 1 for holding the PWM output.
8 is provided.

The rotational phase control circuit 20 also controls the speed control circuit 10.
It is configured almost the same as . However, in this case, since the rotational speed signal _PFG as shown in FIG. 2A is not output, it is necessary to generate a pulse output proportional to the rotational phase.

For this purpose, a flip-flop circuit 25 is provided, which is supplied with a rotational phase signal P _PG (FIG. 2B) and a reference phase signal P _REF (FIG. 2C).
A window pulse P _W proportional to the rotational phase difference W _P is formed as shown in FIG. 2D. This window pulse _PW gates the clock pulse CK. The subsequent operation is performed by the rotational speed control circuit 1.
The rotational phase of the rotary drum is controlled to a desired phase by an operation similar to the control operation at 0.

Therefore, although detailed explanation thereof will be omitted, 22 is a counter, 23 is a PWM generation circuit, 24 is a low-pass filter, 27 is an overflow detection circuit,
28 is an overflow processing circuit. A control signal (voltage) proportional to the rotational phase difference outputted from the low-pass filter 24 is sent to an adder circuit 29.
At , it is combined into a control signal proportional to the rotational speed error and supplied to the motor drive circuit 15 .

With these control voltages, the drum motor 1
The rotational speed and rotational phase of No. 6 are each controlled to predetermined values.

As described above, in the conventional control circuit, the rotational speed control circuit 10 and the rotational phase control circuit 20 are respectively provided, but their configurations are almost the same. Moreover, the rotation speed signal P _FG is 180
The frequency is approximately Hz, which is several times the rotational speed of the rotating drum (six times in this example). Therefore, in this example, the rotational speed is detected 6 times during one rotation of the rotating drum.
The number of times the rotational phase is detected is 1.
It is times. Even if the rotational phase is detected only once during one rotation of the rotating drum, the phase control circuit 20 continues its operation during the remaining period.
Considering this, the period during which the rotational phase control circuit 20 wastes power is much longer than that of the rotational speed control circuit 10.

In addition, conventionally, PWM generators 13 and 23 are used, but these are both counters 12 and 2.
Since the same number of stages as counter 2 is used, the circuit scale becomes large and the power consumption becomes considerable.

Therefore, in consideration of these points, this invention aims to share the circuit configuration and significantly reduce power consumption by controlling the rotation speed and rotation phase in a time-sharing manner. It is something.

Next, as mentioned above, an example of this idea is
The case where the present invention is applied to a servo circuit for a rotating drum provided in a VTR will be explained with reference to FIG. 3 and subsequent figures.

In FIG. 3, the rotational speed signal _PFG supplied to the terminal 31a is supplied to the AND gate 32 via the first switching circuit 31, and the clock pulse CK is gated by this rotational speed signal _PFG . The clock output is supplied to a counter 33 to form a count output corresponding to the pulse width _Wv of the rotational speed signal _PFG . This count output is supplied to the D-A converter 34 and converted into an analog signal, followed by a switching circuit 35 and a second switching circuit 3 which perform an operation similar to a latch operation.
6 to the hold capacitor C _v ,
It is converted into a predetermined control voltage.

This control voltage is supplied via the amplifier 37 to the drive circuit 15 for the rotary drum motor 16 as a rotational speed control voltage.

In this invention, since rotational speed control and rotational phase control are performed in a time-sharing manner, the period after the rotational speed is detected and the control voltage based on this detection is formed.
Specifically, the rotational speed is detected during the first half period _Wv of the control speed signal _PFG , and a predetermined control voltage is formed, and the rotational phase difference is detected and a predetermined phase control voltage is formed during the second half period Wv'. It was designed to do so.

To this end, this invention uses _a wind-pulse P _W forming circuit 40 proportional to the rotational phase difference as shown in the _figure . A corresponding phase control voltage is formed using the same circuit.

Normally, rotational phase control is performed while the control speed is stable. When the rotational speed is stable, the phase difference between the rotational speed signal P _FG and the rotational phase signal P _PG is uniquely determined by the mechanical positional relationship between the FG detection element and the PG detection element. The phase difference is maintained at a substantially constant value. Therefore, for example, as shown in FIGS. 4A and 4C, it may be assumed that the rotational phase signal _PPG is always obtained by maintaining the interval _W1 .

After the rotational speed has stabilized in this way, a wind pulse P _W is formed.

FIG. 5 shows an example of this wind-pulse _PW forming circuit 40, in which the rotational phase signal _PPG supplied to the terminal 40a is supplied to the first monomulti 41 as shown in FIG. 4D. A monomulti output MM ₁ having a predetermined pulse width that falls slightly after the fall of the rotational speed signal P _FG is formed, and this is further supplied to the second monomulti 42 to generate a predetermined pulse. A second monomultiple output MM ₂ with a width is formed.

A flip-flop circuit 43 is set by this second monomultiple output _MM2 and reset by the reference phase signal _PREF supplied to the terminal 40b to form a window pulse _PW as shown in FIG. 4F.

This window pulse P _W is obtained during a period W _v ′ that is different from the period W _v during which the rotational speed is being detected.
Therefore, the rotational phase is detected during a period other than the counting operation period of the rotational speed signal _PFG . With this control method, the rotational speed and rotational phase can be controlled in a time-sharing manner using the same circuit system.

In order to realize this time-division detection and control, in the first switching circuit 31, the contact point is connected to the terminal P during a period Wv _' other than the period during which the rotational speed is being detected.
can be switched to the side. Therefore, the first switching circuit 31 is supplied with the switching pulse P _SW shown in FIG. 4I. This switching pulse
Since _PSW has the same period as the rotational speed signal _PFG , the phase of PSW is inverted by the inverter 45 and used.

During the period Wv _' , the window pulse _PW is supplied to the AND gate 32 instead of the rotational speed signal _PFG , so a clock output corresponding to the pulse width of the window pulse _PW is obtained, and this is supplied to the counter 33. A count output corresponding to the pulse width is formed.

This count output is converted into an analog signal by the DA converter 34 in the same manner as described above, and this is supplied to the hold capacitor C _P via the latch switching circuit 35 and the second switching circuit 36. And this output is synthesizer 2
9 to the motor drive circuit 15 as a rotational phase control signal.

Note that the second switching circuit 36 is also controlled according to the switching pulse P _SW . Further, this switching pulse _PSW is supplied to a pulse forming circuit 46, and the latching switching circuit 35 is controlled by its output _PL . In this column, _D-
The analog output of the A converter 34 is latched and held by each capacitor _Cv and _CP .

The reason why such latch and hold operations are performed is because the counter 33 and the DA converter 34 are shared.

In this figure, 50 is an overflow detection circuit, the detection output of which is supplied to an overflow processing circuit 51 for rotational speed control and an overflow processing circuit 52 for rotational phase difference control, and the respective outputs are sent to a switch. switching according to the switching pulse P _SW . The output is D-A as before.
The signal is supplied to the converter 34 as a control signal for holding analog data.

Note that, as shown in FIG. 4, when the rotational phase signal _PREF is obtained in the latter half of the period of the rotational speed signal _PFG , the above-mentioned operation occurs. However, if the rotational phase signal P _REF (shown by the broken line) is obtained in the first half W _v of the next cycle, that is, if the rotational phase is significantly deviated, the rotational speed detection timing and rotational phase detection Although the timings overlap, in such a case, the counter 33 will overflow. Therefore, at this time, the overflow processing circuit 52 operates and the DA converter 34 is controlled.

In addition, in such a case, the analog output of the DA converter 34 may be controlled to be zero.

By the way, in the embodiment shown in FIG.
Since the converter 34 is commonly used, this D
The rotational speed control signal and rotational phase control signal output from the -A converter 34 must be held in independent systems until the next data is detected. For this purpose, hold capacitors Cv _{and CP} are provided as shown in the figure.

The embodiment shown in FIG. 6 is a case where the hold capacitors _Cv and _CP can be omitted.

Therefore, in this example, the output of the counter 33 is passed through the latch circuit 55 to the D-signal for the rotational speed control signal.
A converter 56 is supplied. Similarly, when the rotational phase is detected, the count output from the counter 33 is sent to the D- for rotational phase control via the latch circuit 57.
A converter 58 is supplied.

In this way, when using the D-A converters 56 and 58 for rotational speed control and rotational phase control, even if the counter 33 is used in a time-sharing manner, the D-A converter 56 is supplied with only the counter output for rotational speed control, and the D-A converter 58
Since only the counter output used for rotational phase control is supplied to , the analog signals formed from each can be used at all times as a rotational speed control signal and a rotational phase control signal. Therefore, the third
Hold capacitors C _v and C _P as shown in the figure
There is no need to provide

As explained above, according to this invention, when controlling the rotational speed and rotational phase of the drum motor 16 at the same time, there is no need to provide independent control systems for each. It has the following advantages.

In other words, instead of detecting the rotational speed using a rotational speed control system and the rotational phase using a rotational phase control system to form corresponding control signals as in the past, the rotational speed and rotational phase are detected in a time-sharing manner. Since it detects and forms a corresponding control signal,
The rotation configuration can be significantly simplified. By reducing the circuit scale, power consumption is reduced accordingly, and by reducing the circuit scale, the IC
In this case, the chip size can be reduced. Furthermore, since a counter with a number of bits that can count clock pulses for a period where one cycle of the signal FG is divided into two minutes is sufficient, a counter with a number of bits that is smaller than a counter with a number of bits that can count clock pulses for one cycle of the rotating body. This also contributes to the miniaturization of IC chips. This results in
Contributes to making VTRs smaller and lower power consumption.

Of course, by reducing the chip size, the yield of ICs is greatly improved, which also leads to lower costs.

Furthermore, in this invention, a low power consumption D-A converter can be used in place of the PWM generation circuit, so that low power consumption can also be achieved.

Further, in the case of the configuration shown in FIG. 3, the counter, the DA converter, and the overflow detection circuit can each be used in common, so that the circuit scale can be further reduced. In the embodiment shown in FIG. 6, it is not possible to share the D-A converter;
Since the hold capacitor can be omitted, the number of external parts can be reduced accordingly, making it easier to manufacture this type of circuit.

In the above embodiment, this invention was applied to the rotational speed and phase control circuit of the drum motor 16, but it can also be applied to a similar rotational speed and phase control circuit for the carbstan motor.
Furthermore, this invention can be similarly applied to other rotating bodies.

[Brief explanation of the drawing]

Figure 1 is a system diagram of the speed and phase control circuit for the rotating body, Figure 2 is a waveform diagram to explain its operation, and Figure 3 is a diagram of the speed and phase control circuit for the rotating body.
The figure is a system diagram of essential parts showing an example of a rotational speed and phase control circuit according to this invention, FIG. 4 is a waveform diagram for explaining its operation, and FIG. 5 is a system diagram showing an example of a wind-pulse forming circuit. FIG. 6 is a system diagram similar to FIG. 3, showing another example of the rotation speed and phase control circuit for a rotating body according to this invention. 33 is a counter, 34, 56, 58 are D-A converters, 16 is a drum motor, 50 is an overflow detection circuit, 40 is a window-pulse forming circuit, _PFG is a rotational speed signal, _PPG is a rotational phase signal,
P _REF is the reference phase signal and P _W is the wind pulse.

Claims (1)

[Claims for Utility Model Registration] A first pulse generating means that generates n pulses (n≧2) per rotation of a rotating body; and at least one pulse generating unit that generates n pulses per rotation of a rotating body; a second pulse generating means for generating a pulse indicating a phase and having a predetermined phase relationship with the pulse obtained from the first pulse generating means; means for obtaining a rectangular wave signal in which an interval of one state and an interval of another state are switched according to a predetermined ratio within one cycle; a window-pulse forming means for forming a window-pulse that rises after switching of the rectangular wave signal and falls in accordance with a reference phase signal of the rotary body within another state; and one state of the rectangular wave signal. and said window pulse by a signal corresponding to said rectangular wave signal, and said switch means is supplied with the output of said switching means and is configured to calculate the number of predetermined clock pulses included in one state of said rectangular wave signal. one counting means for counting the number of the clock pulses included in the window-pulse section; A speed and phase control circuit for a rotating body, comprising means for controlling the rotational speed of the rotating body, and means for controlling the rotational phase of the rotating body using the output obtained by D/A converting the count value output within the window-pulse section. .