JPS59171122A - Dryetching method - Google Patents

Abstract

PURPOSE:To improve the yield rate of dryetching by a method wherein the necessary high frequency voltage is applied between opposing electrodes for the purpose of discharging electricity when the discharge is started, the impednace between electrodes is reduced to the impedance of the steady-state discharge or thereabout, then it is slowly increased to the steady-state discharge voltage, and after an etching has been finished, the discharge is stopped after slowing down. CONSTITUTION:An opposing electrode 11 and a table 12 are arranged in vertical direction in a reaction chamber 10, having a gas introducing hole 14 and a gas exhaust hole 16, leaving the prescribed interval. At this time, the penetrated part of the reaction chamber 10 of the supporting pole of the table 12 is insulated using an insulating material 16, and a number of material to be etched 30 such as SiO2, Si and the like are placed on the table 12. Then, a microcomputor 23 with which a steady-state discharge power and the slow up or slow down discharge power can be outputted is connected to the supporting pole through the intermediaries of a matching box 20, a high frequency power source 21 and an A/D converter 22. Through these procedures, gas is formed into a plasmic state by discharging a low voltage at first, thereby enabling to reduce the damage generating on the material to be etched.

Description

[Detailed description of the invention]

[Field of Application of the Invention] The present invention relates to a dry etching method, particularly when the layer to be etched is 5i02. PSG, Si, I'oly-8i
The present invention relates to a dry etching method suitable for etching wafers such as the above. [Prior art] A counter electrode and a wafer @fi'j are placed in a reaction chamber that is evacuated under reduced pressure.
When etching a wafer placed on a table in a dry process using a device in which reactive scum is introduced into one reaction chamber and a wafer placed on a table is used, conventional methods are used. Is it 111i frequency? ii The high frequency power that is output from the grid to the matching box, tuned by the matching box, and supplied to one electrode, for example, the table, from the start of discharge to the stop of the discharge is constant, and therefore the The impedance between the opposing electrode and the table (the impedance between the electrodes and the table) is also constant t'. Due to the large impedance, the voltage between the electrodes becomes large beyond the range of the voltage between the electrodes during steady discharge (hereinafter referred to as t-1 steady discharge voltage), and as a result, at the start of discharge, The high-frequency power (hereinafter referred to as discharge starting power) that acts between the counter electrode and the chiffle is also ×, After the wafer hooning is completed, the discharge is stopped at the steady discharge voltage, so the current
The impetance changes rapidly, and as a result, the interpolar sweat exceeds the range of the steady-state discharge voltage and becomes larger. (Due to the relationship with the single-wave current of 11, is the current flowing to the opposite 11 when the 11 is stopped?

[The +11i frequency electric power (U, 1, abbreviated as discharge stop power) that acts between the pole and the table does not exceed the constant ``discharge'' force. in this way? In Sairai technology, Ho'4 [7 at the beginning of 1i1
The interelectrode voltage (hereinafter referred to as the discharge start voltage) and the interelectrode voltage at the time of discharge 711 (hereinafter referred to as the discharge stop voltage) exceed the range of the constant discharge voltage ( In addition, the starting power for Group 7 is larger than the constant discharge power range (because of this, there are the following drawbacks: (1) When the layer to be etched is SiO2, PSG, Si, P
When etching a wafer made of wafers such as oly-8i, the yield decreases if the portions of the wafer that form the deposits are damaged. (2) An abnormally large negative current 41 is applied to the high frequency power supply.1. )
, which can burn out the circuits in the high-frequency power supply. [Object of the Invention] An object of the present invention is that the layer to be etched on the wafer is 5i02.
The second purpose is to provide a dry etching method that can improve the yield of PSU, Si, poly-8i, etc. [Summary of the Invention] The present invention provides a method for applying the minimum high-frequency voltage necessary to generate a discharge between the counter electrode and the table (hereinafter referred to as
- After generating a discharge between the electrodes and reducing the impedance between the electrodes to 1u, which is the impedance between the electrodes at a constant tn discharge, the high-frequency vehicle force acting between the electrodes (hereinafter referred to as the interelectrode power After the etching is finished, the electric power between the electrodes is slowed down from the constant fluoride i1j Ifi force, and then the discharge occurring between the electrodes is stopped. It is characterized by causing
The starting voltage and the discharge stop voltage are within the range of the fixed release market 'rL pressure. [χ Release the starting gravity at a constant rate of 1N ′tn
It is designed to suppress the force within the range of force. [Act of the invention h1 [Example] An embodiment of the present invention will be described with reference to the drawings. In the drawing, the reaction chamber IO includes a facing electrode 11 and a cable 1.
2 and the discharge spaces 1 and 3, in this case, the downward direction 1
They are located opposite each other. The reaction chamber 10 is provided with a scum inlet 1-114 and a scum 1 gas 1''15, and a scum inlet port +41 is connected to a reaction (3+a scum supply device H (not shown)) to the scum 1 air 1''15. are connected to an exhaust system (not shown). Also, the reaction chamber 10 and the exhaust system 1 are connected to each other.
2 and is electrically insulated by an insulating material 16. A high frequency power supply 21 is connected to the chifur 12 via a matching box, and a J)/A converter 4 is connected to the 1111 frequency '-1i source 2]. JJ/
A shi: 煕n is connected to the = fucon feather. still,
In this case, the microcomputer z3 has the function to output the digital value corresponding to 1)/A converter n]; Add the digital value equivalent to town +)/A
The function of outputting to converter n is enabled. The wafer 31) is placed in the diaffle 12, and the reaction chamber IO is evacuated to a predetermined pressure level by the exhaust device i'i.Then, the reaction chamber IO is filled with reactive waste supply devices ij, l. From L!Apply 1-4 dIL amount is 1
゛Introduced. In addition, even during the reaction 1'1 force introduction period, the force should be maintained at a constant level from the device (-).In this state, when the convex frequency source 2j is inputted, the 9th one, the microcomputer Z3
, A, / JJ change ard 22, by activating the mano 1,000 volume addition, the chifur 12I is fed with the high frequency city 27, and this is the one with a constant pressure gradient. A discharge occurs and the reaction example scum is plasma f.
C. In this case, at the start of the discharge, a discharge occurs between the 11 poles with the minimum high frequency voltage necessary to cause the discharge,
Thereafter, after the inter-electrode impedance becomes as small as the inter-electrode impedance during steady discharge, the inter-electrode power is slowed up to the steady discharge power. As a result, the discharge starting voltage is suppressed within the range of the steady discharge voltage, and the discharge starting power is suppressed within the range of the steady discharge power. During the etching of the wafer plate with the plasma-heated reactive gas, the interelectrode power is kept constant at the constant discharge power. During the etching period of the wafer (3I), first, the inter-electrode power is a constant number? After being slowed down from the IE force, the discharge occurring between the electrodes is stopped. This prevents sudden changes in impedance between the electrodes (
Therefore, the discharge stop voltage is suppressed within the range of the steady discharge voltage. Furthermore, in the dry etching method of this embodiment, the discharge stop power ',-' is naturally suppressed within the range of the steady discharge power as in the conventional case. The following effects can be obtained. (1) The layer to be etched on the wafer is 5i02. P.S.G.
, Si + pony-8i, etc., it is possible to prevent the parts of the wafer in which elements are formed from being damaged, and therefore, the yield can be improved. (2) It is possible to prevent an abnormally large load from being applied to the high frequency power supply, and therefore, it is possible to prevent many circuits from being burnt out in the high frequency power supply. [Effects of the Invention] As explained above, the present invention generates a discharge between the electrodes at the minimum high frequency voltage necessary to generate the discharge at the start of the discharge, and lowers the impedance between the electrodes to the level during normal discharge. After reducing the interelectrode impedance, the interelectrode power is slowed up to the rated discharge power, and after etching is finished, the interelectrode power is slowed down from the steady discharge power, and then the discharge occurring between the electrodes is stopped. By doing this, the discharge start voltage and discharge stop voltage can be kept within the range of the steady discharge voltage.
In addition, since the discharge starting power and the discharge stopping power can be suppressed within the range of the steady discharge power, the layer to be etched on the wafer can be
(Even with J, PSA, SI, poly-8i, etc., it is possible to prevent the parts of the wafer in which elements are formed from being damaged, which has the effect of improving the yield.

[Brief explanation of drawings]

The drawing is a block diagram of a dry etching apparatus embodying the present invention.

Claims (1)

[Claims] 1. Using a device in which a counter electrode and a wafer mounting electrode are installed facing each other in a reaction chamber that is evacuated under reduced pressure, reactive scum is introduced into the reaction chamber described in 11r1 and placed on the wafer mounting electrode. In a method of dry etching a wafer that has been etched, at the start of the discharge, the minimum high-frequency voltage necessary to cause the discharge is applied to the opposing wafer. A discharge is generated between the 1i pole and the wafer mounting weight, and the impetance between the counter electrode and the wafer mounting electrode is changed to the impedance between the counter electrode and the wafer mounting electrode during steady discharge. After reducing the beatance to about the same level, the high frequency power that acts between the counter electrode and the wafer mounting electrode is slowed up to the high frequency power that acts between the counter electrode and the wafer mounting electrode during constant discharge. After the end of the electric discharge, the high frequency power that acts between the counter electrode and the wafer mounting electrode is slowed down from the high frequency power that acts between the counter electrode and the wafer mounting electrode during steady discharge. Later, the discharge generated between the counter electrode and the wafer-mounted IN electrode will be shut off! t4
Dry etching method.