JPS6347930A - Semiconductor processing apparatus using plasma - Google Patents
Semiconductor processing apparatus using plasmaInfo
- Publication number
- JPS6347930A JPS6347930A JP19256586A JP19256586A JPS6347930A JP S6347930 A JPS6347930 A JP S6347930A JP 19256586 A JP19256586 A JP 19256586A JP 19256586 A JP19256586 A JP 19256586A JP S6347930 A JPS6347930 A JP S6347930A
- Authority
- JP
- Japan
- Prior art keywords
- vacuum
- degree
- plasma
- airtight vessel
- airtight container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000001755 magnetron sputter deposition Methods 0.000 abstract description 2
- 238000004381 surface treatment Methods 0.000 abstract description 2
- 238000004544 sputter deposition Methods 0.000 description 16
- 235000012431 wafers Nutrition 0.000 description 16
- 239000007789 gas Substances 0.000 description 15
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 12
- 230000002159 abnormal effect Effects 0.000 description 8
- 229910052786 argon Inorganic materials 0.000 description 6
- 239000012495 reaction gas Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000010891 electric arc Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 235000012489 doughnuts Nutrition 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
本発明はプラズマを利用した半導体処理装置に係り、特
に気密容器内の圧力によりカソード電極への電源供給を
制限するインターロック機構に関する。[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a semiconductor processing apparatus using plasma, and in particular an interlock that limits power supply to a cathode electrode by pressure inside an airtight container. Regarding the mechanism.
（従来の技術）
近年、ガスプラズマを利用して例えば半導体ウェハ等の
基板に例えば成１１！処理やエツチング処理等を行なう
半導体処理装置が盛んに使用されている。(Prior Art) In recent years, gas plasma has been used to form substrates such as semiconductor wafers, for example. 2. Description of the Related Art Semiconductor processing equipment that performs processing, etching, etc. is widely used.
このような半導体処理装置では高真空の気密容器内に一
対の電極を設けて気密容器内に導入した例えばアルゴン
ガス等の反応気体をプラズマ化させ、このガスプラズマ
中の反応成分を利用して基板の成膜処理やエツチング処
理等の半導体処理を行なっている。例えばスパッタリン
グ装置では気密容器内を１Ｏ−６Ｔｏｒｒまで真空引き
した後アルゴンガス等の反応ガスを導入して例えば１０
−２〜１Ｏ−３ＴＯｒｒの真空状態で作業を行なってい
た。In such semiconductor processing equipment, a pair of electrodes is provided in a high-vacuum airtight container to turn a reactive gas such as argon gas introduced into the airtight container into plasma, and the reactive components in this gas plasma are used to process the substrate. The company performs semiconductor processing such as film formation and etching. For example, in a sputtering device, the inside of an airtight container is evacuated to 10-6 Torr, and then a reactive gas such as argon gas is introduced, e.g.
The work was carried out in a vacuum state of -2 to 1 O-3 TOrr.
（発明が解決しようとする問題点）
しかしながら上述したようなプラズマを利用した半導体
処理装置では、例えばスパッタリング装置においては気
密容器内が初期の真空度すなわち１０’Ｔｏｒｒ近傍で
電極に電力を供給してからアルゴンガスを導入すると、
条件によってアーク放電等の異常放電が発生し、この異
常放電により例えばターゲットが破損しこの破損片が基
板に付着して半導体製造時の歩留りを悪化させるという
問題がめった。(Problems to be Solved by the Invention) However, in semiconductor processing equipment using plasma as described above, for example in sputtering equipment, power is supplied to the electrodes at an initial vacuum level in the airtight container, that is, around 10'Torr. When argon gas is introduced from
Depending on the conditions, abnormal discharge such as arc discharge occurs, and this abnormal discharge often causes damage to the target, causing broken pieces to adhere to the substrate and deteriorating the yield during semiconductor manufacturing.
本発明は上述した問題点を解決するためになされたもの
で、気密容器内での異常放電を防止して半導体製造時の
歩留りの向上が計れるプラズマを利用した半導体処理装
置を提供することを目的とする。The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor processing apparatus using plasma that can prevent abnormal discharge in an airtight container and improve the yield during semiconductor manufacturing. shall be.
［発明の構成］
（問題点を解決するための手段）
本発明によれば、気密容器内に配置した一対の電極に電
力を印加して気密容器内に導入した気体をプラズマ化し
、このガスプラズマ中の反応成分により気密容器内に配
置した基板の表面処理を行なう半導体処理装置において
、気密容器内の真空度が予め定められた真空度よりも高
真空または低真空の時に電極への電源供給を制限するイ
ンターロック機構を設けたことを特徴とするプラズマを
利用した半導体処理装置が得られる。[Structure of the Invention] (Means for Solving the Problems) According to the present invention, a gas introduced into the airtight container is turned into plasma by applying electric power to a pair of electrodes arranged in the airtight container, and the gas plasma is In semiconductor processing equipment that performs surface treatment on substrates placed in an airtight container using reactive components inside, power is not supplied to the electrodes when the degree of vacuum in the airtight container is higher or lower than a predetermined vacuum level. A semiconductor processing apparatus using plasma is obtained, which is characterized by being provided with a restricting interlock mechanism.
（作 用）
本発明では気密容器内の真空度をモニタしながら作業に
適切な真空度以外の真空度では電源の供給を制限するイ
ンターロック機構を設けることで電極近傍での異常放電
を防止できる。(Function) In the present invention, abnormal discharge near the electrode can be prevented by providing an interlock mechanism that monitors the degree of vacuum inside the airtight container and limits the supply of power at a degree of vacuum other than the degree of vacuum appropriate for the work. .
（実施例）
以下本発明をマグネトロンスパッタリング装置に適用し
た一実施例について図を参照にして説明する。(Example) An example in which the present invention is applied to a magnetron sputtering apparatus will be described below with reference to the drawings.
円柱状の気密容器１内には各々円筒状に構成されたウェ
ハ処理室、例えばウェハ挿脱室２、エツチング処理室３
、ウェハ加熱処理室４、第１スパツタ処理室５、第２ス
パツタ迅理室６がそれぞれ同心円状に半導体ウェハの処
理工程順に並置されている。ウェハ挿脱室２より挿入さ
れた半導体ウェハは上記各処理室を順次移動されて一連
の処理を受ける。なお、これら各処理室の数、配列等の
構成はウェハ処理目的により異なることは無論でおる。Inside the cylindrical airtight container 1 are cylindrical wafer processing chambers such as a wafer insertion/removal chamber 2 and an etching processing chamber 3.
, a wafer heat treatment chamber 4, a first sputter treatment chamber 5, and a second sputter treatment chamber 6 are arranged concentrically in the order of semiconductor wafer processing steps. The semiconductor wafer inserted from the wafer insertion/removal chamber 2 is sequentially moved through each of the processing chambers and undergoes a series of processing. It goes without saying that the number, arrangement, and other configurations of these processing chambers vary depending on the purpose of wafer processing.
上記スパッタ処理室のざらに具体的な構成を第２図を参
照にして説明する。気密容器１内に配置されたスパッタ
処理室７にはスパッタ部８が設けられており、このスパ
ッタ部８と対向して半導体ウェハ９が配置される。The detailed structure of the sputtering chamber will be described with reference to FIG. 2. A sputtering chamber 7 disposed within the airtight container 1 is provided with a sputtering section 8 , and a semiconductor wafer 9 is disposed facing the sputtering section 8 .
この実施例ではスパッタ部８に逆円錐リング状ターゲッ
ト１０を有するマグネトロンカソードを使用している。In this embodiment, a magnetron cathode having an inverted conical ring-shaped target 10 is used in the sputtering section 8.
すなわちターゲット１０はターゲツト面が逆円錐リング
状に形成され、その中心部には一方極例えばＮｌｌへ１
１が、そしてターゲット１０の外周外側には環状に他方
の磁極例えばＳ磁極１２が周設されており、このＳ磁極
１２とターゲット１０の中央部のＮ６ｆｆｔＭ１１との
作用によりターゲット１０のスパッタ面近傍に弧状の磁
界Ｂを形成する。この弧状の磁極Ｂにより活性化された
イオンを一時閉じ込める作用をする。半導体ウェハ９裏
面部にはウェハ予備加熱用のヒータブロック１３が設け
られており、このヒータブロック１３には反応気体例え
ばアルゴンガスの導入管１４がヒータブロック１３を貫
通して気密容器１内に連通するように設けられている。That is, the target surface of the target 10 is formed in the shape of an inverted conical ring.
1, and the other magnetic pole, for example, an S magnetic pole 12, is provided in an annular manner on the outside of the outer periphery of the target 10, and due to the action of this S magnetic pole 12 and the N6fftM11 in the center of the target 10, the sputtering surface of the target 10 is An arc-shaped magnetic field B is formed. This arc-shaped magnetic pole B acts to temporarily confine activated ions. A heater block 13 for preheating the wafer is provided on the back side of the semiconductor wafer 9, and an inlet pipe 14 for introducing a reactive gas such as argon gas passes through the heater block 13 and communicates with the inside of the airtight container 1. It is set up to do so.
この気密容器１内にはヒータブロック１３上の半導体ウ
ェハより外側部分に形成された排出口から反応気体が導
入される。A reaction gas is introduced into the airtight container 1 from an outlet formed on the heater block 13 outside the semiconductor wafer.
このような構成のスパッタリング装置の動作の一例につ
いて説明する。An example of the operation of a sputtering apparatus having such a configuration will be described.
半導体ウェハ９をヒータブロック１３で加熱しながら気
密容器１内を真空ポンプ２２により例えば１０’Ｔｏｒ
ｒ程度の高真空とした後、反応気体発生装置２０で発生
させた反応気体、例えばアルゴンカスをガス導入管１４
より気密容器１内に導入し、ターゲット１０に電源２１
から予め定められたプログラムで電力例えば１３．７５
ＭＨｚの高周波電力を印加して導入した反応気体をプラ
ズマ化させる。プラズマ化した反応気体は図中へで示す
如くターゲット１０のスパッタ面近傍に発生した磁界Ｂ
によりスパッタ面近傍にドーナツ状に閉じ込められる。While heating the semiconductor wafer 9 with the heater block 13, the inside of the airtight container 1 is heated to, for example, 10' Torr by the vacuum pump 22.
After creating a high vacuum of approximately
It is introduced into the airtight container 1, and the power supply 21 is connected to the target 10.
Power with a predetermined program from e.g. 13.75
MHz high frequency power is applied to convert the introduced reaction gas into plasma. The reactive gas turned into plasma is generated in the magnetic field B near the sputtering surface of the target 10 as shown in the figure.
The particles are trapped in a donut shape near the sputtering surface.
このときプラズマ化された反応気体はターゲット１０を
スパッタし飛翔した粒子１５が半導体ウェハ９上に付着
して薄膜形成が達成される。At this time, the reactive gas turned into plasma sputters the target 10, and the flying particles 15 adhere to the semiconductor wafer 9 to form a thin film.
気密容器１内の雰囲気は真空ポンプ２２により高真空に
保持されその真空度は真空計２３で常に検出することが
できる。真空計２３で検出した測定値信号はインターロ
ック回路２４に入力されるようになっており、このイン
ターロック回路２４により予め設定された真空度以外の
真空度では電源がターゲット１０に印加されない構成と
している。The atmosphere inside the airtight container 1 is maintained at a high vacuum by a vacuum pump 22, and the degree of vacuum can be constantly detected by a vacuum gauge 23. The measurement value signal detected by the vacuum gauge 23 is input to an interlock circuit 24, and the configuration is such that power is not applied to the target 10 at a vacuum level other than the vacuum level preset by this interlock circuit 24. There is.
ところでスパッタリング作業では、上述した如く気密容
器１内の真空度はまず１Ｏ−６Ｔｏｒｒまで下げられた
後、反応気体例えばアルゴンガスを導入して１０−２〜
１０’ Ｔｏｒｒ程度の雰囲気を保持しながら作業を行
なうが、１０’ Ｔｏｒｒよりも高真空の雰囲気内で電
力をターゲット１０に印加してからアルゴンガスを導入
するとアーク放電等の異常放電が発生し、ターゲット１
０が破損して、この破損片が半導体ウェハ９に付着する
という問題がおる。そこでこの実施例では気密容器１内
の真空度が異常放電発生領域となる真空度では電源供給
が行なわれないように真空計２３からの信号をもとに作
動するインターロック回路２４を設けることで上述問題
を解決している。なお、インターロック回路の機能とし
ては異常放電発生領域を過ぎてから自動的にインターロ
ック機構を解除して電源供給を開始する機能を有してい
るものが好適である。By the way, in the sputtering operation, as mentioned above, the degree of vacuum in the airtight container 1 is first lowered to 10-6 Torr, and then a reaction gas such as argon gas is introduced and the vacuum level is reduced to 10-2 to 10-6 Torr.
Work is carried out while maintaining an atmosphere of approximately 10' Torr, but if power is applied to the target 10 in a vacuum atmosphere higher than 10' Torr and then argon gas is introduced, abnormal discharge such as arc discharge will occur. target 1
There is a problem in that the 0 is damaged and this broken piece adheres to the semiconductor wafer 9. Therefore, in this embodiment, an interlock circuit 24 that operates based on a signal from a vacuum gauge 23 is provided so that power is not supplied when the degree of vacuum in the airtight container 1 is in the abnormal discharge generation region. The above problem is solved. Note that it is preferable that the interlock circuit has a function of automatically releasing the interlock mechanism and starting power supply after passing the abnormal discharge occurrence area.
上述実施例では本発明をスパッタリング装置に適用した
例を示したが、プラズマエツチング装置、スパッタエツ
チング装置等、プラズマを利用した半導体処理装置でお
ればいずれも本発明が適用可能なことは熱論である。Although the above-mentioned embodiment shows an example in which the present invention is applied to a sputtering device, it is a matter of course that the present invention can be applied to any semiconductor processing device that utilizes plasma, such as a plasma etching device or a sputter etching device. .
［発明の効果］
以上説明したように、本発明を適用した半導体処理装置
によれば電極近傍での異常放電発生が防止できるので電
極の破損による異物の発生等の問題点が解決でき半導体
製造時にあける歩留りの向上が計れるという効果がある
。[Effects of the Invention] As explained above, according to the semiconductor processing apparatus to which the present invention is applied, it is possible to prevent the occurrence of abnormal discharge near the electrodes, so problems such as the generation of foreign matter due to damage to the electrodes can be solved, and problems during semiconductor manufacturing can be solved. This has the effect of increasing the yield of openings.
第１図は本発明によるスパッタリング装置を示す斜視図
、第２図は実施例のスパッタ処理室の構成を示す図でお
る。
１・・・・・・気密容器、７・・・・・・スパッタ処理
室、８・・・・・・スパッタ部、９・・・・・・半導体
ウェハ、１０・・・・・・ターゲット、１１・・・・・
・Ｎ磁極、１２・・・・・・５１ｉ１１極、１４・・・
・・・反応気体導入管、１５・・・・・・飛翔粒子、２
０・・・・・・反応気体発生装置、２１・・・・・・電
源、２２・・・・・・真空ポンプ、２３・・・・・・真
空計、２４・・・・・・インターロック回路。
出願人 東京エレクトロン株式会社
代理人 弁理士 須 山 佐 −
第１図FIG. 1 is a perspective view showing a sputtering apparatus according to the present invention, and FIG. 2 is a diagram showing the configuration of a sputtering chamber according to an embodiment. DESCRIPTION OF SYMBOLS 1... Airtight container, 7... Sputter processing chamber, 8... Sputtering part, 9... Semiconductor wafer, 10... Target, 11...
・N magnetic pole, 12...51i11 pole, 14...
... Reaction gas introduction pipe, 15 ... Flying particles, 2
0... Reaction gas generator, 21... Power supply, 22... Vacuum pump, 23... Vacuum gauge, 24... Interlock circuit. Applicant Tokyo Electron Co., Ltd. Agent Patent Attorney Sasa Suyama - Figure 1
Claims (2)
て前記気密容器内に導入した気体をプラズマ化し、この
ガスプラズマ中の反応成分により前記気密容器内に配置
した基板の表面処理を行なう半導体処理装置において、 前記気密容器内の真空度が予め定められた真空度よりも
高真空または低真空の時に前記電極への電源供給を制限
するインターロック機構を設けたことを特徴とするプラ
ズマを利用した半導体処理装置。(1) Electric power is applied to a pair of electrodes placed in the airtight container to turn the gas introduced into the airtight container into plasma, and the reactive components in this gas plasma treat the surface of the substrate placed in the airtight container. A semiconductor processing apparatus for performing plasma processing, characterized in that an interlock mechanism is provided for restricting power supply to the electrodes when the degree of vacuum in the airtight container is higher or lower than a predetermined degree of vacuum. Semiconductor processing equipment that uses
められた真空度に達した時に自動的に電極に電源を供給
する機構を具備していることを特徴とする特許請求の範
囲第１項記載のプラズマを利用した半導体処理装置。(2) Claim 1, characterized in that the interlock mechanism includes a mechanism that automatically supplies power to the electrodes when the degree of vacuum within the vacuum layer reaches a predetermined degree of vacuum. A semiconductor processing apparatus using plasma as described in 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61192565A JPH0787191B2 (en) | 1986-08-18 | 1986-08-18 | Semiconductor processing equipment using plasma |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61192565A JPH0787191B2 (en) | 1986-08-18 | 1986-08-18 | Semiconductor processing equipment using plasma |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6347930A true JPS6347930A (en) | 1988-02-29 |
| JPH0787191B2 JPH0787191B2 (en) | 1995-09-20 |
Family
ID=16293398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61192565A Expired - Lifetime JPH0787191B2 (en) | 1986-08-18 | 1986-08-18 | Semiconductor processing equipment using plasma |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0787191B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5917237A (en) * | 1982-07-20 | 1984-01-28 | Anelva Corp | Glow discharge device |
| JPS59171122A (en) * | 1983-03-18 | 1984-09-27 | Hitachi Ltd | Dryetching method |
-
1986
- 1986-08-18 JP JP61192565A patent/JPH0787191B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5917237A (en) * | 1982-07-20 | 1984-01-28 | Anelva Corp | Glow discharge device |
| JPS59171122A (en) * | 1983-03-18 | 1984-09-27 | Hitachi Ltd | Dryetching method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0787191B2 (en) | 1995-09-20 |
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