JPS59171113A - Heat-treatment furnace for semiconductor wafer - Google Patents

Heat-treatment furnace for semiconductor wafer

Info

Publication number
JPS59171113A
JPS59171113A JP4487683A JP4487683A JPS59171113A JP S59171113 A JPS59171113 A JP S59171113A JP 4487683 A JP4487683 A JP 4487683A JP 4487683 A JP4487683 A JP 4487683A JP S59171113 A JPS59171113 A JP S59171113A
Authority
JP
Japan
Prior art keywords
reaction tube
tube
semiconductor
heat
heat insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4487683A
Other languages
Japanese (ja)
Inventor
Noritada Sato
則忠 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Corporate Research and Development Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Corporate Research and Development Ltd filed Critical Fuji Electric Corporate Research and Development Ltd
Priority to JP4487683A priority Critical patent/JPS59171113A/en
Publication of JPS59171113A publication Critical patent/JPS59171113A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

Abstract

PURPOSE:To keep the temperature in a reaction tube uniform by a method wherein, when semiconductor wafers are contained in the reaction tube and the wafers are heated by a high frequency oscillation coil provided outside the tube, a layer of heat insulation material or a double transparent quartz tube with vacuum heat insulation are provided between the reaction tube and the coil. CONSTITUTION:The circumference of a reaction tube 4, composed of a high purity transparent quartz tube, is surrounded by a layer 2 of heat insulation material such as alumina-wool and a high-frequency oscillation coil 7 is applied outside the layer 2. A ladder shape holding device 6 on which semiconductor wafers 5 are arranged is inserted into the reaction tube 4 and the wafers 5 only are heated by current application to the coil 7 and are subjected to heat treatment such as diffusion or oxidization. Instead of the layer 2 of heat insulation material, a double transparent quartz tube with vacuum heat insulation, composed of an inner wall 4a and an outer wall 4b which are made of the same material as the reaction tube 4, may be used to reduce the thickness of the heat insulation compared to that of the layer 2. With this constitution, the heat generation of the reaction tube 4 is reduced and its life can be extended and the temperature in the tube 4 can be uniform.

Description

【発明の詳細な説明】 本発明は半導体素子を′!A造するだめの拡散や酸化な
どの上程に用いる熱処理炉の反応管、とくに直周波ji
g 4加熱まだは赤外線加熱乙どにより、半導体ウェハ
を1h接加熱する熱処理炉の反応γ1の構造に関Jる。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a semiconductor device '! The reaction tube of the heat treatment furnace used for the upper stages of diffusion and oxidation of the A-making process, especially the direct frequency wave
g4 Heating relates to the structure of reaction γ1 in a heat treatment furnace in which semiconductor wafers are heated for 1 hour by infrared heating.

近年、ノリコン単結晶製竜技術のeイ(尖に伴い、シリ
コン単結晶の口径は年々大きくなり・In径は100m
mφまたは125朋φが主流をしめ、さらに150mm
φへと大口径化が進みつつある。、この傾向はTh1O
8ICなど#尋体素子のコスト低下のために今後も続く
ものと予測される。
In recent years, the diameter of silicon single crystals has been increasing year by year due to the e-i technology of Noricon single crystal dragon technology.
mφ or 125mmφ is the mainstream, and further 150mm
The diameter is increasing to φ. , this tendency is Th1O
It is predicted that this trend will continue in the future due to the decreasing cost of #8IC and other similar devices.

一般に、MO8ICなどの半導体素子の製コzは酸化や
拡散などのために800〜1250’Cの高温熱処理が
数回繰り返し行われるのが普通である。第1図は通常用
いられている熱処理炉をその断面構造で示したものであ
り、外周に電熱線1をらせん状に巻回し外側に保温材2
を備えたアルミナまだは/リコンカーバイトからなる均
熱管3の内面に全長にわたって高純度石英管からなる反
応管4が配置され、この反応管4内に半導体例えは/リ
コンウエハ5を並べた(rよしご状支持台6を挿入し、
所定の温度及び時間加熱して拡散や酸化などの熱処理が
行われている。
Generally, when manufacturing semiconductor devices such as MO8ICs, high-temperature heat treatment at 800-1250'C is usually repeated several times for oxidation, diffusion, etc. Figure 1 shows the cross-sectional structure of a commonly used heat treatment furnace, in which a heating wire 1 is spirally wound around the outer periphery and a heat insulating material 2 is placed on the outside.
A reaction tube 4 made of a high-purity quartz tube is disposed along its entire length on the inner surface of a soaking tube 3 made of alumina/recon carbide, and semiconductors, such as/recon wafers 5, are arranged in this reaction tube 4 (r Insert the ladder-like support base 6,
Heat treatment such as diffusion and oxidation is performed by heating at a predetermined temperature and time.

(〜かじ、1−述のようにシリコン多結晶の大[]径化
とともに反応管はざ」然大形化する。これに伴い反応そ
1の消才りが助長される11かに、熱処理炉の荷71j
の増加、消費’rtr、力の増加などの欠点が生じる。
(~ As mentioned in 1-1, as the diameter of the silicon polycrystal increases, the reaction tube suddenly becomes larger. Furnace load 71j
Disadvantages arise such as an increase in , consumption 'rtr, and power.

とくに、反応管とし7て用いられる透明石英管は大口径
化するlコと価格は高くなり、1に高温熱処理時の寿命
は1ず1す旬かくなる。例えは、拡散T稈に使用する市
販のロ径100m+xφノリコンウェハ用透明石英管は
、x250’cで約700 +侍1i4j使用すると反
応管の管壁が失透し曲りが生じ、交換が必要となる。[
〕径125++++πφシリコンウ、エーハ用では寿命
が約500時間1で短かくなる。その寿命を延ばすため
には反応管の管壁を厚くづるとか、アルミナを反応管の
外側に被覆するなどの方法が有効ではあるかこのように
慢ると反応管の価格がさらに20〜40%高くなるとい
う不利をもたらす。
In particular, as the diameter of the transparent quartz tube used as the reaction tube 7 increases, the price increases, and the lifespan of the tube during high-temperature heat treatment becomes shorter. For example, if a commercially available transparent quartz tube for a 100 m diameter + xφ Noricon wafer used for a diffusion T culm is used with a diameter of about 700 + Samurai 1i4j at x250'c, the tube wall of the reaction tube will devitrify and become bent, requiring replacement. . [
] For silicon wafers and wafers with a diameter of 125 + + + + πφ, the life is shortened to about 500 hours 1. In order to extend the life of the reaction tube, are there effective methods such as thickening the wall of the reaction tube or coating the outside of the reaction tube with alumina? This has the disadvantage of being expensive.

一方、高周波誘導コイルや赤外線ランプなどで半導体ウ
ェハを直接加熱する方法は、エビタキンヤル成長装置な
どに一般に用いられてふ・す、”4’4体ウェハの拡散
や酸化などの工程においても、反応管の温度を低下させ
て寿命を長くするために、これらの加熱方法を採用する
ことが考えられるが、反応管内のはしご状の支持台に多
数の半導体ウェー・を並べて酸化や拡散を行う場合、従
来のように反応管の外周に高周波誘導コイルや赤外線ラ
ンプを設儀′シて半導体ウェハを加熱するのでは、反応
管からの放熱量が多くなり、省電力化が望めないはかり
かウェハ曲内とウェハ間での温度ばらつきが生じ易く、
均一な半導体ウェハを得ることができない。
On the other hand, the method of directly heating semiconductor wafers with high-frequency induction coils or infrared lamps is commonly used in Evita kinetic growth equipment, etc. It is conceivable to adopt these heating methods to lower the temperature and extend the life of the semiconductor, but when oxidizing or diffusing a large number of semiconductor wafers by arranging them on a ladder-like support in a reaction tube, conventional If a high-frequency induction coil or an infrared lamp is installed around the outer circumference of the reaction tube to heat the semiconductor wafer, the amount of heat radiated from the reaction tube will be large, and the scale will not be able to save energy or the wafer will be bent. Temperature variations between wafers are likely to occur,
It is not possible to obtain uniform semiconductor wafers.

本発明は」:記の点に鑑みてなされたものであり、半導
体ウェハの拡散や酸化に高周波誘導加熱もしくは赤外線
加熱を用いた場合にも保温効果に優れ、しかも均熱性の
良好な半導体ウェハが得られる手段を提供するものであ
る。
The present invention has been made in view of the above points, and provides a semiconductor wafer that has excellent heat retention effects and good thermal uniformity even when high-frequency induction heating or infrared heating is used for diffusion and oxidation of semiconductor wafers. It provides the means to obtain the desired results.

次にこの発明を実施例にもとづいて説明する。Next, the present invention will be explained based on examples.

第2図はこの発明の実施例を示すものであるが、第1図
と同一符号は同一名称で衣わしてbる。第2図において
例えは高純瓜込明石英管からなる反応管4のり)側を例
えば゛アルミナ・クールなどの保温、4J2で傑う1、
このような反応管4を高周波発振コイル7内に配置した
のち、半導体ウエノ・5を並べたはしご駄文Jる台6を
反応管4内に挿入し通電すると半導体ウコーハのみが加
熱送れて拡散または酸化−C:との熱処理か行われる。
FIG. 2 shows an embodiment of the present invention, and the same reference numerals as in FIG. 1 are designated by the same names. In Fig. 2, for example, the reaction tube 4 (glue) side, which is made of a high-purity quartz tube, is insulated with ``alumina cool'', 4J2, etc.
After placing such a reaction tube 4 inside the high-frequency oscillation coil 7, insert the ladder stand 6 on which the semiconductor chips 5 are lined up into the reaction tube 4 and turn on the electricity, so that only the semiconductor chips are heated and oxidized. -C: A heat treatment is performed.

第、3図はこの発明の別の実施例を示う゛ものであるが
、第3図が第2図°と異る点は保温拐を全く用いていな
いことである。身各3図では高純度透W」石英管からな
る反応管4の外側を、同じ材質からなる反応管4aで覆
い、この反応管4aの両端8で内側反応管4と外側反応
管4aとを浴着して固定し、その一端に設けた排気口9
を通しでこれら二つの反応管で形成される空間部を例え
は、I X 10  torr以下の高真空に排気して
保持した一!、′−?、排気ロ9を封じ切る。このよう
にすると、反応管4と4aからなる二塩性の間隔部は真
空断熱の役目をはだし、とくに第2図に示すアルミナウ
ールなどの保温月2を使用した場合にくらべて1/2〜
2/3の厚みでも十分な保温効果を治し、また反応管管
壁が透明であるため、高周波誘導加熱方式のほかに、赤
外線加熱方式の場合にも適用できると言う利点がある。
Figures 3 and 3 show another embodiment of the present invention, and the difference between Figure 3 and Figure 2 is that no insulation is used at all. In Figure 3, the outside of a reaction tube 4 made of a high-purity transparent quartz tube is covered with a reaction tube 4a made of the same material, and both ends 8 of this reaction tube 4a connect the inner reaction tube 4 and the outer reaction tube 4a. An exhaust port 9 fixed in a bathing suit and provided at one end.
For example, the space formed by these two reaction tubes is evacuated and maintained at a high vacuum of less than I x 10 torr through a vacuum chamber. ,′-? , shut off exhaust air 9. In this way, the di-salt space formed by the reaction tubes 4 and 4a fulfills the role of vacuum insulation, and is especially 1/2 that of the case where the insulation material 2 made of alumina wool or the like shown in Fig. 2 is used. ~
Even with a thickness of 2/3, it has a sufficient heat retention effect, and since the reaction tube wall is transparent, it has the advantage that it can be applied not only to high-frequency induction heating methods but also to infrared heating methods.

第4図、第5図は第2図及び第3図の実施例の変形例を
示すものであるが、この場合もそれぞれ第2図および第
3図と同一符号は同一名称で表わしである。第4図は保
温材を用いた場合であり、第5図は保温材を用いずに、
反応管を二重構造にした場合である。第4図、第5図に
おいて半導体ウェハと同じ物質、例えばシリコン多結晶
からなる半導体製パイプ10を反応管4の中に挿入する
4 and 5 show a modification of the embodiment shown in FIGS. 2 and 3, and in this case as well, the same reference numerals as in FIGS. 2 and 3 respectively are represented by the same names. Figure 4 shows the case using heat insulating material, and Figure 5 shows the case without using heat insulating material.
This is a case where the reaction tube has a double structure. 4 and 5, a semiconductor pipe 10 made of the same material as the semiconductor wafer, for example polycrystalline silicon, is inserted into the reaction tube 4. As shown in FIGS.

半導体ウエノ・5ははしご状支持台6に並べた状態で牛
導体製パイプ10内に挿入したのち、熱処理を行う。こ
の結果、高周波誘導加熱方式の場合は、半導体ウェハ5
のほかに、その外側に配置6、された半導体製パイプ1
0も同時に加熱きれるため、まだ赤外線加熱方式の場合
は、半導体製パイプlOが加熱づれぞの輻射により半導
体ウェハ5が加熱さハるため、半導体クー1−ハ5の面
内及び面間の温度分イjiの均一性が第2図及び第3図
に示した実施例よりも優itている。
The semiconductor ueno sheets 5 are arranged on a ladder-like support 6 and inserted into a pipe 10 made of a copper conductor, and then subjected to heat treatment. As a result, in the case of the high frequency induction heating method, the semiconductor wafer 5
In addition to the semiconductor pipe 1 placed outside the
0 can be heated at the same time, so if the infrared heating method is still used, the semiconductor wafer 5 will be heated by radiation as the semiconductor pipe IO is heated, so the temperature within and between the surfaces of the semiconductor wafers 1 and 5 will increase. The uniformity of the fractions ji is superior to the embodiments shown in FIGS. 2 and 3.

以上説明したように、本発明は反応管の周囲が保温され
ているため、従来の高周波や赤外線による直接加熱ノ)
式にくらべて反応管内の温に均一性が優わ−しいる。セ
しで、本発明によれば半導体ウェハのみ、または半2み
体ウェハと半導体バイブのみが発熱し7、反応管の発熱
は少ないから、例えば透明石英管からなる反応管の寿命
が大幅に延びる。
As explained above, in the present invention, the area around the reaction tube is kept warm.
The temperature inside the reaction tube is more uniform than the equation. Additionally, according to the present invention, only the semiconductor wafer or only the semi-duplicated wafer and the semiconductor vibrator generate heat7, and the reaction tube generates little heat, so the life of a reaction tube made of, for example, a transparent quartz tube is greatly extended. .

例えは、12500以上の熱処理に用いる揚台、125
ynmφ、・リコンワエハ用で、 5000時間に達す
る。そのほかに、抵抗加熱力式熱処理炉のような発熱体
がlい/こめ、保温相及び反応管の温度を低く保つこと
ができる。−f:の結果、これらに含丑れている重金属
不純物の蒸発量が少く、したがって半導体ウニ・・中へ
の侵入も少く高品質の半導体ウニ・・が得られる。すな
わち、清浄な雰囲気中で拡散や酸化が行われるため、■
放射線検出器に使用する超高比抵抗シリコンでもその比
抵抗の変化やライフタイムの低下が生じない、■酸化膜
中への正′亀荷の侵入が生じない、などの(顕著な利点
があり、これらの利点は長いライフタイムを必要とする
電力用ブイリスク、ダイオード及び良質な酸化膜を必侠
とするMO8rCなど各種半導体素子の特性向上への冨
与も治めて大きい。もちろん、上ユl′Iiのように半
導体ウェハを直接加熱するため省′亀1↑L力化の効果
も大きいが、さらに、ブラジルにおける水晶原石が枯渇
しつつ必る昨今、資源を温存するためにもその意義は極
めて高い。
For example, a lifting platform used for heat treatment of 12,500 or more, 125
ynmφ, for reconwafer, reaches 5000 hours. In addition, a heating element such as a resistance heating type heat treatment furnace can be used to keep the temperature of the heat-retaining phase and reaction tube low. -f: As a result, the amount of evaporation of the heavy metal impurities contained in these is small, and therefore there is little intrusion into the semiconductor sea urchin, and high quality semiconductor sea urchin can be obtained. In other words, since diffusion and oxidation occur in a clean atmosphere, ■
Even with ultra-high resistivity silicon used in radiation detectors, there are significant advantages such as no change in resistivity or decrease in lifetime, and no intrusion of positive charges into the oxide film. These advantages greatly contribute to improving the characteristics of various semiconductor devices such as power buoys, diodes, and MO8rC that require a high-quality oxide film, which require a long lifetime.Of course, the upper Since the semiconductor wafer is directly heated as in Ii, it has a great effect of reducing power consumption, but it is also of great significance in order to conserve resources as raw crystals in Brazil are becoming depleted. expensive.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の抵抗加熱方式熱処理炉の構造を示す断面
図、第2図ないし第3図は本発明による直接加熱方式熱
処理炉の断面構造を示す断面図、第4図、第5図はそれ
ぞれ第2図と第3図の実施例の変形例を示す熱処理炉の
断面図である。 1″5.熱線、2・・保温拐、3 均熱管、・1,4a
反応管、5・半導体ウエノ・、6 はしご状支持台、7
 高周波発振コイル、8 浴着部、9 ・排気口、10
  半導体製)くイブ。 51 第1図 7 第4図
FIG. 1 is a sectional view showing the structure of a conventional resistance heating type heat treatment furnace, FIGS. 2 and 3 are sectional views showing the sectional structure of a direct heating type heat treatment furnace according to the present invention, and FIGS. FIG. 3 is a sectional view of a heat treatment furnace showing a modification of the embodiment of FIGS. 2 and 3, respectively. 1″ 5. Heat wire, 2. Heat insulation, 3 Soaking tube, 1,4a
Reaction tube, 5, semiconductor ueno, 6 Ladder-shaped support, 7
High frequency oscillation coil, 8 Bath fitting section, 9 ・Exhaust port, 10
Semiconductor-made) Kubu. 51 Figure 1 7 Figure 4

Claims (1)

【特許請求の範囲】 1)反応管内の生検4体ウニ・・が管外から照射される
電磁波によ−)で加熱たh、管内に最篩温度郡が存在す
るものにおいて、反応もの外側に、管内からの放熱を1
fti nする手段が、伽えら!)たことを斗与徴とす
る1′導体ソエ・・の熱処理炉。 2)特g!1: j!’I求のφ1)、曲用1項記載の
炉において、放熱を阻1トする手段が、白空断熱芒えま
た二、刀−透明石英管であることを特徴とする半導体ウ
ーrハの熱処理炉。 3)牛’i R’r請求の範囲第2項記載の炉において
、電磁波が高周波であり、放熱を阻止する手段が、保温
材であることを特徴とする半導体ソエハの熱処理炉。 4)特許請求の範囲第1項ないし第3項のいずれかに記
載の炉において、反応管内に半導体ウエノ・を囲んで、
ウェハと同じ半導体からなる管が備えら7またことを特
徴とする半導体ウニ・・の熱処理炉。
[Claims] 1) Four biopsied sea urchins in a reaction tube are heated by electromagnetic waves irradiated from outside the tube. In addition, the heat radiation from inside the pipe is 1
The means to fti n is gayera! ) A heat treatment furnace for 1' conductor. 2) Special g! 1: j! 1) In the furnace described in Section 1, the semiconductor woofer is characterized in that the means for inhibiting heat radiation is a blank, heat-insulating awning and a transparent quartz tube. Heat treatment furnace. 3) Cow'i R'r The furnace for heat treatment of semiconductor sawdust according to claim 2, wherein the electromagnetic wave is a high frequency wave, and the means for preventing heat radiation is a heat insulating material. 4) In the furnace according to any one of claims 1 to 3, surrounding the semiconductor wafer in the reaction tube,
A heat treatment furnace for semiconductor sea urchins characterized by having seven tubes made of the same semiconductor as the wafers.
JP4487683A 1983-03-17 1983-03-17 Heat-treatment furnace for semiconductor wafer Pending JPS59171113A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4487683A JPS59171113A (en) 1983-03-17 1983-03-17 Heat-treatment furnace for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4487683A JPS59171113A (en) 1983-03-17 1983-03-17 Heat-treatment furnace for semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS59171113A true JPS59171113A (en) 1984-09-27

Family

ID=12703690

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4487683A Pending JPS59171113A (en) 1983-03-17 1983-03-17 Heat-treatment furnace for semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS59171113A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03171638A (en) * 1989-11-29 1991-07-25 Fujitsu Ltd Vapor epitaxial growth device
JP2010000597A (en) * 2000-10-25 2010-01-07 Daikure Co Ltd Manufacturing method for grating

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03171638A (en) * 1989-11-29 1991-07-25 Fujitsu Ltd Vapor epitaxial growth device
JP2010000597A (en) * 2000-10-25 2010-01-07 Daikure Co Ltd Manufacturing method for grating

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