JPS59170956A - Coupling device of computer - Google Patents

Abstract

PURPOSE:To prevent data from damage due to accessing from another computer and to eliminate the change in an opposite computer even if a data storing address in a main memory is changed and to execute maintenance easily by providing the titled device with an address conversion means and an access control means. CONSTITUTION:When a main memory 2b of a computer 1b is accessed from a computer 1a, logical address information outputted from the computer 1a is transferred to an address register 9a and a data register 60a seccessively, then transferred to an address register 61a in a coupling device 3b. The transferred logical address information is converted into physical address information corresponding to the main memory 2b by an address conversion circuit 11b, and converted information is transferred to an address register 9b. The physical address information transferred to the register 9b is supplied to the main memory 2b through a bus line 7b and stored data in the main memory 2b are read out and transferred to a data register 10a through the register 61b. Since both the address conversion means and address control means are connected, data can be prevented from damage due to access from another computer and system design and program maintenance can be easily performed.

Description

Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a computer coupling device that is connected to each of two computers each having a main memory and mediates access from one computer to the main memory of the other computer. It is.

[Prior art]

Conventionally, there is a device of this type as shown in FIG. In FIG. 1, (11L) and (1b) are computers having main memories (2J and (2b), respectively);
3a) and (3b) are bus control circuits (4g=), (4
b), a coupling device having control circuits (sa), (sb), data transmission/reception registers (6m), (6b), respectively;
a) and (7b) are computer (1m), main memory (2m)
), a path line (address bus and hitator bus) connecting the coupling device (3a), the computer (lb), the main memory (2b), and the coupling device (3b); (8) is the coupling device (3b);
This is a line that connects between (m) and (3b).

In such a configuration, to explain the case where the computer (Im) accesses the main memo IJ (2b) of one computer (1b) and retrieves the necessary data, the computer (Im) first stores the necessary data. The address information of the main memory (2b) that has been stored is sent to the pass line (71L). Then, this address information is read into the bus control circuit (4a) in the coupling device (3^), and it is determined here whether or not the address information is related to the object to be controlled by the bus control circuit (4a) itself. If the address information is related to the determination and control of the bus control circuit (4a), this address information is transferred to the data transmission/reception register (6a) under the control of the control circuit (5a), and is further transferred to the data transmission/reception register (6a). ) and the line (8) to the data transmission/reception register (6b) of the coupling device (3b).

When the address information is transferred to the data transmission/reception register (6b), the control circuit (5b) in the coupling device (3b)
sends the input address information at this time to the pass line (γb). As a result, stored data is read from the address of the main memory IJ (2b) corresponding to this address information. This read data is sent to the control circuit (5b)
The data is transferred to the data sending/receiving register (6a) of one coupling device (3) via the data sending/receiving register (6b) under the control of the control circuit (Sa), and is further transferred via the pass line (7) under the control of the control circuit (Sa). Transferred to computer (1&). As a result, data required by the computer (1a) id can be obtained from the main memory (2b) of one of the computers (1b).

Therefore, in such a configuration, the contents of the main memory of one computer can be directly read and written without being controlled by that computer, so it can be applied to various distributed processing systems.

However, when one computer accesses the main memory of another computer, the address of the main memory to be accessed is directly specified, so the computer being accessed cannot access the data in its own main memory. The drawback is that it cannot be preserved. Furthermore, if the data storage address in the main memory is changed, the other party must also be informed of this fact. That is, there is a drawback that the programs of the two computers connected by the combining device must be changed at the same time.

[Summary of the invention]

The present invention was made in order to solve the above-mentioned drawbacks, and its purpose is to enable data protection, and even if the data storage address in main memory is changed, it is not necessary to change the program of the other computer. The object of the present invention is to provide a computer coupling device that does not require a computer connection.

For this purpose, the present invention converts the address information from one computer to the main memory of the computer to which it is connected to the address information allocated by the computer to which it is connected, and converts the address information from one computer to the main memory of the computer to which it is connected. and an address conversion means that supplies access to the main memory of the computer to which it is connected, allowing access from one computer only to the memory area specified by the computer to which it is connected. A control means is provided.

[Embodiments of the invention]

FIG. 2 is a block diagram showing an embodiment of the present invention,
The same parts as in FIG. 1 are represented using the same symbols. In the same figure, the coupling device (3m), (3b) is the bus control circuit (4 凰) + (4b), the control circuit (5m), (5b
), data transmission/reception registers (6m), and (6b). Bus control circuits (4m) and (4b) are connected to address registers (9m) and (9b) and data registers (
10m) and (10b), and a control circuit (5
m), (sb) are address conversion circuits (ILa), (1
1b). In addition, a data transmission/reception register (6m
), (6b) are data registers csoa), (sob
) and address registers (61m) and (61b), respectively.

FIG. 3 is a detailed diagram showing the relationship between the address register (9b), the address conversion circuit (11b), and the address register (61b), where the address conversion circuit (11b) is connected to the decoder (100) and the register file (101).
l+/register tl)2t) and (103), and the register file (101) is the main memory IJ (2b)
It is divided into a plurality of parts corresponding to the number of divisions of the memory area. Each divided register file is provided with seven lag registers (104) for prohibiting or permitting access to the corresponding memory area. Note that the coupling device (3a) is also configured in exactly the same way. There is.

In such a configuration, the address conversion circuit (11m)
The register file (101) of the other party's computer (1b
Physical address information corresponding to the logical address information of the main memory (2a) known to the computer (1a) is registered by the operating system of the computer (1a).

On the other hand, physical address information corresponding to the logical address information of the main memory (2b) known to the other party's computer (1a) is registered in the register 7'isle (101) of the address conversion circuit (11b). In this case, if there is a memory area for which access from the other party's computer is prohibited, information of -II indicating access prohibition is registered in the 7-lag register (f04) of the register file corresponding to that memory area.

In this state, from calculator (1&) to calculator (1b)
To explain the case of accessing the main memory (2b) of the computer, first, the logical address information output from the computer (1m) is transferred to the address register (9a) and then to the data register (60m). Further, the data is transferred to the address register (61b) of the coupling device (3b) via this data register (60m). Then, this logical address information is divided into upper logical address information and lower logical address information using the nth bit of m bits as a boundary, as shown in FIG. It is input to a decoder (10G) for selecting each divided file of the file (101). As a result, the divided file corresponding to the upper logical address information is selected, and the upper physical address information registered in advance in this divided file is read out and stored in the register (102). In this case, the access control information registered in the flag register (104) in the selected divided file is also read, but if this access control information is 111, an error signal is sent to the computer (1a) K. The message is returned and access to the main memory (2b) is prohibited.

However, when the access control information is 101, the upper physical address information stored in the register (102) is stored below the nth bit of the address register (61b) and transferred to the register (103). It is transferred to the address register (9b) together with the lower logical address information. The m-bit physical address information stored in the address register (9b) in this way is stored in the pass line (7b).
) to the main memory (2b). Accordingly, the stored data is read from the address of the main memory (2b) corresponding to this physical address information. This read data is transferred to the data register (tOa) via the data register (10b), address register (61b), and data register (60m), and then transferred to the computer (1a).

Through these operations, the computer (1a) is transferred to the main memory (2).
b) can access the main memory (2b) without knowing where in the address space of the computer (1b) it is running. On the other hand, the computer (1b) has a flag register (
main memory (2b) by controlling the contents of
Access from the computer (1a) to any memory area in the computer (1a) can be prohibited, and data can be protected.

Therefore, by connecting multiple computers using such a connecting device, it is possible to configure distributed processing systems with various structures, and it is also possible to independently assign addresses to programs and main memory in each computer. This has advantages such as ease of system design and maintenance.

〔Effect of the invention〕

As is clear from the above description, since the present invention includes an address conversion means and an access control means, it is possible to prevent data from being destroyed due to access from other computers, and also to change the data storage address in the main memory. It is also possible to obtain benefits such as making it easier to design the system and maintain the program without having to change the program on the other party's computer.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a conventional computer coupling device, FIG. 2 is a block diagram showing an embodiment of the present invention,
FIG. 3 is a block diagram showing details of the address translation circuit. (IJL), (lb)...calculator, (2a), (2
b) @...Main memory, (3a), (3b)...
Coupling device, (4&)+(4b)...-bus control circuit,
(5m), (5b)...control circuit, (6a), (
6b)...Data transmission/reception register, (11m), (i
lb)...address conversion circuit, (100)...
Decoder, (101)...Register file '1
(102), (f03)...middle register (104)
...-Flag register. Agent Shin Kuzuno −

Claims (1)

[Claims] Connected to each of two computers having main memory,
In a computer coupling device that mediates access from one computer to the main memory of another computer, one computer transmits address information for the main memory of the computer to which it is connected to the computer to which it is connected. An address conversion means that converts the address information into the horizontally drawn address information and supplies it to the corresponding main memory, and an address conversion means that converts the address information into the divided address information and supplies it to the corresponding main memory. A computer coupling device comprising: access control means for permitting access only to a memory area determined by the computer on which the computer is located;