JPS59167185A - Signal read circuit of solid-state device - Google Patents

Abstract

PURPOSE:To read a signal without attenuating an output level and without using a high power supply voltage by inserting an inductance in parallel with a parasitic capacitance and setting its resonance point in a band of a fundamental wave of harmonic of an output pulse train of an AMP for extracting signal. CONSTITUTION:A resonance point f0 depending on an inductance L36 and a parasitic capacitance C34 is adjusted so as to be located in a band of the fundamental wave or the harmonics used in this case. Thus, a load impedance Z of a source follower MOSFET 31 is expressed as Z(f)=jX2pifXL{1-(2pi)<2>f<2>XLC}. and the value ¦Z¦ near the f0 is a value sufficiently high than an output impedance (r) of the FET 31, thereby causing a voltage dividing effect of the output voltage by the resistor (r) and the ¦Z¦ to be very low. Further, the impedance to a DC deciding a bias current of the FET 31 is nearly zero and no voltage due to the bias current is generated between the impedances ¦Z¦. Thus, no high voltage of power supply is required.

Description

[Detailed description of the invention] [Field of application of the invention] The present invention relates to a signal readout circuit for a solid-state imaging device.

[Prior art]

FIG. 1 is a diagram showing the principle of a conventional CCDW solid-state imaging device.

M) A photosensitive section 9 consisting of photodiodes 2 arranged in an IJ rack, and C0D11 to IN in the vertical direction and C0 in the horizontal direction for outputting optical signals accumulated in the photodiodes.
CD3 and an output AM that amplifies and outputs the transferred signal
It consists of P4.

FIG. 2 is a circuit example of the output AMP4. 30 is a small electrostatic capacitor C□ that converts the signal charge amount Qs transferred by the horizontal CCD 3 into a voltage amount, and 31 is a signal voltage VO:Q8/Co generated between the capacitor CO in proportion to the signal charge amount QS. The source follower MO8-type PET s2, which outputs low impedance, is a glue-set MO8-type FET for removing the signal charge 1icQs in the gate CO to the outside.

In the Kirizo element shown in FIGS. 1 and 2, signals are read out in the following manner. That is, first, the signal charge accumulated in the photodiode 2 during one frame period is transferred to CCDII-IN in the vertical direction during the vertical retrace period. Vertical COD
is transferred one line at a time during the horizontal retrace period, and the signal charges are sequentially transferred to the CCD 3 in the horizontal direction. The signal charges transferred to the horizontal COD during the horizontal retrace period are sequentially transferred into the container CO by applying a clock pulse to the horizontal COD during the following one horizontal period of music. The signal charge Q″:) transferred to the capacitor CO by the clock pulse is the capacity kc
A voltage If, ) is generated between the source follower output terminal 33
outputs a signal pulse 4t in FIG. 3 with voltage amplitude V('). After this (MO8WF for resetting the M charge Q(Z)
Externally removed through ET. Furthermore, at the next t+1th clock pulse, the next signal charge ciL+1) is transferred to the capacitor CO again, and a signal pulse (t'+1) of FIG. 3 with voltage amplitude y (11) is output. Thereafter, by repeating the same operation, a sequential signal pulse train is output as shown in FIG. 3(C). FIG. 4 is an explanatory diagram of the frequency distribution of the output signal pulse train in FIG. 3(C). In other words, a train of signal charges that modulates the amplitude of the output signal pulse train...ψ+"(tz-+
) When the distribution shown in s4 diagram (a) is obtained, Figure 3<C)
The frequency distribution of the output signal pulse train is as shown in FIG. 4(b).

In the figure, reference numeral 50 denotes a baseband component, which shows the frequency distribution obtained by multiplying the variable leg signal of FIG. 4(a) by the frequency characteristic sinπfτ/πf (where = pulse width) obtained by pulse amplitude modulation. Further, 51 is a basic wave component, which consists of a carrier wave having the same frequency fr as the reset pulse and its sidebands. Below, 5m is the m-th harmonic component in FIG. 3(C), which consists of a carrier wave of frequency mxfr and its sidebands.

゛To read out the signal components from the output signal pulse train in Figure 3 (C), the baseband component 5 of the frequency distribution of Figure 4 (Figure 0) must be read out.
There are methods of extracting 0 using an LPF, and detecting fundamental wave components or harmonic components using a BPF.

By the way, in a solid-state imaging device, the first stage transistor of the output AMP (FIG. 2) is generally constituted by an MO8 type F'ET. Further, the voltage-current conversion parameter gm of the MO8 type FET integrated into an IC is as small as about 1 mv. Therefore, the output impedance r of the source follower is determined by the reciprocal of gm.
The dog's strength reaches approximately IKΩ. Therefore, even if it is a source follower, the output impedance r and the external resistance R
The attenuation of the output signal level caused by the voltage division effect (FIG. 2, 35) cannot be ignored. In fact, for example, even if the solid-state imaging device output is received by a resistor R=2Ω, the signal level will be attenuated by about 2/3. Therefore, the signal level relative to external circuit noise is reduced, and the S/N ratio of the read signal is degraded.

According to calculation formula (1), the attenuation of this signal level can be suppressed to 10% or less by setting the external resistance R to a large value, for example, 10-odd Ω. However, in an actual circuit, as shown in FIG. 2, there is a parasitic capacitance C of several pp due to the wiring ring, so if the resistance R is increased, the frequency characteristics of the output signal 1 will be significantly deteriorated. Also MO8
壓F'ET31ogm (therefore output impedance r)
decreases (r increases) as the bias current decreases, so a large power supply voltage is required to ensure a constant bias current. The former effect of frequency characteristic deterioration is particularly significant when a signal component is extracted from the fundamental wave component or harmonic component of the output signal pulse train.

[Purpose of the invention]

An object of the present invention is to provide the solid-state imaging device shown in FIG.
The present invention relates to a signal reading circuit capable of reading a signal without attenuating the signal level of output 1 and without using a large power supply voltage.

[Summary of the invention]

In order to achieve the above object, the present invention inserts an inductance L in parallel with the parasitic capacitance C in place of the external resistor R, and uses the resonance point fO of these capacitors 1C and the inductance L to generate an output AMP that is used to determine the signal range. It is characterized in that it is set within the fundamental wave component band or harmonic component band of the output signal pulse train.

[Embodiments of the invention]

FIG. 5 shows an embodiment of the present invention, which is a signal readout circuit for extracting a signal from the fundamental wave component or harmonic component of the output signal pulse train. In FIG. 5, 36 is an inductance L inserted into the external resistor 350 in FIG. 2, and a resonance point 1 f o=2. , x nail (2) are adjusted so that they are within the fundamental wave component band or harmonic component band to be used. For example, clock frequency fc=7
．． When driving a solid-state imaging device with 16MH2 and extracting a signal from the fundamental wave component, the inductance L is at the resonant frequency fo
Set it so that it is approximately 7MH2.

When the inductance L is set as above, the load impedance Z of the 408-type FET 31 for the source follower becomes the same, and the value I21 near the resonance frequency fO becomes the MO8-type FET31.
Since the image is sufficiently large compared to the output impedance r of the ET31, the effect of dividing the output voltage by the resistor r and IZl can be made very small. Still MO8 type F'E'l'
Direct current (f:;0Hz) that determines the bias current of 31
From equation (3), the impedance for Z (0)
(No voltage is generated between the impedance 41 and the impedance 22 due to the bias current. Therefore, the required bias current can be secured even without a large power supply voltage.

FIG. 6 shows another embodiment of the present invention, which is a signal readout circuit in which the resonance Q value determined by equation (3) is adjusted. In other words, FIG. 6 shows the parasitic capacitance 34 and inductance 36 in FIG.
In this case, a larger resistor R' (sixth (2) 37) is inserted in parallel with the resistor R'. As is clear from equation (3), the external impedance Z in FIG. 5 is Z(f
It shows very sharp frequency characteristics that diverge from o) to ■.

The resistor 37 shown in FIG. 6 is inserted to reduce the Q value, which indicates the speed of movement, and to smooth the frequency characteristics. The external impedance Z' in FIG. 6 can be expressed by the following equation.

FIG. 7 shows another embodiment of the present invention, similar to the embodiment shown in FIG.
A resistor R is connected in series with the inductance 36 to adjust the value.
'' (Fig. 7, 38).The circuit shown in Fig. 7 can make the frequency characteristics in the low frequency region smoother than the circuit shown in Fig. 6.
Dance Z" can be expressed by the following equation.

R“10j×2πfL Z”)=1−(2・l”f”Lc+jx2・fCR,
(6'However, in the circuit of FIG. 7, the power supply voltage is large enough to secure the bias current of the MO8 type FET 31, depending on the size of the resistor R.

The embodiments shown in FIGS. 5 and 6 have low impedance in the low frequency region and cannot be applied to a signal readout method in which a signal is generated from the baseband component of an output signal pulse train. However, in the embodiment shown in FIG.
Since the impedance Z(0)=R" can be obtained even in
In addition, it can also be applied to an iG@readout method that extracts a signal from a baseband component.

Further, in the embodiments shown in FIGS. 5 to 7, it is desirable that the inductance 36 and the resistors 37 and 38 inserted externally be made variable in order to adjust the resonance frequency and Q value.

〔Effect of the invention〕

According to the present invention, the CCD type equal output AMP input end capacitance CO
In a solid-state imaging device that has an output AMP of the type that amplifies the power or voltage of a signal voltage that appears between the two, the deterioration of frequency characteristics due to the parasitic capacitance C and external resistance R of the output line or the output of the AMP can be avoided without using a large power supply voltage. The output signal level is not attenuated due to voltage division by the resistor r and the external resistor R, and therefore a signal with a high SN ratio can be obtained.

Also, the MO8 type FET31 for the source follower has its g
This generates thermal noise proportional to the reciprocal of m (which increases with bias current), but in the embodiments shown in Figures 5 and 6, the bias current can be arbitrarily selected without increasing the power supply voltage, so the above Thermal noise itself can be reduced, and the signal S
/N can be further increased.

The above has been explained using the example of the output AMP circuit shown in FIG. 5, but in general, the output AMP circuit shown in FIG.
A CCD type solid-state imaging device having an output AMP circuit of the type that amplifies the power or voltage of the signal voltage appearing between them, or a solid-state imaging device of a type combining MOS type and CCD type as shown in Fig. 9, or a CCD type line sensor, It can also be used to read out signals from CCD type delay lines and the like.

[Brief explanation of drawings]

Figure 1 is a principle diagram of a conventional CCD solid-state imaging device;
Part A shows an example of the output AMP circuit, Figs. 3 and 4 show the output signal waveform and its frequency distribution, Figs. 5 to 7 show examples of the signal readout circuit according to the present invention, and Fig. 8 shows outputs other than those shown in Fig. 2. AMP
Circuit Example: FIG. 9 is a principle diagram of an example of a solid-state imaging device other than a CCD type to which the present invention can be applied. ■ 1 Figure %s I Z Figure No. 4 Figure circumference C Number i, (b) □ →1 1゛゛゛゛bjiZ 9 Figure ■

Claims (1)

[Claims] 1. The signal charge Qs sent in pulses is accumulated in the electrostatic capacitance gico at the AMP input terminal, and the signal voltage appearing between the capacitors 00 is amplified in power or voltage and output. Output A
1. A signal readout circuit for a solid-state device having an MP circuit, characterized in that the load impedance of an output transistor of the AMP is configured using an inductance L. 2. A signal readout circuit for a solid state device according to claim 1, characterized in that an inductance L is connected in series to the source or drain terminal of the output transistor. 3. Range of Permissible Requirement In the signal readout circuit for the solid-state device described in item 1, the resonant frequency fO determined by the inductance L and the silkworm capacitance C of the output line of the solid-state device is set to the output signal output from the output AMP. A signal readout circuit of a solid-state device is set within the harmonic region of the carrier frequency mxfc used to extract signals from.