JPS5916442A - Descrambler - Google Patents

Abstract

PURPOSE:To decrease erroneous transmission and to prevent the interpretation by the 3rd party, by outputting data descrambled in response to a scrambled and an output of a function generator. CONSTITUTION:A shift register 103 stores sequentially the scrambled data inputted from an input terminal 107. A pattern generator 102 outputs a digital pattern in a predetermined order. The function generator 104 outputs a digital pattern (random number) in response to an output of the register 103 and the generator 102 depending on a key pattern from an input terminal 106. An exclusive OR element 105 outputs an exclusive OR between an output of the generator 104 and data from the terminal 107. Thus, the erroneous transmission is decreased and since the random number depends on the scrambled data, the scrambled result is hardly interpreted by the 3rd party.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a descrambler that descrambles scrambled digital data. , the random number can be divided into two types: one that depends on the scrambled digital data modulo 2 to the digital data, and the other that depends only on the initial value. Since it generates random numbers, it has the disadvantage that it is easy for a third party to hoard the random numbers. On the other hand, the method that relies on scrambled digital data has the disadvantage that if an error occurs during transmission, the error will spread over a long period of time after decoding.

The object of the present invention is to provide a descrambler which eliminates the above-mentioned drawbacks.

This objective can be achieved with a code converter having the following configuration. That is, a descrambler that receives scrambled data and descrambles the scrambled data.
a first pattern generating means for generating digital patterns in a predetermined order; and a storage means for storing data extracted by a predetermined amount fe in order from the newest data among the scrambled data. and function generating means for generating a digital pattern depending on a predetermined key pattern in response to the output of the first pattern generating means and the storage means, and the scrambled data and the function generating means. 2. A descrambler characterized by comprising: second pattern generating means for outputting descrambled data in accordance with the output of the means.

The operating principle of the present invention will be explained in detail below using block diagrams showing embodiments.

For simplicity, it is assumed that the digital data is expressed in binary, and the random number sequence is a series of one bit each.

FIG. 1 is a block diagram showing an embodiment of the descrambler of the present invention.

The shift register 103 sequentially stores binary data input manually from the input terminal 107, and the pattern generator 102
outputs a binary pattern in some prescribed order. The function generator 104 outputs a random number 0.2 depending on the key pattern from the input terminal 106 and the output J of the shift register 103 and the pattern generator 102. The exclusive OR element 105 is the function generator 1
04 and the binary data from the input terminal 107 are output.

The scrambled digital data input to the descrambler of the present invention is generated by exclusive ORing the same random number sequence as the random number sequence from the function generator 104 with the digital data. . FIG. 2 shows a block diagram of an exemplary apparatus for scrambling the digital data as described above.

In the figure, a shift register 203 sequentially stores binary data output from an exclusive OR element (described later) bit by bit, and a pattern generator 202 outputs a binary pattern in a predetermined order. The function generator 204 outputs the shift register 203 and the pattern generator 202 depending on the key pattern from the input terminal 206.
Outputs 0 or 1 depending on the output. The exclusive OR element 205 outputs the exclusive OR of the output of the function generator 204 and the binary data from the input terminal 207. When installed on the side, the zero pattern generators 202 and 10 indicate that the binary data scrambled by the device of FIG. 2 is restored to the original binary data by the device of the present invention.
2 generates the same binary pattern and input terminal 20
The key butterflies input to 6 and In are also the same.0 At this time, at some point during operation, the shift registers 203 and 1
The contents of 03 are the same binary data that are both scrambled. Both pattern generators 202 and 102 also generate a W- binary pattern.

Therefore, the inputs of the function generators 204 (!: 104) are the same, and the outputs are also the same.

Adding the same random number modulo 2 to the binary data twice returns the original binary data, so the sending side, the receiving @
If the device shown in Fig. 2 and the device of the present invention are installed, the second
The binary data scrambled by the device shown in the figure is restored by the device of the present invention.

Furthermore, by reducing the number of bits in the shift registers 203 and 103, the propagation of transmission errors can be reduced.
(See "Coding Theory" by Miyayo, Iwadare, and Imai, published by Shokodo, 1973, pp. 121-135) The initial value of the 0 shift register is determined by defining some kind of protocol between sending and receiving.
Should I decide accordingly, or should I fix it first?
Alternatively, there is a method of making changes using synchronization codes.

The function generator can also be configured with ROM JPRAM, for example. In other words, a key pattern is memorized, a part or all of the outputs of the shift register and pattern generator are regarded as addresses, and the pits of the key pattern stored at the addresses in the ROM or RAM are output. This is the way to do it. It can also be configured by the method shown in FIG.

In the figure, one bit of the outputs of the pattern generator and shift register is input to an input terminal 305, and all or part of the remaining bits are input to an input terminal 304. The second function generator 301 receives the key input from the input terminal 303.
Depending on the pattern, it outputs a random number O or 1 according to the digital pattern input from the input terminal 304. The exclusive OR element 302 is connected to the second function generator 30
Exclusive OR is performed between the output of 1 and the removed 1 bit. The second function generator 301 also uses ROM or RAM.
It can be composed of

The key pattern may be a digital pattern arbitrarily selected by the user of the device of the present invention, or may be based on a plurality of predetermined bits called a key and may be generated using a linear feedback shift register. In order to make the explanation easier to understand, the random numbers are processed one bit at a time, that is, the outputs of the function generators 104 and 301 are processed one bit at a time, but it is also possible to process the random numbers in parallel by n bits (n is a positive integer). . Also, the calculation is not modulo 2, but M(
M can also be an integer of 2 or more).

Also exclusive theory 31! The Ij oro elements 105 and 205 can also be converters that perform inverse transformations when inputs from the function generators 104 and 204 are considered as parameters.

Furthermore, the output pattern from the input terminal 106.303 can also be fixed. These modifications are included within the scope of the present invention.

As explained above in detail, by using the invention, error propagation can be reduced a little and random numbers can be scrambled and descrambled, and the effect when used in communication systems is shown in Fig. 2 202 203 Fig. 3

Claims (1)

[Claims] a first pattern generation means for receiving scrambled data and instructing a descrambler to descramble the scrambled data to generate digital patterns in a predetermined order; and a first pattern generation means for generating digital patterns in a predetermined order; storage means for storing a predetermined amount of data retrieved sequentially from the first key pattern;
a pattern generating means, a function generating means for generating a digital pattern according to the output of the memory means, and a second function generating means for outputting descrambled data according to the scrambled data and the output of the function generating means. A descrambler 6 specially designed to consist of a pattern generation means and