JPS59163874A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS59163874A
JPS59163874A JP3761383A JP3761383A JPS59163874A JP S59163874 A JPS59163874 A JP S59163874A JP 3761383 A JP3761383 A JP 3761383A JP 3761383 A JP3761383 A JP 3761383A JP S59163874 A JPS59163874 A JP S59163874A
Authority
JP
Japan
Prior art keywords
columnar body
schottky barrier
film
sbd
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3761383A
Other languages
Japanese (ja)
Inventor
Susumu Oi
進 大井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3761383A priority Critical patent/JPS59163874A/en
Publication of JPS59163874A publication Critical patent/JPS59163874A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To realize a Schottky barrier diode (SBD) device, speed thereof is increased and the degree of integration thereof is improved, by forming a columnar body on a semiconductor substrate and shaping the SBD on the upper surface of the columnar body while forming a capacitor using an SBD metal and the substrate as electrodes to the peripheral side surface of the columnar body. CONSTITUTION:A silicon oxide film 12 and a first silicon nitride film 13 are formed on a silicon substrate 11, and a columnar body 14 is formed through an etching method. A silicon surface is coated with a silicon oxide film 15, and the film 15 is coated with a second silicon nitride film 16. The film 16 is left only to the side surface of the columnar body through anisotropic etching, and a thick silicon oxide film 17 is formed to a section not masked with the nitride film through thermal oxidation. The films 13, 16 are removed, a third silicon nitride film 18 is applied, the film 12 is removed, and a Schottky barrier forming metal 19 is applied. An SBD is shaped to the upper surface of the columnar body and a capacitor using the films 15, 18 as dielectrics to the side surface.

Description

【発明の詳細な説明】 本発明は半導体装置に関し、特にショットキ障壁ダイオ
ードを含む半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a semiconductor device including a Schottky barrier diode.

最近、バイポーラ・トランジスタの飽和を抑え高速化を
計るために、通常のPN接合に比べ、順方向バイアス状
態での少数キャリアの注入が少なく、その結果逆バイア
スしたときの回復が速いショットキ障壁ダイオード(以
下SBDと記す)が集積回路に組込まれる機会が増大し
て来た。
Recently, in order to suppress saturation and increase the speed of bipolar transistors, Schottky barrier diodes (Schottky barrier diodes), which inject fewer minority carriers in the forward bias state than normal PN junctions and, as a result, recover quickly when reverse biased, have been developed. There are increasing opportunities for SBDs (hereinafter referred to as SBDs) to be incorporated into integrated circuits.

第1図は従来のショットキ障壁ダイオードの一例の断面
図である。
FIG. 1 is a cross-sectional view of an example of a conventional Schottky barrier diode.

シリコン基板1上に絶縁膜2を形成し、選択除去して開
口部を設け、次にショットキ障壁形成金属膜3を被着し
て8BD(ショットキ障壁ダイオード)を形成する。
An insulating film 2 is formed on a silicon substrate 1, selectively removed to form an opening, and then a Schottky barrier forming metal film 3 is deposited to form 8BD (Schottky barrier diode).

このように形成されたSBDは、その順方向電流の立上
り電圧が通常のPN接合のそれよシも小さく、8BDを
メモリセルの負荷部として用いると、メモリセルのオフ
側のクランプ電圧を下げることができ、メモリの高速化
の上で有用であることが知られている。又SBDをメモ
リセルの負荷部に用いる場合には、SBD容量がワード
線電位の立上り時に、スピードアップコンデンサとじて
作用しており、そのワード線電位の立上りの高速化の為
にも、又α線によるソフトエラーを防ぐ為にも、SBD
には、ある程度の容11二が必要とされている。しかし
ながら、5BI)自体、通常のPN接合に比較し、容t
、(:が少な(8B ’D容量の増大の為に何らかの処
置が必要であった。
The SBD formed in this way has a forward current rise voltage that is smaller than that of a normal PN junction, and when an 8BD is used as a load section of a memory cell, it is possible to lower the clamp voltage on the off side of the memory cell. It is known to be useful for speeding up memory. Furthermore, when an SBD is used in the load section of a memory cell, the SBD capacitor acts as a speed-up capacitor when the word line potential rises, and α In order to prevent soft errors caused by wires, SBD
A certain amount of capacity is required. However, 5BI) itself has a smaller capacity than a normal PN junction.
, (: was small (8B' Some kind of treatment was necessary to increase the D capacity.

従来構造の半導体装置では、SBDの容量を増大させる
為に、SBD形成部分に予め不純物をイオン注入するこ
とがある。この場合注入量が多い程容量も増すが、それ
と同時にSHDの順方向電流の立上り電圧を下げ、表面
濃度がlX1018原子/C−程度まで注入すると、オ
ーミックになってしまう。SBDの立上り電圧は回路動
作上ある範囲内に制御する必要があり、容量増加の為の
イオン注入量もあるレベルに制限されてし捷う。又、イ
オン注入でも容量が充分つかないので、SBD自体の面
積を増大させる必要があった。これらのことがある為に
、SBDを組込んだ半導体装置の高集積密度化が困雛で
あるという欠点があった。
In a semiconductor device having a conventional structure, in order to increase the capacity of the SBD, impurity ions are sometimes implanted in advance into a portion where the SBD is to be formed. In this case, the capacitance increases as the implantation amount increases, but at the same time, if the rising voltage of the forward current of the SHD is lowered and the surface concentration is implanted to about 1.times.10.sup.18 atoms/C.sup.-, it becomes ohmic. The rising voltage of the SBD must be controlled within a certain range for circuit operation, and the amount of ions implanted to increase the capacity is also limited to a certain level. Furthermore, even with ion implantation, a sufficient capacity cannot be obtained, so it is necessary to increase the area of the SBD itself. Because of these factors, it is difficult to increase the integration density of semiconductor devices incorporating SBDs.

本発明の目的は上記欠点を除き、容量の大きな微小面積
のショットキ障壁ダイオードを含み、高速で高集積密度
化の期待できる半導体装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a semiconductor device that includes a Schottky barrier diode with a large capacity and a small area, and which can be expected to achieve high speed and high integration density.

本発明の半導体装置は、半導体基板の選択的エツチング
除去により該半導体基板の一主面に形成された半導体柱
状体と、該半導体柱状体の上面にショットキ障壁形成金
属の膜を被着して形成されたショットキ障壁ダイオード
と、前記半導体柱状体の側面に設けられた少くとも一層
の誘電体層をコンデンサ誘電体とし誘電体層の表面に設
けられかつ前記ショットキ障壁形成金属膜に接続する金
属膜を一方の電極とし前記半導体柱状体を他方の電極と
するコンデンサとを含んで構成される。
The semiconductor device of the present invention includes a semiconductor columnar body formed on one main surface of the semiconductor substrate by selective etching removal of the semiconductor substrate, and a Schottky barrier forming metal film coated on the upper surface of the semiconductor columnar body. a Schottky barrier diode formed on the semiconductor columnar body, at least one dielectric layer provided on the side surface of the semiconductor columnar body as a capacitor dielectric, and a metal film provided on the surface of the dielectric layer and connected to the Schottky barrier forming metal film. A capacitor having one electrode as the semiconductor columnar body and the other electrode as the semiconductor columnar body.

本発明によれば、SBDが半導体基板を選択的にエツチ
ングして形成された柱状体の上面に形成され、この柱状
体の側]酊にコンデンサが形成され、813 Dとコン
デンサとは並列接続されてSBDの容量を確保している
ので、従来の構造で容量を付けるような常置はなく、微
小面積の容量付きSBDを実現することができ、このS
 B Dを集積回路に組込むことにより高速で高集積密
度の半導体装置が得られる。
According to the present invention, an SBD is formed on the top surface of a columnar body formed by selectively etching a semiconductor substrate, a capacitor is formed on the side of this columnar body, and 813D and the capacitor are connected in parallel. Since the capacity of the SBD is secured by using the conventional structure, there is no need to permanently attach a capacitor, making it possible to realize an SBD with a capacitor in a small area.
By incorporating BD into an integrated circuit, a semiconductor device with high speed and high integration density can be obtained.

次に、本発明の実施例について図面を用いて説明する。Next, embodiments of the present invention will be described using the drawings.

第2図(a)〜(f)は本発明の一実施例の製造方法を
説明するだめの工程順に示した断面図である。
FIGS. 2(a) to 2(f) are sectional views illustrating a manufacturing method according to an embodiment of the present invention in the order of steps.

まず、第2図(a)に示すように、N型またはP型のシ
リコン基板11に薄いシリコン酸化膜12を形成し、そ
の上に第1のシリコン窒化膜13を形成する。ホトレジ
ストを用いる食刻法で第1のシリコン窒化膜13.シリ
コン酸化膜12.シリコン基板11を順次エツチングし
て柱状体14を形成する。
First, as shown in FIG. 2(a), a thin silicon oxide film 12 is formed on an N-type or P-type silicon substrate 11, and a first silicon nitride film 13 is formed thereon. The first silicon nitride film 13 is etched using a photoresist. Silicon oxide film 12. The silicon substrate 11 is sequentially etched to form columnar bodies 14.

次に、第2図(b)に示すように、熱酸化して露出して
いるシリコン面をシリコン酸化膜15で覆い、第2のシ
リコン窒化膜16を全面に被着する。そして反応性イオ
ンエツチング等の方法により、第2のシリコン窒化膜が
側面にのみ残るように異方性エツチングを行う。
Next, as shown in FIG. 2(b), the silicon surface exposed by thermal oxidation is covered with a silicon oxide film 15, and a second silicon nitride film 16 is deposited on the entire surface. Then, anisotropic etching is performed using a method such as reactive ion etching so that the second silicon nitride film remains only on the side surfaces.

次に、第2図(C)に示すように、第1及び第2の5− シリコン窒化膜を耐酸化性マスクとして熱酸化を行い、
マスクに覆われていない部分に厚いシリコン酸化膜17
を形成する。
Next, as shown in FIG. 2(C), thermal oxidation is performed using the first and second 5-silicon nitride films as oxidation-resistant masks.
Thick silicon oxide film 17 in areas not covered by the mask
form.

次に、第2図(d)に示すように、第1及び第2のシリ
コン窒化膜1.3 、16を除去する。
Next, as shown in FIG. 2(d), the first and second silicon nitride films 1.3 and 16 are removed.

次に、第2図(e)に示すように、第3のシリコン窒化
膜18を全面に被着した後、異方性エツチングにより側
面にのみシリコン窒化膜18を残し、他の部分を除去す
る。
Next, as shown in FIG. 2(e), after depositing the third silicon nitride film 18 on the entire surface, anisotropic etching is performed to leave the silicon nitride film 18 only on the side surfaces and remove the other parts. .

次に、第2図(f)に示すように、柱状体14の上面の
シリコン酸化膜12を除去し、ショットキ障壁形成金属
191例えばアルミニウムを全面に被着し、選択除去す
る。これにより柱状体14の上面にショットキ障壁ダイ
オードが形成され、柱状体側面にはショットキ障壁形成
金属19を一方の電極、シリコン基板11を他方の電極
、シリコン酸化膜15と第3のシリコン窒化膜18とを
誘電体とするコンデンサが形成される。コンデンサはシ
ョットキ障壁ダイオードと並列接続になっている。この
ような構造にすると、SBDの特性は柱6− 状体14の上面の面積及びショットキ障壁形成金属の種
類で決まり、SBDの容量は柱状体側面に形成したコン
デンサで付加することができ、しかも容量の大きさは柱
状体の高さで制御できるので、容量の付加に大面積を要
しない。従って、高集積密度の集積回路に適する容量付
きSBDが得られる。
Next, as shown in FIG. 2(f), the silicon oxide film 12 on the upper surface of the columnar body 14 is removed, and a Schottky barrier forming metal 191, for example, aluminum, is deposited on the entire surface and selectively removed. As a result, a Schottky barrier diode is formed on the upper surface of the columnar body 14, and the Schottky barrier forming metal 19 is used as one electrode, the silicon substrate 11 is used as the other electrode, and the silicon oxide film 15 and the third silicon nitride film 18 are formed on the side surface of the columnar body. A capacitor is formed using this as a dielectric. The capacitor is connected in parallel with a Schottky barrier diode. With such a structure, the characteristics of the SBD are determined by the area of the top surface of the columnar body 14 and the type of Schottky barrier forming metal, and the capacitance of the SBD can be added by a capacitor formed on the side surface of the columnar body. Since the size of the capacitance can be controlled by the height of the columnar body, a large area is not required to add capacitance. Therefore, an SBD with a capacitance suitable for integrated circuits with high integration density can be obtained.

上記実施例では、コンデンサの一方の雷1極としてショ
ットキ障壁形成用金属19を利用したが、これは製造工
程の簡略化を図って行ったものであり、ショットキ障壁
形成用金属とは別の金属を別途被着させて形成しても良
いことはもちろんである。
In the above embodiment, the Schottky barrier forming metal 19 was used as one pole of the capacitor, but this was done to simplify the manufacturing process, and a metal other than the Schottky barrier forming metal was used. Of course, it may be formed by separately depositing it.

以上詳細に説明したように、本発明によれば、従来のよ
うにショットキ障壁ダイオードの容量付加のために不純
物のイオン注入を行ったり素子面積を増大させることな
く、微小面積で容量付きのショットキ障壁ダイオードが
形成でき、高集積密度、高速動作の半導体装置が得られ
るのでその効果は大きい。
As described in detail above, according to the present invention, a Schottky barrier with a capacitance can be formed in a small area without implanting impurity ions or increasing the device area in order to add capacitance to a Schottky barrier diode as in the conventional method. The effect is great because a diode can be formed and a semiconductor device with high integration density and high speed operation can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のショットキ障壁ダイオードの一例の断面
図、第2図(a)〜(f)は本発明の一実施例の製造方
法を説明するための工程順に示した断面図である。 1・・・・・・シリコン基板、2・・・・・・絶縁膜、
3・・・・・・ショットキ障壁形成金属膜、11・・・
・・・シリコン基板、12・・・・・・シリコン酸化膜
、13・・・・・・第1のシリコン窒化膜、14・・・
・・・柱状体、15・・・・・・シリコン酸化膜、16
・・・・・・第2のシリコン窒化膜、17・・・・・・
シリコン酸化膜、18・・・・・・第3のシリコン窒化
膜、19・・・・・・ショットキ障壁形成金属。
FIG. 1 is a sectional view of an example of a conventional Schottky barrier diode, and FIGS. 2(a) to 2(f) are sectional views shown in order of steps for explaining a manufacturing method of an embodiment of the present invention. 1... Silicon substrate, 2... Insulating film,
3... Schottky barrier forming metal film, 11...
... silicon substrate, 12 ... silicon oxide film, 13 ... first silicon nitride film, 14 ...
...Columnar body, 15...Silicon oxide film, 16
...Second silicon nitride film, 17...
Silicon oxide film, 18... Third silicon nitride film, 19... Schottky barrier forming metal.

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の選択的エツチング除去により該半導体基板
の一主面に形成された半導体柱状体と、該半導体柱状体
の上面にショットキ障壁形成金属の膜を被着して形成さ
れたショットキ障壁ダイオ・−ドと、前記半導体柱状体
の側面に設けられた少くとも一層の誘電体層をコンデン
サ誘電体とし誘電体層の表面に設けられかつ前記ショッ
トキ障壁形成金属膜に接続する金属膜を一方の電極とし
前記半導体柱状体を他方の電極とするコンデンサとを含
むことを特徴とする半導体装置。
A semiconductor columnar body formed on one main surface of the semiconductor substrate by selective etching removal of the semiconductor substrate, and a Schottky barrier diode formed by depositing a Schottky barrier forming metal film on the upper surface of the semiconductor columnar body. and at least one dielectric layer provided on the side surface of the semiconductor columnar body is used as a capacitor dielectric, and a metal film provided on the surface of the dielectric layer and connected to the Schottky barrier forming metal film is used as one electrode. A semiconductor device comprising: a capacitor having the semiconductor columnar body as the other electrode.
JP3761383A 1983-03-08 1983-03-08 Semiconductor device Pending JPS59163874A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3761383A JPS59163874A (en) 1983-03-08 1983-03-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3761383A JPS59163874A (en) 1983-03-08 1983-03-08 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS59163874A true JPS59163874A (en) 1984-09-14

Family

ID=12502456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3761383A Pending JPS59163874A (en) 1983-03-08 1983-03-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS59163874A (en)

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