JPS59162779A - Controlling method of frequency converter - Google Patents

Abstract

PURPOSE:To prevent the commutation failure of a frequency converter by varying the commutation margin time of an inverter in response to an output or a reference signal of the output. CONSTITUTION:An adder 13 inputs a signal 9a of a commutation margin time setter 9 and a signal 11a of an output reference setter 11. The output signal 13a of the adder 13 is inputted to a comparator 8, and compared with a triangular wave 7a to become a signal for controlling the commutation margin time of an inverter. When the output of a frequency converter is increased or decreased by the setter 11, the commutation margin time of the inverter can be varied in response to the reference signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a control method for a frequency conversion device constituted by a load commutation type inverter, and particularly to a control method that prevents commutation failure.

[Technical background of the invention and its problems]

Frequency converters constituted by load commutated inverters are generally used as power sources for induction furnaces, induction heating, etc., and a block diagram of such devices is shown in FIG.

A load commutation type inverter 1 is connected to a forward converter 3 via a DC reactor 2, and by controlling the firing phase of the forward converter 3, the output of the frequency converter is controlled. An induction furnace and an induction heater, which can be represented by any number of circuits such as the tank load circuit 4, are connected.

The inverter 1 of a frequency converter used as a power source for induction heating is generally a load commutation type inverter, and the inverter 1 is operated at a frequency corresponding to the resonance frequency of the tank load circuit 4. The commutation margin time of the inverter is
It is controlled at a constant level by the method described below. The output voltage of the inverter is converted to an electronic circuit level by a voltage detection transformer 5. The voltage zero point detector 6 is a circuit that detects the zero point of the output voltage and outputs a pulse signal as shown at 63 in FIG. The pulse signal 6a is inputted to the triangular wave generating circuit 7. The triangular wave generating circuit 7
Even if the frequency of the output voltage 5a in FIG. 2 changes, a triangular wave 7a whose slope θ is constant is output. The triangular wave 7a is input to the comparator 8, and the signal 9a of the commutation margin time setting device 9 is input to the comparator 8.
is also input, and the comparator 8 outputs a pulse signal 8a when the values of the triangular wave 7a and the signal 9a become equal.

This pulse signal 8a is passed through a distributor 1o to a thyristor 8.
1 to S4. It is obvious that if the slope θ of the triangular wave is constant and the signal 9a is constant, the time t until the output signal 8a of the comparator 8 shown in FIG. 2 and the output voltage 5a become zero will always be equal. Therefore, as can be seen from the open-circular shape of the thyristor at A- in Fig. 2, the time t becomes the commutation margin time of the thyristor, and by this method, the commutation margin time of the inverter 1 of the frequency converter is constant. can be controlled. However, commutation weight time is ignored to simplify the explanation.

On the other hand, the output of the frequency conversion device is output from the output reference signal setter 1.
Control is performed by changing the phase of the gate pulse 12a of the forward converter 3, which is the output of the phase control circuit 12, using the signal 11a from 1 to 1. Although the conventional frequency converter for induction heating has the above-mentioned configuration, it has the following drawbacks.

Generally, the commutation ability of a thyristor is defined by the turn-off time, and one of the conditions is that the reverse voltage value vR shown in FIG. 2 must be applied to a certain value or more.

On the other hand, in a load commutation type inverter, the output voltage 5
a decreases when the output is lowered or when the load impedance is low, and therefore the reverse voltage (18) also decreases, which has the disadvantage that constant margin time control alone makes the inverter operation unstable.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a control method that eliminates the above-mentioned problems and allows stable commutation of an inverter even when the inverter is operated at low impedance or when the output is normally reduced.

[Summary of the invention]

In order to achieve this object, the present invention is characterized in that commutation margin time of the innoctor is controlled in accordance with a reference signal of output power or output voltage to stabilize commutation of the inverter. be.

[Embodiments of the invention]

FIG. 3 is a block diagram showing one embodiment of the present invention, and the same functions as those in FIG. 1 showing the conventional example are denoted by the same reference numerals, and explanation thereof will be omitted.

The present invention adds an adder 13 to the conventional circuit,
The adder 13 receives a signal 9a from the commutation margin time setting device 9.
and the signal 11a of the output standard setter 11 are input. The output signal 13a of the adder 13 is input to the comparator 8, where it is compared with the triangular wave 7a and becomes a signal for controlling the commutation margin time of the inverter.

The control circuit of the frequency conversion device according to the present invention has the configuration as described above.

In the conventional circuit shown in FIG. 1, the commutation margin time of the inverter was controlled to be constant regardless of the increase or decrease in the output of the frequency converter.However, according to the present invention, the output standard When the output of the frequency conversion device is lowered by the setter 11, the commutation margin time setting signal 13a becomes the value 13aL shown in FIG. 4 by the adder 13, and the gate pulse of the inverter is generated at the position tL.

Therefore, the commutation margin time of the thyristor increases. On the other hand, the output standard setter 1 is used to increase the output.
1, the output of the adder 13 is 1 in FIG.
The value becomes 3a8, and the gate pulse is generated at the position t8.

FIG. 5 shows a specific circuit example of the adder 13 and the comparator 8.

In FIG. 5, signals 11a and 98 are added in operational amplifier 7A. Signal 1 whose output controls the commutation margin time
3'a. Further, the levels of the triangular wave 7a and the signal Z3a are compared by the operational amplifier 2A, and the triangular wave 7a and the signal Z3a are compared in level.
The output of 2A is inverted at the intersections ti and ts, and a rectangular wave signal that is further inverted at the point to in FIG. 4 is created. The rectangular wave signal is also input to the monomulti circuit IM, where it is converted into a predetermined pulse width and becomes a gate pulse signal for the inverter.

〔Effect of the invention〕

In the above explanation, an example was described in which the commutation margin time setting signal is changed according to the output.
It is obvious that this can be realized by changing the slope θ of the output triangular wave 7a.

As described above, according to the present invention, the output standard can be lowered to stabilize the operation of the inverter during low output operation, and moreover, when the impedance is low.

[Brief explanation of drawings]

Figure 1 is a block diagram showing a conventional frequency conversion device, Figure 2 is a block diagram showing a conventional frequency conversion device.
The figure is a waveform diagram for explaining the operation of FIG. 1, FIG. 3 is a block diagram of a frequency converter showing an embodiment of the present invention, and FIG. 4 is a waveform diagram for explaining the operation of FIG. , FIG. 5 is a diagram showing a specific circuit example of a part of the circuit shown in FIG. 1... Inverter, 2... DC reactor, 3...
・Forward converter, 4...Tank load circuit, 5...Transformer, 6...Zero point detector, 7...Triangular wave generation circuit, 8.
... Comparator, 9... Commutation margin time setting device, 10...
Divider, 11... Output reference signal setter, 12... Phase control circuit, 13... Adder. Applicant's representative Patent attorney Takehiko Suzue Figure 3 11a 114 Figure 1 'N5 Figure 1937 Director-General of the Japan Patent Office Kazuo Wakasugi 1, Indication of the case Patent application No. 1983-35380 2 Name of the invention Frequency conversion Device control method 3, relationship with the case of the person making the amendment Patent applicant (307) Tokyo Shibaura Koki Co., Ltd. 4, agent 6, specification subject to amendment 7, contents of oil stopper (1) specification No. 1 In the 15th line of the page, ``prevented'' is corrected to ``1 prevent.'' (2) "From 111 on page 1, line 15 of the specification" to "
11,” he corrected. (3) "Added" in line 7 of No. 50 of the specification is corrected to "added." (4) r tt” on page 6, line 16 of the specification
Correct LJ.

Claims (1)

[Claims] A frequency conversion device consisting of a load commutation type inverter that performs constant margin angle or constant margin time control, characterized by varying the commutation margin time of the inverter according to a reference signal of output voltage or output power. A method for controlling a frequency conversion device.