JPS59161924A - Phase synchronizing oscillator - Google Patents

Phase synchronizing oscillator

Info

Publication number
JPS59161924A
JPS59161924A JP58035740A JP3574083A JPS59161924A JP S59161924 A JPS59161924 A JP S59161924A JP 58035740 A JP58035740 A JP 58035740A JP 3574083 A JP3574083 A JP 3574083A JP S59161924 A JPS59161924 A JP S59161924A
Authority
JP
Japan
Prior art keywords
phase
input
frequency
shifter
phase comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58035740A
Other languages
Japanese (ja)
Inventor
Kenji Yamada
健次 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP58035740A priority Critical patent/JPS59161924A/en
Publication of JPS59161924A publication Critical patent/JPS59161924A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range

Abstract

PURPOSE:To shift the input wave phase of a phase comparator in order to shorten the time during which the switched frequency and phase are stabilized in a steady state, by providing a variable phase shifter and a control circuit. CONSTITUTION:The input frequency of an input terminal 10 changes to fi2 from fi1 and the phase jumps by DELTAtheta when the frequency of the input signal of the terminal 10 of a variable phase shifter 8 is set at t=0. Then a control signal which shifts the phase of the shifter 8 by DELTAphi=theta2-theta1-DELTAtheta at t=0 is transmitted to the shifter 8 from a control circuit 9 on the basis of the switch information given from an input terminal 15. The shifter 8 shift the phase of the input signal by DELTAphi. Thus an input terminal 11 receives a signal whose frequency changes to fi2 from fi1 with the phase jump set at DELTAtheta12=DELTAphi+DELTAtheta=theta2-theta1. As a result, the steady phase difference theta2 corresponding to fi2 is obtained at the output of a phase comparator 1. Then the frequency of a VCO2 is instantaneously stabilized at fi2.

Description

【発明の詳細な説明】 (技術分野) 本発明は位相比較器の2つの入力信号のいずれか一方又
は両方の周波数又は位相又はその両方が切替わったとき
、短時間に位相同期発振器(PLO)が定常状態゛に移
行すべく構成された一次ループの位相同期発振器に関す
るものである。
Detailed Description of the Invention (Technical Field) The present invention provides a phase locked oscillator (PLO) in a short time when the frequency and/or phase of one or both of two input signals of a phase comparator is switched. The present invention relates to a first-order loop phase-locked oscillator configured to transition to a steady state.

(背景技術) 一次ループにおけるPLOは従来第1図(a) 、 (
b)等のように構成されていた。この図で1は位相比較
器、2は電圧制御発振器(VCO)、端子3,4゛は位
相比較器の入力端子、5は位相比較器の出力端子、6は
VCOの出力端子、7は分周器である。これらのPLO
において位相比較器の入力端子3又は4のいずれか一方
または両方の入力信号の周波数が突然変化したとき(入
力端子40入力周波数が変化する例は、外部からの制御
信号にまり分周器7の分局比を突然変えた場合及びVC
Oの中心周波数を変化させることによりその入力電圧は
発振周波数特性をシフトさせた場合等がある)、このP
LOは切替わった直後にある過渡的な状態を経て定常状
態におちつく。例えば第1図(a)の回路において、位
相比較器の入力端子30入力信号の周波数がt=Qの時
点にfllからft2に切替わった場合の位相比較器の
入力位相差θ、出力■、VCO2の瞬時発振周波数fv
は、第1図(C)のようになる。ここで、θ5.■1は
端子3の入力周波数が、7’i1のときの位相比較器1
0入力におけろ定常位相差、及び出力電圧、θ2.■2
は同様に入力周波数がf12のときの定常位相差及び出
力電圧である。また過渡状態A。
(Background Art) The PLO in the primary loop is conventionally shown in Fig. 1(a), (
b) It was structured as follows. In this figure, 1 is a phase comparator, 2 is a voltage controlled oscillator (VCO), terminals 3 and 4 are input terminals of the phase comparator, 5 is an output terminal of the phase comparator, 6 is an output terminal of the VCO, and 7 is a divider. It is a peripheral organ. These PLOs
When the frequency of the input signal of one or both of the input terminals 3 and 4 of the phase comparator suddenly changes (an example of a change in the input frequency of the input terminal 40 is when the input frequency of the frequency divider 7 changes due to an external control signal). If the division ratio is suddenly changed and VC
By changing the center frequency of O, the input voltage may shift the oscillation frequency characteristics, etc.), this P
Immediately after the LO is switched, it goes through a certain transient state and then settles into a steady state. For example, in the circuit of FIG. 1(a), when the frequency of the input signal at the input terminal 30 of the phase comparator switches from fl1 to ft2 at time t=Q, the input phase difference θ of the phase comparator, the output ■, Instantaneous oscillation frequency fv of VCO2
is as shown in FIG. 1(C). Here, θ5. ■1 is the phase comparator 1 when the input frequency of terminal 3 is 7'i1
Steady phase difference and output voltage at 0 input, θ2. ■2
Similarly, is the steady phase difference and output voltage when the input frequency is f12. Also, transient state A.

B、Cは入力周波数が1=00時点にft +からf1
2に切替わった場合のft2の位相のジャンプがΔθA
B and C are from ft+ to f1 when the input frequency is 1=00.
The phase jump of ft2 when switching to 2 is ΔθA
.

0、ΔθCの場合を示し、ΔVA、ΔfA及びΔW、Δ
fcはt=Qの時点におけるΔθ。及びΔθ。に対応し
た位相比較器出力のジャンプ、vCOの瞬時周波数のジ
ャンプを示す。また、位相比較器の特性は第1図(d)
に示すように入力信号の位相差が2πごとにきよ歯状波
状の特性に繰返すものとし、また、VCOの特性は第1
図(e)に示すように入力電圧に対し、出力電圧が直線
状に変化するものとする。第1図(C)における位相比
較器の入力位相差θ、出力電圧■、VCOの瞬時発振周
波数fvの1>0における変化は次式で表わされる。
0, ΔθC, ΔVA, ΔfA and ΔW, Δ
fc is Δθ at time t=Q. and Δθ. The jump in the phase comparator output corresponding to , and the jump in the instantaneous frequency of vCO are shown. The characteristics of the phase comparator are shown in Figure 1(d).
It is assumed that the phase difference of the input signal repeats the characteristic of a tooth-like waveform every 2π as shown in , and the characteristic of the VCO is
It is assumed that the output voltage changes linearly with respect to the input voltage as shown in Figure (e). Changes in the input phase difference θ of the phase comparator, the output voltage ■, and the instantaneous oscillation frequency fv of the VCO when 1>0 in FIG. 1(C) are expressed by the following equation.

0−02−(0,、−’0.−AD)e”V=V、、−
(v2−v、−Δ■)e−ktfv=fi2(ftz−
fal−Δf)e−ktここでΔθ、ΔV、Δfは1=
0におけるθ+ V + fVのジャンプの量を示し、
Kは位相比較器、VCOの感度をそれぞれにθ(V /
 rad ) 1.Ky(6) / V )とするとに
=にθKv で表わされるループゲインである。
0-02-(0,,-'0.-AD)e"V=V,,-
(v2-v, -Δ■)e-ktfv=fi2(ftz-
fal-Δf)e-kt where Δθ, ΔV, Δf are 1=
indicates the amount of jump of θ + V + fV at 0,
K is the sensitivity of the phase comparator and VCO, respectively θ(V/
rad) 1. Ky(6)/V) is the loop gain expressed as θKv.

このように、入力周波数又は入力位相が切替わったとき
のVCOの瞬時発振周波数は時定数が1/にの指数曲線
で表わされろような過渡状態を経ろことになり、第1図
(a) 、 (b)の構成のままではこの過渡状態を短
縮することはできないという欠点があった。
In this way, the instantaneous oscillation frequency of the VCO when the input frequency or input phase is switched passes through a transient state that can be expressed as an exponential curve with a time constant of 1/, as shown in Figure 1(a). , There is a drawback that this transient state cannot be shortened if the configuration of (b) is used as is.

以上の説明は第1図(a)又は(b)において、位相比
較器の入力端子3における周波数、位相が変化した場合
について述べたが、入力端子4の側の周波数が変化した
場合についても、定常状態に安定するまでの過渡的変化
のようすは以上の説明とほぼ同様になる。
The above explanation has been given for the case where the frequency and phase at the input terminal 3 of the phase comparator change in FIG. 1(a) or (b), but also when the frequency at the input terminal 4 side changes. The state of the transient change until it stabilizes to a steady state is almost the same as the above explanation.

(発明の課題) 本発明はこれらの欠点を除去するため、周波数及び位相
の切替に伴なう前記過渡状態を除去又は短縮丁べく位相
比較器の入力波の位相をシフトさせるもので、以下図面
について詳細に説明する。
(Problem to be solved by the invention) In order to eliminate these drawbacks, the present invention shifts the phase of the input wave of the phase comparator in order to eliminate or shorten the transient state that accompanies frequency and phase switching. will be explained in detail.

(発明の構成および作用) 第2図(a)は本発明の実施例であって1は位相比較器
、2はVCO18は可変移相器、9は制御回路、10は
可変移相器の入力端子、11. 、12は位相比較器の
入力端子、13は位相比較器の出力端子、14はVCO
の出力端子、15は制御回路の入力端子、16は出力端
子である。この図において、今、位相比較器1及びVC
O2は第1図(d)及び(elと同様の特性を持つもの
と仮定する。この実施例における動作を第2図(b)〜
(d)に従って説明する。同図(blは位相比較器入力
端子11における信号、(C)は12における信号、(
d)は位相比較器出力における信号を示す。これらの図
において、t=Qの時点に入力端子100入力周波数が
ft 1からft2に、位相がΔθだけジャンプするも
のとすると(第2図(b)のYに対応)、制御回路9に
おいて入力端子15からの周波数及び位相の切替情報を
もとに可変移相器8に対し、その移相器をt、=Qの時
点に次の移相量Δφだけ移相させるための制御信号を送
出する。
(Structure and operation of the invention) FIG. 2(a) shows an embodiment of the present invention, in which 1 is a phase comparator, 2 is a VCO 18 is a variable phase shifter, 9 is a control circuit, and 10 is an input of the variable phase shifter. Terminal, 11. , 12 is the input terminal of the phase comparator, 13 is the output terminal of the phase comparator, 14 is the VCO
15 is an input terminal of the control circuit, and 16 is an output terminal. In this figure, now phase comparator 1 and VC
It is assumed that O2 has the same characteristics as in FIG. 1(d) and (el).The operation in this example is shown in FIG.
Explain according to (d). In the same figure (bl is the signal at the phase comparator input terminal 11, (C) is the signal at 12, (
d) shows the signal at the phase comparator output. In these figures, if the input frequency of the input terminal 100 jumps from ft1 to ft2 and the phase jumps by Δθ at time t=Q (corresponding to Y in FIG. 2(b)), then the control circuit 9 inputs Based on the frequency and phase switching information from the terminal 15, a control signal is sent to the variable phase shifter 8 to phase shift the phase shifter by the next phase shift amount Δφ at time t,=Q. do.

Δφ=θ2−θ1−Δθ ただし、θ2は入力周波数がft2における位相比較器
10入力における定常位相差、θ、は同じ(fllにお
ける定常位相差である。可変位相器8゛では、この制御
信号によりΔφだけその入力信号を移相させる。これに
より、位相比較器の入力端子11には第2図(blに示
すように、t=Qの時点に周波数がfHからft2に、
このときの位相ジャンプかΔθ12となる信号が加えら
れることになる(第2図(b)のZに対応)。ここでΔ
θ、2はΔθ1□=Δφ+Δθ=θ2−θ。
Δφ=θ2-θ1-Δθ However, θ2 is the steady phase difference at the input of the phase comparator 10 when the input frequency is ft2, and θ is the steady phase difference at the same (fl. The phase of the input signal is shifted by Δφ.As a result, as shown in FIG.
A signal resulting in a phase jump of Δθ12 at this time is added (corresponding to Z in FIG. 2(b)). Here Δ
θ, 2 is Δθ1□=Δφ+Δθ=θ2−θ.

となり、従って、位相比較器の出力には第2図(d)に
示すようにj=Qの時点に入力周波数fi2に対応した
定常位相誤差θ2が得られる。これによりVCOの瞬時
周波数は、過渡期を経ることな(t=Qの時点に瞬時に
新しい周波数fizに安定し、切替が完了する。
Therefore, as shown in FIG. 2(d), the steady phase error θ2 corresponding to the input frequency fi2 is obtained at the time of j=Q at the output of the phase comparator. As a result, the instantaneous frequency of the VCO does not go through a transition period (at time t=Q, it instantaneously stabilizes at the new frequency fiz, and the switching is completed.

第3図は他の実施例で、第2図における可変移相器8を
位相比較器10入力端子12の側へ入れた場合の例であ
る。この例において、入力端子11に第2図(b)と同
様の周波数切替及び位相のジャンプがあった場合、可変
移相器8の移相量を一Δφ と丁べく制御回路9におい
て制御することにより、このPLOは瞬時に新しい周波
数に引込むことができ、第2図(a)の構成と同様の効
果が得られることは明らかである。
FIG. 3 shows another embodiment in which the variable phase shifter 8 in FIG. 2 is placed on the input terminal 12 side of the phase comparator 10. In this example, if there is a frequency switch and a phase jump at the input terminal 11 similar to those shown in FIG. It is clear that this PLO can be instantaneously pulled into a new frequency, and that the same effect as the configuration shown in FIG. 2(a) can be obtained.

第4図は他の実施例で1.2,8,9,10,11,1
2,1.3,14゜15 、16は第2図と同じで、1
7は可変分周器、18はその制御入力である。この実施
例は入力端子10に固定の基準発振器からの信号を入力
し、分周器17の分周比を切替えることによりVCOの
発振周波数を切替える構成のPLO(シンセサイザ等で
用いられる)に、可変移相器8を用いてその切替時間の
短縮をはかったものである。すなわち、■CO出力周波
数を切替えるため、分周器17の分周比を切替えると、
位相比較器人力12の入力周波数が一時的に変化しよう
とするが、この変化を可変移相器8の移相量を制御する
ことにより打消し、切替時間の短縮をはかろうとするも
ので、基本的動作原理は前記のものとほぼ同じである。
Figure 4 shows other examples of 1.2, 8, 9, 10, 11, 1.
2, 1.3, 14゜15, 16 are the same as in Figure 2, 1
7 is a variable frequency divider, and 18 is its control input. In this embodiment, a signal from a fixed reference oscillator is input to the input terminal 10, and the oscillation frequency of the VCO is changed by changing the division ratio of the frequency divider 17. A phase shifter 8 is used to shorten the switching time. In other words, when changing the division ratio of the frequency divider 17 in order to change the CO output frequency,
Although the input frequency of the phase comparator 12 tends to change temporarily, this change is canceled by controlling the amount of phase shift of the variable phase shifter 8, and the switching time is shortened. The basic operating principle is almost the same as described above.

jなわち、分周器の分周比を切替えることにより1=0
0時点に入力端子120入力周波数がfllからf+2
へ位相のジャンプΔθを伴なって変化しようとするとぎ
、可変位相器を移相量Δφだげシフトさせるこ゛とによ
り、切替に伴なう過渡的変化を打消すことができる。
In other words, by switching the division ratio of the frequency divider, 1=0
At time 0, the input frequency of input terminal 120 changes from fll to f+2.
When the phase shifts to Δθ with a phase jump, the transient change accompanying the switching can be canceled by shifting the variable phase shifter by the phase shift amount Δφ.

この実施例においても、可変移相器8を位相比較器の入
力端12の側へ入れても同じ効果が得られることは明ら
かである。
It is clear that even in this embodiment, the same effect can be obtained even if the variable phase shifter 8 is placed on the input end 12 side of the phase comparator.

本発明において、可変移相器は位相比較器の直前に入れ
た場合を示したが、位相比較器入力において所定の位相
変化が得られれば、可変移相器の挿入箇所、可変量、形
式はいかなるもの、であってもかまわないことは明らか
である(例えば第4図のVCO2と分周器17の間、ま
た■CO出力側あるいは位相比較器側にミキサーが用い
られる場合にはその局部発振器出力側など)。
In the present invention, the case where the variable phase shifter is inserted just before the phase comparator is shown, but if a predetermined phase change is obtained at the input of the phase comparator, the insertion point, variable amount, and type of the variable phase shifter can be changed. It is clear that it does not matter what it is (for example, if a mixer is used between the VCO 2 and the frequency divider 17 in Figure 4, or on the CO output side or the phase comparator side, the local oscillator) output side, etc.).

本実施例において第2図(b) 、 (C)の入力信号
を正弦波としているが、他の形式、例えばパルス状の信
号等であっても、本発明を適用できることは明らかであ
る。
In this embodiment, the input signals in FIGS. 2(b) and 2(C) are sinusoidal waves, but it is clear that the present invention can be applied to other types of signals, such as pulsed signals.

本実施例にお(・て、位相比較器の特性及びVCOの特
性は第1図(d) 、 (e)のように仮定しているが
、他の形状のものでもそれに応じて可変移相器の移相量
を制御することにより、本発明を適用できることは明ら
かである。
In this example, the characteristics of the phase comparator and the characteristics of the VCO are assumed to be as shown in Figure 1 (d) and (e), but other shapes can also be used with variable phase shift. It is clear that the present invention can be applied by controlling the amount of phase shift of the device.

本発明において、可変移相器の位相切替時点に多少のず
れが生じてもそのずれに応じて移相量を調整することに
より、新局波数、位相への短時間の引入を確保すること
ができる。
In the present invention, even if there is a slight deviation in the phase switching point of the variable phase shifter, by adjusting the amount of phase shift according to the deviation, it is possible to secure entry into the new station wave number and phase in a short time. can.

(発明の効果) 以上説明したように本発明の方式を用いれば、−次ルー
プPLOにおける周波数及び位相が切替わった場合の定
常状態に安定するまでの時間を短縮できるので、高速切
替を要求される周波数シンセサイザ等に応用すればその
周波数切替時間を短縮することができる利点がある。
(Effects of the Invention) As explained above, by using the method of the present invention, it is possible to shorten the time required to stabilize the steady state when the frequency and phase in the -order loop PLO are switched, thereby eliminating the need for high-speed switching. If applied to a frequency synthesizer, etc., the advantage is that the frequency switching time can be shortened.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(e)は従来の一次ループPLOの構成
と入力周波数切替時の動作特性の説明図、第2図(a)
〜(dlは本発明の一実施例とその動作の説明図、第3
図及び第4図は本発明の他の実施例を示すものである。 1・・・位相比較器、  2・・・電圧制御発振器(”
VCO)、3及び4・・・位相比較器の入力端子、5・
・・位相比較器の出力端子、 6・・・VCOの出力端子、7・・・分周器、8・・・
可変移相器、   9・・・制御回路、10・・・可変
移相器の入力信号端子、11.12・・・位相比較器の
入力信号端子、13・・・位相比較器の出力端子、 14・・・VCOの出力端子、 15・・・周波数及び位相切替情報入力端子、16・・
・制御回路の出力端子、17・・・可変分周器、18・
・・可変分周器の入力端子。 第2図 t7゜ 一−−−−−−−−→−−−−−−−−−−−ヤt−0
Figures 1 (a) to (e) are explanatory diagrams of the configuration of a conventional primary loop PLO and operating characteristics when switching input frequency; Figure 2 (a)
~(dl is an explanatory diagram of one embodiment of the present invention and its operation, the third
The figures and FIG. 4 show other embodiments of the present invention. 1... Phase comparator, 2... Voltage controlled oscillator ("
VCO), 3 and 4...input terminal of phase comparator, 5.
... Output terminal of phase comparator, 6... Output terminal of VCO, 7... Frequency divider, 8...
Variable phase shifter, 9... Control circuit, 10... Input signal terminal of variable phase shifter, 11.12... Input signal terminal of phase comparator, 13... Output terminal of phase comparator, 14... VCO output terminal, 15... Frequency and phase switching information input terminal, 16...
- Control circuit output terminal, 17... variable frequency divider, 18.
...Input terminal of variable frequency divider. Fig. 2 t7゜----------→----------Y t-0

Claims (1)

【特許請求の範囲】 位相比較器と、その出力に直接接続される電圧制御発振
器とを有しその出力に位相同期された出力を提供する位
相同期発振器において、前記位相比較器の少なくとも一
方の入力の周波数及び位相の少な(とも一方が切替った
とき、当該切替情報に従って前記位相比較器の前記入力
の位相をほぼ(θ2−01−Δθ)、 だけシフトさせる手段がもうけられることを特徴とする
位相同期発振器。
[Scope of Claim] A phase-locked oscillator comprising a phase comparator and a voltage-controlled oscillator directly connected to the output thereof, and providing an output phase-synchronized with the output thereof, wherein at least one input of the phase comparator The frequency and phase of the phase comparator are small (when one of them is switched, means is provided for shifting the phase of the input of the phase comparator by approximately (θ2-01-Δθ) according to the switching information. Phase-locked oscillator.
JP58035740A 1983-03-07 1983-03-07 Phase synchronizing oscillator Pending JPS59161924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58035740A JPS59161924A (en) 1983-03-07 1983-03-07 Phase synchronizing oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58035740A JPS59161924A (en) 1983-03-07 1983-03-07 Phase synchronizing oscillator

Publications (1)

Publication Number Publication Date
JPS59161924A true JPS59161924A (en) 1984-09-12

Family

ID=12450219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58035740A Pending JPS59161924A (en) 1983-03-07 1983-03-07 Phase synchronizing oscillator

Country Status (1)

Country Link
JP (1) JPS59161924A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56162580A (en) * 1980-05-19 1981-12-14 Sony Corp Pll circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56162580A (en) * 1980-05-19 1981-12-14 Sony Corp Pll circuit

Similar Documents

Publication Publication Date Title
JPH0556691B2 (en)
FI107480B (en) Broadband frequency synthesizer for fast frequency tuning
BR9909818A (en) Apparatus for receiving an RF signal, distortion reduction process, apparatus for reducing spurious emissions from a receiver, and process for reducing spurious emissions from a receiver
JPS6096029A (en) Signal generator
KR0138220B1 (en) Clock delay compensation and duty control apparatus
US6525612B2 (en) Mode control of PLL circuit
US6163223A (en) High performance dual mode multiple source/local oscillator module
US4339725A (en) Synchronous demodulator for multi-phase PSK signal
JPS6363137B2 (en)
JPS6359116A (en) Pll frequency synthesizer
JPS59161924A (en) Phase synchronizing oscillator
JP2785996B2 (en) PLL frequency synthesizer
JP2704000B2 (en) Phase locked loop circuit
JPH10303708A (en) Frequency multiplier circuit
JPH0537370A (en) Frequency synthesizer
SU1249469A1 (en) Phase calibrator
JPH0287822A (en) Automatic phase control circuit
JPH1079666A (en) Phase locked loop oscillation circuit
JPS62181525A (en) Signal generating circuit
JPH025622A (en) Pll frequency synthesizer
JP2827389B2 (en) Semiconductor integrated circuit for PLL
JPS61225905A (en) Output phase variable type phase locked oscillator
JPS623945Y2 (en)
JPH02214222A (en) Voltage controlled oscillator
JPH05110428A (en) Phase locked loop circuit